Patents by Inventor Shinji Shirakawa

Shinji Shirakawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030031038
    Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.
    Type: Application
    Filed: October 22, 2002
    Publication date: February 13, 2003
    Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
  • Publication number: 20020195286
    Abstract: A positive side conductor and a negative side conductor of an input terminal electrically connected to semiconductor elements, are electrically insulated from each other, and are laminated with each other, and the input terminal having such a laminated structure, an output terminal and substrates mounted thereon the semiconductor elements are arranged in a checkered pattern in a container. Further, the semiconductor elements mounted on the substrates, the input terminal and the output terminal are electrically connected to one another so as to obtain a loop-like electric path on a conductive member, thereby it is possible to aim at miniaturizing the power conversion apparatus and lowering the inductance thereof.
    Type: Application
    Filed: December 21, 2001
    Publication date: December 26, 2002
    Inventors: Shinji Shirakawa, Akira Mishima, Keiichi Mashino, Toshiyuki Innami, Shinichi Fujino, Hiromichi Anan, Yoshitaka Ochiai
  • Patent number: 6493249
    Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: December 10, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
  • Publication number: 20020180037
    Abstract: A semiconductor device including a positive polarity wiring plate, negative wiring plate, more than one output wiring plate, semiconductor switch element and conductive buffer or “cushion” member is disclosed. The semiconductor switch element and cushion member are compressively interposed between the output wiring plate and positive wiring plate and also between the output wiring plate and negative wiring plate to thereby constitute bridge circuitry. The positive wiring plate, negative wiring plate or output wiring plate is for use as one support body of a pressurization structure. With such an arrangement, it is possible to improve the heat releasability of semiconductor elements while at the same time reducing the inductance of direct current (DC) circuitry to thereby suppress heat generation of the semiconductor elements, thus increasing the reliability relative to temperature cycles.
    Type: Application
    Filed: September 7, 2001
    Publication date: December 5, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Shinji Shirakawa, Akira Mishima, Keiichi Mashino, Toshiyuki Innami, Hiromichi Anan, Yoshitaka Ochiai
  • Publication number: 20020034087
    Abstract: In an electric power conversion/inversion apparatus, including, such as an inverter therein, for obtaining reduction in circuit inductance and wiring resistance therein by bringing small as a whole, having good installability and high reliability and efficiency of electric power conversion, as well, semiconductor chips 1 are disposed, being put between a positive input bus bar 14p and a negative input bus bar 14n and plural output bus bars 18 at crossing positions thereof, and are connected electrically and thermally, to the positive input bus bar 14p in a pole direction consistent therewith while to the negative input bus bar 14n in a pole direction consistent therewith, and further to the common output bus bars 18 in pole directions being different from side by side.
    Type: Application
    Filed: March 19, 2001
    Publication date: March 21, 2002
    Inventors: Osamu Suzuki, Shinji Shirakawa, Akira Mishima, Toshiyuki Innami, Shinichi Fujino, Hideaki Mori, Kenji Takahashi, Keiichi Mashino, Hiromichi Anan
  • Publication number: 20020011363
    Abstract: A semiconductor apparatus includes positive and negative side conductors for bridge-connecting semiconductor switches, constituted to a wide conductor, and laminated by sandwiching an insulator between them. A semiconductor apparatus includes positive and negative side conductors extended from its case, and an electrolytic capacitor connected to the extension portion of the positive and negative side conductors. A power converter uses the semiconductor apparatus.
    Type: Application
    Filed: February 26, 2001
    Publication date: January 31, 2002
    Inventors: Shinji Shirakawa, Akira Mishima, Hideshi Fukumoto, Keiichi Mashino, Toshiyuki Innami
  • Patent number: 5538685
    Abstract: A bonding wire for a semiconductor device contains high purity Pd or Pd alloy as a base metal and 25-10000 atppm of low boiling element III having a boiling point lower than a melting point of the base metal and soluble in Pd, or contains high purity Pd or Pd alloy as a base metal and 5-500 atppm of low boiling point element IV having a boiling point lower than a melting point of the base metal and insoluble in Pd, or high purity Pd or Pd alloy as a base metal, and 5-10000 atppm of low boiling point element III and low boiling point element IV, the low boiling point element III having a boiling point lower than a melting point of the base metal and being soluble in Pd, the low boiling point element IV having a boiling point lower than a melting point of the base metal and being insoluble in Pd, the low boiling elements III and IV being present in a concentration so that (content of the low boiling point element III)/25 + (content of the low boiling element IV)/5.gtoreq.1.gtoreq.
    Type: Grant
    Filed: May 30, 1995
    Date of Patent: July 23, 1996
    Assignee: Tanaka Denshi Kogyo Kabushiki Kaisha
    Inventors: Katsuyuki Toyofuku, Ichiro Nagamatsu, Shinji Shirakawa, Hiroto Iga, Takeshi Kujiraoka, Kensei Murakami
  • Patent number: 5364706
    Abstract: A clad bonding wire for electrically connecting the bonding pad of a semiconductor device to an external lead comprises a core wire formed on one of high-purity Pd or a Pd alloy, high-purity Au or a Au alloy, high-purity Pt or a Pt alloy, and high-purity Ag or a Ag alloy, and a cladding cladding the core wire and formed of another one of the foregoing materials other than that forming the core wire. The wire-to-cladding diameter ratio D.sub.2 /D.sub.1 is in the range of 15% to 60% or 85% to 99. When the tip of the clad bonding wire is heated to form a ball, part of the core wire and part of the cladding in a neck formed behind the ball diffuse into each other to form an alloy of the materials forming the core wire and the cladding between the core wire and the cladding to enhance the mechanical strength of the neck beyond that of other portion of the clad bonding wire.
    Type: Grant
    Filed: July 12, 1991
    Date of Patent: November 15, 1994
    Assignee: Tanaka Denshi Kogyo Kabushiki Kaisha
    Inventors: Katsuyuki Toyofuku, Ichiro Nagamatsu, Shinji Shirakawa, Hiroto Iga, Takeshi Kujiraoka, Kensei Murakami
  • Patent number: 5298219
    Abstract: Bonding wire for a semiconductor device contains high purity Au or Au alloy as a base metal and 25-10000 atppm of low boiling point element I having a boiling point lower than a melting point of the base metal and soluble in Au, or contains high purity Au or Au alloy as a base metal and 5-500 atppm of low boiling point element II having a boiling point lower than a melting point of the base metal and insoluble in Au, or contains high purity Au or Au alloy as a base metal and 5-10000 atppm of a mixture of low boiling point element I having a boiling point lower than a melting point of the base metal and soluble in Au and low boiling point element II having a boiling point lower than the melting point of the base metal and insoluble in Au under the condition of (content of the low boiling point element I)/25+(content of the low boiling point element II)/5.gtoreq.1.gtoreq.(content of the low boiling point element I)/10000+(content of the low boiling point element II)/500.
    Type: Grant
    Filed: May 31, 1991
    Date of Patent: March 29, 1994
    Assignee: Tanaka Denshi Kogyo Kabushiki Kaisha
    Inventors: Katsuyuki Toyofuku, Ichiro Nagamatsu, Shinji Shirakawa, Hiroto Iga, Takeshi Kujiraoka, Kensei Murakami