Patents by Inventor Shinji Yoshihara

Shinji Yoshihara has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6450029
    Abstract: A capacitive semiconductor acceleration sensor capable of efficiently performing a self-diagnostic procedure without having to provide any separate electrodes for self-diagnosis purposes. The acceleration sensor includes a beam portion that is deformable upon application of acceleration thereto in a direction at right angles to the elongate direction thereof to thereby exhibit a spring function. The sensor also includes a movable electrode and fixed electrodes which are integrally formed with the beam portion. The sensor is operable to detect the acceleration while applying between the movable electrode and fixed electrodes a periodically changeable signal to derive an output voltage variable in potential with a differential capacitance change of capacitors between the both electrodes.
    Type: Grant
    Filed: September 22, 2000
    Date of Patent: September 17, 2002
    Assignee: Denso Corporation
    Inventors: Minekazu Sakai, Shinji Yoshihara
  • Patent number: 6429506
    Abstract: A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is bonded to the protective sheet at an opposite side of the jig, and the jig is detached from the protective sheet and the semiconductor wafer bonded together. After that, the semiconductor wafer is cut into semiconductor chips by dicing along the grooves of the protective sheet. Because the protective sheet is not cut by dicing, no scraps of the protective sheet is produced, thereby preventing contamination to the chips.
    Type: Grant
    Filed: March 15, 2000
    Date of Patent: August 6, 2002
    Assignee: Denso Corporation
    Inventors: Tetsuo Fujii, Tsuyoshi Fukada, Hiroshi Muto, Kenichi Ao, Shinji Yoshihara, Sumitomo Inomata
  • Publication number: 20020100948
    Abstract: A bridge circuit includes four gage resistors. Each gage resistor is divided into two division gage resistors. A couple of division gage resistors. The junction points between division gage resistors outputting the same potential when no pressure is applied are used for diagnostic. Four gage resistors out of the eight gage resistors are arrange near the center of diaphragm 14, and the other four division resistor s are arranged near the peripheral edge portion of the diaphragm 14 to make the stress distribution even.
    Type: Application
    Filed: January 24, 2002
    Publication date: August 1, 2002
    Inventors: Shinji Yoshihara, Yasutoshi Suzuki
  • Publication number: 20020093076
    Abstract: A protective sheet is fixed to a jig, and regions of the protective sheet corresponding to regions where dicing-cut is to be performed are removed to form grooves. Then, a semiconductor wafer is bonded to the protective sheet at an opposite side of the jig, and the jig is detached from the protective sheet and the semiconductor wafer bonded together. After that, the semiconductor wafer is cut into semiconductor chips by dicing along the grooves of the protective sheet. Because the protective sheet is not cut by dicing, no scraps of the protective sheet is produced, thereby preventing contamination to the chips.
    Type: Application
    Filed: March 7, 2002
    Publication date: July 18, 2002
    Inventors: Tetsuo Fujii, Tsuyoshi Fukada, Hiroshi Muto, Kenichi Ao, Shinji Yoshihara, Sumitomo Inomata
  • Patent number: 6421786
    Abstract: To allow an AP which performs operation based on a time of a system clock and another AP which performs operation based on a user-specified time to be executed concurrently in a data processing unit with only one system clock without having to change the time of the system clock, virtual system time setting means 5 receive a command or job start date and/or time from an input/output unit 2 and store it in a virtual system time storage area 4. In response to a system date acquisition function 6 or a system time acquisition function 7 from a command or a job, virtual system time converting means return either the date of the system clock when the date is not stored in the virtual system time storage area 4 or the date stored in the date storage area when the date is stored therein.
    Type: Grant
    Filed: March 12, 1999
    Date of Patent: July 16, 2002
    Assignee: NEC Corporation
    Inventor: Shinji Yoshihara
  • Publication number: 20020079549
    Abstract: A plurality of sensor chips, each having strain gauges and a thin diaphragm, are formed on a semiconductor wafer having an upper layer and a lower layer forming a P-N junction plane therebetween. The sensor chips are separated into individual pieces by dicing along column and row interstices dividing the sensor chips. Conductor lines for supplying an electrical voltage for electrochemically etching the diaphragms are formed on and along the interstices. All of the conductor lines are removed by a dicing blade having a wider width than the conductor lines to avoid electrical leakage due to particles of conductor lines leftover on side surfaces of the diced out sensor chips.
    Type: Application
    Filed: October 16, 2001
    Publication date: June 27, 2002
    Inventors: Shinji Yoshihara, Yasutoshi Suzuki
  • Publication number: 20020014287
    Abstract: An Al—Mg—Si based aluminum alloy extrusion having large strength, absorbable impact energy and resistance against compressing cracking, wherein the average size of Mg2Si precipitation in the [1 0 0] and [0 1 0] directions of the (1 0 0) plane inside grains is 20 nm or more, the distribution density of the Mg2Si precipitation in the [0 0 1] direction of the (1 0 0) plane is 100 or more per &mgr;m2, and the size of precipitations on grain boundaries is 1000 nm or less. Alternatively, in the Al—Mg—Si based aluminum alloy extrusion, a tensile strength obtained from a tensile test performed at a strain rate of 1000 per second is from 150 to 400 N/mm2 (both inclusive).
    Type: Application
    Filed: October 25, 1999
    Publication date: February 7, 2002
    Inventors: SHINJI YOSHIHARA, HITOSHI KAWAI, MASAKAZU HIRANO
  • Patent number: 6313529
    Abstract: On a circuit chip on which a processing circuit for sensor outputs is formed, bump electrodes and a sealing bump, which has a shape of rectangular frame and is arranged to surround the bump electrodes, are formed by Sn—Pb solder. On a sensor chip provided with a sensing portion, electrode pads to be bonded to the bump electrode and a joining pad to be bonded to the sealing bump are formed. When the sensor chip is connected onto the circuit chip, an air-tight space containing the sensing portion is formed by the sealing bump and the joining pad.
    Type: Grant
    Filed: August 7, 1998
    Date of Patent: November 6, 2001
    Assignee: Denso Corporation
    Inventors: Shinji Yoshihara, Shigeyuki Akita
  • Patent number: 6287885
    Abstract: In a method for manufacturing a semiconductor acceleration sensor, a movable portion including a mass portion and movable electrodes is formed in a single crystal silicon thin film provided on a silicon wafer through an insulation film by etching both the single crystal silicon thin film and the silicon wafer. In this case, the movable portion is finally defined at a movable portion defining step that is carried out in a vapor phase atmosphere. Accordingly, the movable portion is prevented from sticking to other regions due to etchant during the manufacture thereof.
    Type: Grant
    Filed: May 6, 1999
    Date of Patent: September 11, 2001
    Assignee: Denso Corporation
    Inventors: Hiroshi Muto, Tsuyoshi Fukada, Masakazu Terada, Hiroshige Sugito, Masakazu Kanosue, Shinji Yoshihara, Shoji Ozoe, Seiji Fujino, Minekazu Sakai, Minoru Murata, Yukihiro Takeuchi, Seiki Aoyama, Toshio Yamamoto, Kazushi Asami
  • Patent number: 6277756
    Abstract: A method of manufacturing a semiconductor device, which can effectively form a trench having a high aspect ratio with relatively simple steps. An initial trench is formed in a silicon substrate by a reactive ion etching using an oxide film mask as an etching mask. After forming a protection oxide film on an inside surface of the trench, a part of the protection oxide film at which positions at a bottom surface of the trench is removed by a reactive ion etching, so that an etching of the silicon substrate is advanced through the bottom surface of the trench. Furthermore, the step for forming the protection oxide film and the step for re-etching the bottom surface of the trench are repeatedly performed, so that a depth of the trench becomes a predetermined depth. These steps are performed in a common chamber by using plasma processed with switching gases to be introduced to the chamber.
    Type: Grant
    Filed: February 10, 2000
    Date of Patent: August 21, 2001
    Assignee: Denso Corporation
    Inventors: Junji Ohara, Shinji Yoshihara, Kazuhiko Kano, Nobuyuki Ohya
  • Publication number: 20010008300
    Abstract: A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.
    Type: Application
    Filed: February 20, 2001
    Publication date: July 19, 2001
    Applicant: IPICS Corporation
    Inventors: Shinji Yoshihara, Yasuo Souki, Kinya Atsumi, Hiroshi Muto
  • Publication number: 20010007960
    Abstract: A network system is designed for composing music data representative of a music composition according to composing data representative of a material of the music composition. The network system is constructed by a plurality of information processing terminals and a control station for mutually connecting the plurality of the information processing terminals through the control station. In each information processing terminal, a conversation section can be operated to exchange messages with other information processing terminal, and an input section can be operated to input the composing data while exchanging the messages with other information processing terminal. The central station composes and edits the music data according to the composing data inputted by the plurality of the information processing terminals to thereby collaborate the plurality of the information processing terminals for creating the music composition.
    Type: Application
    Filed: January 4, 2001
    Publication date: July 12, 2001
    Applicant: Yamaha Corporation
    Inventors: Shinji Yoshihara, Masahiko Wakita, Tom Jen Tsai
  • Patent number: 6255741
    Abstract: A heat resisting resin sheet is bonded to a semiconductor chip as a protective cap for protecting a beam structure provided on the semiconductor chip, through a heat resisting adhesive. The heat resisting resin sheet is composed of a polyimide base member and the heat resisting adhesive is composed of silicone adhesive. The heat resisting resin sheet is not deformed during a manufacturing process of the semiconductor chip. In addition, grinding water does not invade into the semiconductor chip during dicing-cut.
    Type: Grant
    Filed: March 16, 1999
    Date of Patent: July 3, 2001
    Assignee: Denso Corporation
    Inventors: Shinji Yoshihara, Sumitomo Inomata, Kinya Atsumi, Minekazu Sakai, Yasuki Shimoyama, Tetsuo Fujii
  • Patent number: 6245984
    Abstract: The display screen displays measure windows corresponding to the first through fourth measures for a melody to be composed. By clicking the play switch on the screen, a background accompaniment performance covering the four measures is played back to indicate the beats in the progressing tempo, thereby representing the rhythm speed. In time to the accompaniment progression, the user inputs note time points by tapping the input switch such as a space key in the keyboard to constitute a rhythm pattern for a melody progression. The measure window has a time axis in the horizontal direction and a pitch axis in the vertical direction. The tap-inputted note time points are exhibited at the corresponding positions along the time axis from left to right. Each point is dragged with the mouse pointer upward or downward to an intended pitch level, thereby establishing a pitch thereof.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: June 12, 2001
    Assignee: Yamaha Corporation
    Inventors: Eiichiro Aoki, Shinji Yoshihara, Masami Koizumi, Toshio Sugiura
  • Patent number: 6245593
    Abstract: A semiconductor device has a semiconductor wafer having sensing portions exposed on a surface thereof and an adhesive sheet attached to the semiconductor wafer as a protective cap to cover the sensing portions. The adhesive sheet is composed of a flat adhesive sheet and adhesive disposed generally on an entire surface of the adhesive sheet. Adhesion of the adhesive is selectively reduced by UV irradiation to have adhesion reduced regions, and the adhesion reduced regions face the sensing portions. The protective cap can be produced with high productivity, and securely protect the sensing portions when the semiconductor wafer is diced and is transported.
    Type: Grant
    Filed: November 24, 1999
    Date of Patent: June 12, 2001
    Assignee: Denso Corporation
    Inventors: Shinji Yoshihara, Yasuo Souki, Kinya Atsumi, Hiroshi Muto
  • Patent number: 6059902
    Abstract: An aluminum alloy containing Si: 1.5-12% (mass % here and hereinafter), Mg: 0.5-6% and, optionally, at least one of Mn: 0.5-2%, Cu: 0.15-3% and Cr: 0.04-0.35% and, further, containing Ti: 0.01-0.1% and the balance of Al and inevitable impurities, in which the average grain size of crystallized grains of Si system compounds is from 2 to 20 .mu.m and an area ratio thereof is from 2 to 12%. The alloy is melted to obtain a cast ingot having DAS (Dendrite Arm Spacing) of 10 to 50 .mu.m, which is then put to a soaking treatment at 450 to 520.degree. C. and then to extrusion molding. The aluminum alloy has excellent machinability with no addition of low melting metals.
    Type: Grant
    Filed: June 23, 1997
    Date of Patent: May 9, 2000
    Assignee: Kabushiki Kaisha Kobe Seiko Sho
    Inventors: Shinji Yoshihara, Masakazu Hirano
  • Patent number: 5835778
    Abstract: When a preinitialized load module 2 is modified, modifying command analysis means 401 registers modifying commands in a modifying command table 302, preinitialized load module loading means 402 loads a program portion 201 in a main memory 3, modifying command processing means 403 modifies a program image 301 according to the modifying command, preinitialized load module unloading means 404 reflects the image after modification to the program portion 201 and modifying command table unloading means 405 reflects the content of the modifying command table 302 to a modification history record portion 202.
    Type: Grant
    Filed: March 29, 1996
    Date of Patent: November 10, 1998
    Assignee: NEC Corporation
    Inventor: Shinji Yoshihara
  • Patent number: 5824177
    Abstract: A semiconductor wafer, which can be divided into chips at a high yield and a low cost and easily handled during transfer thereof as well, is disclosed. In a semiconductor wafer of such structure that structures with a low mechanical strength, such as suspended microstructures, are exposed at a surface thereof, detachable adhesive sheet making up protective caps for the respective suspended microstructures are formed over the semiconductor wafer. By means of this, even if the semiconductor wafer is diced into the individual chips, respective microstructures on chips are protected from the external force, such as the pressure of cutting water, during the dicing process.
    Type: Grant
    Filed: July 12, 1996
    Date of Patent: October 20, 1998
    Assignee: Nippondenso Co., Ltd.
    Inventors: Shinji Yoshihara, Sumitomo Inomata, Fumio Ohara, Takashi Kurahashi
  • Patent number: 5684995
    Abstract: One physical segment 30 is divided into a plurality of fixed-length logic segments 31, where a logic segment management table 22 for management each logic segment 31 is provided. In registering a subprogram 40, a smaller sized region is assigned to the logic segment 31 by a segment size decision means 11, a logic segment producing means 12, and a logic segment register means 13. In deleting the subprogram 40, the logic segment 31 which comes to a not-use status is deleted by a logic segment retrieval means 14 and a logic segment delete means 15.
    Type: Grant
    Filed: December 21, 1994
    Date of Patent: November 4, 1997
    Assignee: NEC Corporation
    Inventor: Shinji Yoshihara
  • Patent number: 5668033
    Abstract: On a silicon wafer there is formed a movable gate MOS transistor (sensing element: functional element). A bonding frame consisting of a silicon thin film is patterned around an element formation region on the surface of the silicon wafer. On a cap forming silicon wafer there is projectively provided a leg portion on the bottom surface of which a bonding layer consisting of a gold film is formed. The cap forming silicon wafer is disposed on the silicon wafer, whereupon heating with respect thereto is performed at a temperature equal to higher than a gold/silicon eutectic temperature to thereby make bondage between the bonding frame of the silicon wafer and the bonding layer of the cap forming silicon wafer. Thereafter, the both wafers are diced in chip units.
    Type: Grant
    Filed: May 17, 1996
    Date of Patent: September 16, 1997
    Assignee: Nippondenso Co., Ltd.
    Inventors: Fumio Ohara, Shinji Yoshihara, Katuhiko Kanamori, Takashi Kurahashi