Patents by Inventor Shinji Yuasa

Shinji Yuasa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11968909
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Grant
    Filed: July 7, 2023
    Date of Patent: April 23, 2024
    Assignee: Godo Kaisha IP Bridge 1
    Inventor: Shinji Yuasa
  • Patent number: 11959147
    Abstract: A top-blowing lance nozzle is configured to freely switch an adequate expansion condition so as to control an oxygen-blowing amount and a jetting velocity independently of each other without requiring a plurality of lance nozzles or a mechanically movable part. A lance nozzle is configured to blow refining oxygen to molten iron charged in a reaction vessel while a gas is blown from a top-blowing lance to the molten iron. One or more blowing holes for blowing a working gas are on an inner wall side surface of the nozzle, at a site where the lance nozzle has a minimum cross-sectional area in a nozzle axis direction or at a neighboring site of the site.
    Type: Grant
    Filed: April 2, 2020
    Date of Patent: April 16, 2024
    Assignee: JFE STEEL CORPORATION
    Inventors: Yumi Murakami, Nobuhiko Oda, Yusuke Fujii, Goro Okuyama, Shota Amano, Shinji Koseki, Shingo Sato, Yukio Takahashi, Ryo Kawabata, Naoki Kikuchi, Atsuo Yuasa
  • Publication number: 20230413685
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Application
    Filed: August 10, 2023
    Publication date: December 21, 2023
    Applicant: Godo Kaisha IP Bridge 1
    Inventor: Shinji YUASA
  • Publication number: 20230363288
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Application
    Filed: July 7, 2023
    Publication date: November 9, 2023
    Applicant: Godo Kaisha IP Bridge 1
    Inventor: Shinji YUASA
  • Patent number: 11737372
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Grant
    Filed: December 23, 2021
    Date of Patent: August 22, 2023
    Assignee: GODO KAISHA IP BRIDGE 1
    Inventor: Shinji Yuasa
  • Publication number: 20220115588
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Application
    Filed: December 23, 2021
    Publication date: April 14, 2022
    Applicants: Japan Science and Technology Agency, National Institute of Advanced Industrial Science and Technology
    Inventor: Shinji YUASA
  • Patent number: 11233193
    Abstract: A method of manufacturing a magnetoresistive random access memory (MRAM). The method includes forming a first CoFeB layer of the MTJ devices, the first CoFeB layer being amorphous and forming a magnesium oxide (MgO) layer of the MTJ devices over the first CoFeB layer. Further, there is a forming of a second CoFeB layer of the MTJ devices, the second CoFeB layer being amorphous over the MgO layer, and annealing the MTJ devices. The first and second CoFeB layers are crystallized by the annealing, and the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented.
    Type: Grant
    Filed: April 30, 2020
    Date of Patent: January 25, 2022
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventor: Shinji Yuasa
  • Patent number: 11133459
    Abstract: According to one embodiment, a magnetic element includes a first layer and a second layer. The first layer includes a first element and a second element. The first element includes at least one selected from the group consisting of Fe, Co, and Ni. The second element includes at least one selected from the group consisting of Ir and Os. The second layer is nonmagnetic.
    Type: Grant
    Filed: February 15, 2018
    Date of Patent: September 28, 2021
    Assignees: National Institute of Advanced Industrial Science and Technology, TOHOKU UNIVERSITY, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Takayuki Nozaki, Shinji Yuasa, Rachwal Anna Koziol, Masahito Tsujikawa, Masafumi Shirai, Kazuhiro Hono, Tadakatsu Ohkubo, Xiandong Xu
  • Patent number: 11031062
    Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.
    Type: Grant
    Filed: April 4, 2018
    Date of Patent: June 8, 2021
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Yoichi Shiota, Takayuki Nozaki, Shinji Yuasa
  • Patent number: 10998490
    Abstract: A magnetic element includes a first magnetic layer and a first nonmagnetic layer. An angle ?0 between a first direction and the magnetization direction of the first magnetic layer satisfies 0°<?0<90° or 90°<?0<180° in a state in which neither a voltage nor a magnetic field is substantially applied to the first magnetic layer; and the first direction is from the first nonmagnetic layer toward the first magnetic layer. A resistance·area of the first nonmagnetic layer is 10 ??m2 or more.
    Type: Grant
    Filed: April 5, 2018
    Date of Patent: May 4, 2021
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Rie Matsumoto, Takayuki Nozaki, Shinji Yuasa, Hiroshi Imamura
  • Publication number: 20210036217
    Abstract: According to one embodiment, a magnetic element includes a first layer and a second layer. The first layer includes a first element and a second element. The first element includes at least one selected from the group consisting of Fe, Co, and Ni. The second element includes at least one selected from the group consisting of Ir and Os. The second layer is nonmagnetic.
    Type: Application
    Filed: February 15, 2018
    Publication date: February 4, 2021
    Applicants: National Institute of Advanced Industrial Science and Technology, TOHOKU UNIVERSITY, NATIONAL INSTITUTE FOR MATERIALS SCIENCE
    Inventors: Takayuki NOZAKI, Shinji YUASA, Rachwal Anna KOZIOL, Masahito TSUJIKAWA, Masafumi SHIRAI, Kazuhiro HONO, Tadakatsu OHKUBO, Xiandong XU
  • Publication number: 20200259077
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Application
    Filed: April 30, 2020
    Publication date: August 13, 2020
    Applicants: Japan Science and Technology Agency, National Institute of Advanced Industrial Science and Technology
    Inventor: Shinji YUASA
  • Patent number: 10680167
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Grant
    Filed: June 18, 2019
    Date of Patent: June 9, 2020
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventor: Shinji Yuasa
  • Publication number: 20200052193
    Abstract: According to an embodiment of the invention, a magnetic element includes a first magnetic layer and a first nonmagnetic layer. An angle ?0 between a first direction and the magnetization direction of the first magnetic layer satisfies 0°<?0<90° or 90°<?0<180° in a state in which neither a voltage nor a magnetic field is substantially applied to the first magnetic layer; and the first direction is from the first nonmagnetic layer toward the first magnetic layer. A resistance·area of the first nonmagnetic layer is 10 ?·?m2 or more.
    Type: Application
    Filed: April 5, 2018
    Publication date: February 13, 2020
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Rie MATSUMOTO, Takayuki NOZAKI, Shinji YUASA, Hiroshi IMAMURA
  • Publication number: 20200035283
    Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.
    Type: Application
    Filed: April 4, 2018
    Publication date: January 30, 2020
    Applicant: National Institute of Advanced Industrial Science and Technology
    Inventors: Yoichi SHIOTA, Takayuki NOZAKI, Shinji YUASA
  • Publication number: 20200020851
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Application
    Filed: June 18, 2019
    Publication date: January 16, 2020
    Applicants: Japan Science and Technology Agency, National Institute of Advanced Industrial Science and Technology
    Inventor: Shinji YUASA
  • Patent number: 10431303
    Abstract: A resistance change type memory includes a variable resistance element connected between first and second bit lines and a write control circuit including first and second transistors each including a terminal connected to the first bit line. The write control circuit controls write to the variable resistance element. The write control circuit supplies a second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying a first voltage to the first bit line via the first transistor.
    Type: Grant
    Filed: November 30, 2017
    Date of Patent: October 1, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Takayuki Nozaki, Yoshishige Suzuki, Shinji Yuasa, Yoichi Shiota, Takurou Ikeura, Hiroki Noguchi, Kazutaka Ikegami
  • Patent number: 10432144
    Abstract: A high-frequency phase-locked oscillation circuit having an extremely narrow peak width and a stable frequency so that a high-frequency wave that is oscillated by the MR element solves a problem of a large peak width of oscillation spectrum. The high-frequency phase-locked oscillation circuit includes a magnetoresistive element that oscillates a high-frequency wave with an oscillating frequency; a reference signal source that outputs a reference signal with a reference frequency; a phase-locked loop circuit having a phase comparator, a loop filter, and a frequency divider; an adder that adds a phase error signal output from the loop filter and a bias voltage for oscillating the high-frequency wave from the magnetoresistive element, and that inputs an added bias voltage to the magnetoresistive element; and a filter provided between the frequency divider and the magnetoresistive element.
    Type: Grant
    Filed: April 27, 2016
    Date of Patent: October 1, 2019
    Assignee: National Institute of Advanced Industrial Science and Technology
    Inventors: Shingo Tamaru, Hitoshi Kubota, Akio Fukushima, Shinji Yuasa
  • Patent number: 10388347
    Abstract: Some embodiments are directed to a non-collinear magnetoresistive device, including a free layer; a fixed layer; and a non-magnetic layer disposed between the free layer and the fixed layer, wherein the fixed layer has an easy magnetization direction in an in-plane direction or in a perpendicular direction, the free layer satisfies at room temperature expressions (1) and (2) below: ERT?1.66×10?19 J??(1) V?5×104 nm3??(2) where ERT=(Ku1,eff+Ku2+Ku1,eff2/4Ku2)×V, Ku1,eff: an effective first-order anisotropy constant, Ku2: a second-order anisotropy constant, and V: a volume, and wherein the free layer is in a cone magnetization state.
    Type: Grant
    Filed: May 19, 2016
    Date of Patent: August 20, 2019
    Assignee: NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventors: Rie Matsumoto, Hiroko Arai, Shinji Yuasa, Hiroshi Imamura
  • Patent number: 10367138
    Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.
    Type: Grant
    Filed: February 9, 2017
    Date of Patent: July 30, 2019
    Assignees: JAPAN SCIENCE AND TECHNOLOGY AGENCY, NATIONAL INSTITUTE OF ADVANCED INDUSTRIAL SCIENCE AND TECHNOLOGY
    Inventor: Shinji Yuasa