Abstract: Provided is a magnetic storage device 10 comprising: a magnetoresistive element 11 having a structure in which a recording layer 13 that includes a first magnetic layer, a tunnel barrier layer 14, and a reference layer 15 that includes a second magnetic layer are laminated; and a control unit 12, wherein the in-plane shape of the recording layer 13 is such that a rectangle circumscribing the in-plane shape and having the smallest area has a short side and a long side which have mutually different lengths, and at the time of writing to the recording layer 13, the control unit 12 applies a voltage pulse to the magnetoresistive element 11 while applying an effective magnetic field in the direction of the short side in the plane of the recording layer 13.

Abstract: A magnetoresistive element according to the present embodiment includes a first magnetic layer (11) stacked on a base layer (10), a second magnetic layer (13), and a first nonmagnetic layer (12) arranged between the first magnetic layer (11) and the second magnetic layer (13). The first nonmagnetic layer (12) includes an insulating material including fluorine.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: A method of manufacturing a magnetoresistive random access memory (MRAM). The method includes forming a first CoFeB layer of the MTJ devices, the first CoFeB layer being amorphous and forming a magnesium oxide (MgO) layer of the MTJ devices over the first CoFeB layer. Further, there is a forming of a second CoFeB layer of the MTJ devices, the second CoFeB layer being amorphous over the MgO layer, and annealing the MTJ devices. The first and second CoFeB layers are crystallized by the annealing, and the MgO layer is poly-crystalline in which a (001) crystal plane is preferentially oriented.

Abstract: According to one embodiment, a magnetic element includes a first layer and a second layer. The first layer includes a first element and a second element. The first element includes at least one selected from the group consisting of Fe, Co, and Ni. The second element includes at least one selected from the group consisting of Ir and Os. The second layer is nonmagnetic.

Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.

Abstract: A magnetic element includes a first magnetic layer and a first nonmagnetic layer. An angle ?0 between a first direction and the magnetization direction of the first magnetic layer satisfies 0°<?0<90° or 90°<?0<180° in a state in which neither a voltage nor a magnetic field is substantially applied to the first magnetic layer; and the first direction is from the first nonmagnetic layer toward the first magnetic layer. A resistance·area of the first nonmagnetic layer is 10 ??m2 or more.

Abstract: According to one embodiment, a magnetic element includes a first layer and a second layer. The first layer includes a first element and a second element. The first element includes at least one selected from the group consisting of Fe, Co, and Ni. The second element includes at least one selected from the group consisting of Ir and Os. The second layer is nonmagnetic.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: According to an embodiment of the invention, a magnetic element includes a first magnetic layer and a first nonmagnetic layer. An angle ?0 between a first direction and the magnetization direction of the first magnetic layer satisfies 0°<?0<90° or 90°<?0<180° in a state in which neither a voltage nor a magnetic field is substantially applied to the first magnetic layer; and the first direction is from the first nonmagnetic layer toward the first magnetic layer. A resistance·area of the first nonmagnetic layer is 10 ?·?m2 or more.

Abstract: According to one embodiment, a magnetic memory device includes a stacked body and a controller. The stacked body includes a first conductive layer, a second conductive layer, a first magnetic layer provided between the first conductive layer and the second conductive layer, a second magnetic layer provided between the first magnetic layer and the second conductive layer, and a nonmagnetic layer provided between the first magnetic layer and the second magnetic layer. A resistance value per unit area of the nonmagnetic layer exceeds 20 ??m2. The controller is electrically connected to the first conductive layer and the second conductive layer, and supplies a write pulse to the stacked body in a first operation.

Abstract: The output voltage of an MRAM is increased by means of an Fe(001)/MgO(001)/Fe(001) MTJ device, which is formed by microfabrication of a sample prepared as follows: A single-crystalline MgO (001) substrate is prepared. An epitaxial Fe(001) lower electrode (a first electrode) is grown on a MgO(001) seed layer at room temperature, followed by annealing under ultrahigh vacuum. A MgO(001) barrier layer is epitaxially formed on the Fe(001) lower electrode (the first electrode) at room temperature, using a MgO electron-beam evaporation. A Fe(001) upper electrode (a second electrode) is then formed on the MgO(001) barrier layer at room temperature. This is successively followed by the deposition of a Co layer on the Fe(001) upper electrode (the second electrode). The Co layer is provided so as to increase the coercive force of the upper electrode in order to realize an antiparallel magnetization alignment.

Abstract: A high-frequency phase-locked oscillation circuit having an extremely narrow peak width and a stable frequency so that a high-frequency wave that is oscillated by the MR element solves a problem of a large peak width of oscillation spectrum. The high-frequency phase-locked oscillation circuit includes a magnetoresistive element that oscillates a high-frequency wave with an oscillating frequency; a reference signal source that outputs a reference signal with a reference frequency; a phase-locked loop circuit having a phase comparator, a loop filter, and a frequency divider; an adder that adds a phase error signal output from the loop filter and a bias voltage for oscillating the high-frequency wave from the magnetoresistive element, and that inputs an added bias voltage to the magnetoresistive element; and a filter provided between the frequency divider and the magnetoresistive element.

Abstract: A resistance change type memory includes a variable resistance element connected between first and second bit lines and a write control circuit including first and second transistors each including a terminal connected to the first bit line. The write control circuit controls write to the variable resistance element. The write control circuit supplies a second voltage to the first bit line with a first pulse width via the second transistor in the ON state after supplying a first voltage to the first bit line via the first transistor.