Patents by Inventor Shinnosuke Soda

Shinnosuke Soda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 10566316
    Abstract: Provided are a semiconductor device which is provided with a circuit board and capable of suppressing an increase in its footprint, and a power conversion apparatus including the semiconductor device. The semiconductor device includes a circuit board, a power semiconductor element, an insulating block, a control signal terminal, a first main terminal, and a second main terminal. The insulating block is disposed so as to surround the power semiconductor element. The control signal terminal is inserted into the insulating block and thereby fixed to the insulating block. The control signal terminal includes a bent portion which partially protrudes above the power semiconductor element from the insulating block, and is bonded to the power semiconductor element. The first main terminal is bonded to the same power semiconductor element as the power semiconductor element to which the control signal terminal is bonded. The second main terminal is bonded to the circuit board.
    Type: Grant
    Filed: January 16, 2018
    Date of Patent: February 18, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yo Tanaka, Shinnosuke Soda
  • Patent number: 10510640
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes an insulating substrate, a semiconductor chip, a plate member, and a cooler. The insulating substrate includes insulating ceramics serving as an insulating plate, and conductive plates provided on opposite surfaces of the insulating ceramics. The semiconductor chip is provided on an upper surface of the insulating substrate. The plate member is bonded to a lower surface of the insulating substrate. The cooler is bonded to a lower surface of the plate member. At least one of bonding between a lower surface of the insulating substrate and the plate member and bonding between a lower surface of the plate member and the cooler is performed via a bonding member composed mainly of tin. Also, a cyclic stress of the plate member is smaller than a tensile strength of the bonding member.
    Type: Grant
    Filed: September 14, 2015
    Date of Patent: December 17, 2019
    Assignee: Miitsubishi Electric Corporation
    Inventors: Hiroshi Kobayashi, Shinnosuke Soda, Yohei Omoto, Komei Hayashi
  • Publication number: 20190326262
    Abstract: Provided are a semiconductor device which is provided with a circuit board and capable of suppressing an increase in its footprint, and a power conversion apparatus including the semiconductor device. The semiconductor device includes a circuit board, a power semiconductor element, an insulating block, a control signal terminal, a first main terminal, and a second main terminal. The insulating block is disposed so as to surround the power semiconductor element. The control signal terminal is inserted into the insulating block and thereby fixed to the insulating block. The control signal terminal includes a bent portion which partially protrudes above the power semiconductor element from the insulating block, and is bonded to the power semiconductor element. The first main terminal is bonded to the same power semiconductor element as the power semiconductor element to which the control signal terminal is bonded. The second main terminal is bonded to the circuit board.
    Type: Application
    Filed: January 16, 2018
    Publication date: October 24, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yo TANAKA, Shinnosuke SODA
  • Patent number: 10418295
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Grant
    Filed: November 4, 2016
    Date of Patent: September 17, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Shinnosuke Soda, Narihito Ota, Kazuyasu Nishikawa, Akihisa Fukumoto
  • Publication number: 20190279943
    Abstract: A power semiconductor device having a high degree of reliability even when an operable temperature of a power semiconductor element is sufficiently increased. The power semiconductor device includes: a power semiconductor element including an electrode formed on a first surface; a first stress mitigation portion connected to the electrode with a first bonding portion being interposed; and a wiring portion electrically connected to the first stress mitigation portion with a second bonding portion being interposed. A bonding strength of the first bonding portion is higher than a bonding strength of the second bonding portion.
    Type: Application
    Filed: July 6, 2017
    Publication date: September 12, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinnosuke SODA, Yoshinori YOKOYAMA, Hiroshi KOBAYASHI
  • Publication number: 20190122955
    Abstract: Provided is a semiconductor device having high heat conductivity and high productivity. A semiconductor device includes an insulating substrate, a semiconductor element, a die-bond material, a joining material, and a cooler. The insulating substrate has an insulating ceramic, a first conductive plates disposed on one surface of the insulating ceramic, and a second conductive plate disposed on another surface of the insulating ceramic. The semiconductor element is disposed on the first conductive plate through the die-bond material. The die-bond material contains sintered metal. The semiconductor element has a bending strength degree of 700 MPa or more, and has a thickness of 0.05 mm or more and 0.1 mm or less. The cooler is joined to the second conductive plate through the joining material.
    Type: Application
    Filed: October 31, 2016
    Publication date: April 25, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Motoru YOSHIDA, Yoshiyuki SUEHIRO, Kazuyuki SUGAHARA, Yosuke NAKANISHI, Yoshinori YOKOYAMA, Shinnosuke SODA, Komei HAYASHI
  • Publication number: 20190067165
    Abstract: A power module includes a first power semiconductor device including a first electrode, a resin frame including first receiving portions, and a first leadframe. The first leadframe has a first main surface facing the first electrode and is electrically and mechanically connected to the first electrode. The first receiving portions face the first main surface of the first leadframe and receive part of the first leadframe. Thus, the power module has high reliability and can be miniaturized.
    Type: Application
    Filed: February 7, 2017
    Publication date: February 28, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinnosuke SODA, Hiroshi KOBAYASHI
  • Patent number: 10170433
    Abstract: An insulated circuit board includes an insulated substrate, a first electrode, and a second electrode. A thin portion is formed in a corner portion, the corner portion being a region occupying, with regard to directions along outer edges from a vertex of at least one of the first and second electrodes in plan view, a portion of a length of the outer edges, and the thin portion has a thickness smaller than that of a region other than the thin portion. The thin portion in at least one of the first and second electrodes has a planar shape surrounded by first and second sides orthogonal to each other as portions of the outer edges from the vertex, and a curved portion away from the vertex of the first and second sides.
    Type: Grant
    Filed: October 13, 2015
    Date of Patent: January 1, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shinnosuke Soda, Yohei Omoto, Komei Hayashi, Shinji Tsukamoto, Yasumichi Hatanaka
  • Publication number: 20180366383
    Abstract: A power module includes an insulated circuit board, a semiconductor element, a first buffer plate, and first and second joining materials. The semiconductor element is disposed on a side of one main surface of the insulated circuit board. The first buffer plate is disposed between the insulated circuit board and the semiconductor element. The first joining material is divided into a plurality of portions in a plan view. The first buffer plate is higher in coefficient of linear expansion than the semiconductor element and lower in coefficient of linear expansion than the insulated circuit board. The first buffer plate is lower in Young's modulus than the semiconductor element.
    Type: Application
    Filed: November 4, 2016
    Publication date: December 20, 2018
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori YOKOYAMA, Shinnosuke SODA, Narihito OTA, Kazuyasu NISHIKAWA, Akihisa FUKUMOTO
  • Publication number: 20170338189
    Abstract: An insulated circuit board includes an insulated substrate, a first electrode, and a second electrode. A thin portion is formed in a corner portion, the corner portion being a region occupying, with regard to directions along outer edges from a vertex of at least one of the first and second electrodes in plan view, a portion of a length of the outer edges, and the thin portion has a thickness smaller than that of a region other than the thin portion. The thin portion in at least one of the first and second electrodes has a planar shape surrounded by first and second sides orthogonal to each other as portions of the outer edges from the vertex, and a curved portion away from the vertex of the first and second sides.
    Type: Application
    Filed: October 13, 2015
    Publication date: November 23, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Shinnosuke SODA, Yohei OMOTO, Komei HAYASHI, Shinji TSUKAMOTO, Yasumichi HATANAKA
  • Publication number: 20170309544
    Abstract: A semiconductor device and a method for manufacturing the semiconductor device. The semiconductor device includes an insulating substrate, a semiconductor chip, a plate member, and a cooler. The insulating substrate includes insulating ceramics serving as an insulating plate, and conductive plates provided on opposite surfaces of the insulating ceramics. The semiconductor chip is provided on an upper surface of the insulating substrate. The plate member is bonded to a lower surface of the insulating substrate. The cooler is bonded to a lower surface of the plate member. At least one of bonding between a lower surface of the insulating substrate and the plate member and bonding between a lower surface of the plate member and the cooler is performed via a bonding member composed mainly of tin. Also, a cyclic stress of the plate member is smaller than a tensile strength of the bonding member.
    Type: Application
    Filed: September 14, 2015
    Publication date: October 26, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventors: Hiroshi KOBAYASHI, Shinnosuke SODA, Yohei OMOTO, Komei HAYASHI
  • Patent number: 9666519
    Abstract: A power semiconductor module includes: a plurality of semiconductor element substrates disposed on the same plane, each of which includes an insulating substrate with a front-side electrode formed on one of the surfaces of an insulator plate and a back-side electrode formed on the other surface of the insulator plate and a power semiconductor element fixed on a surface of the front-side electrode; and a wiring member that electrically connects with each other the semiconductor element substrates adjacent to each other; and the semiconductor element substrates and the wiring member are molded with mold resin; wherein the mold resin is provided with a recessed part, between the insulating substrates adjacent to each other, which is not filled with the resin constituting the mold resin to a predetermined depth from the side of the back-side electrode.
    Type: Grant
    Filed: November 5, 2014
    Date of Patent: May 30, 2017
    Assignee: Mitsubishi Electric Corporation
    Inventor: Shinnosuke Soda
  • Publication number: 20170053861
    Abstract: A power semiconductor module includes: a plurality of semiconductor element substrates disposed on the same plane, each of which includes an insulating substrate with a front-side electrode formed on one of the surfaces of an insulator plate and a back-side electrode formed on the other surface of the insulator plate and a power semiconductor element fixed on a surface of the front-side electrode; and a wiring member that electrically connects with each other the semiconductor element substrates adjacent to each other; and the semiconductor element substrates and the wiring member are molded with mold resin; wherein the mold resin is provided with a recessed part, between the insulating substrates adjacent to each other, which is not filled with the resin constituting the mold resin to a predetermined depth from the side of the back-side electrode.
    Type: Application
    Filed: November 5, 2014
    Publication date: February 23, 2017
    Applicant: Mitsubishi Electric Corporation
    Inventor: Shinnosuke SODA
  • Patent number: 9508564
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Grant
    Filed: July 19, 2013
    Date of Patent: November 29, 2016
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Publication number: 20150243530
    Abstract: A plurality of semiconductor element is formed on a substrate. A plurality of sealing windows and a support portion supporting the plurality of sealing windows are formed on a SOI substrate. The SOI substrate is pressured against the substrate by using a pressurizing member and the plurality of sealing windows of the SOI substrate is bonded to the substrate via a low melting point glass member arranged around the plurality of semiconductor elements. The support portion is separated from the plurality of sealing windows bonded to the substrate.
    Type: Application
    Filed: July 19, 2013
    Publication date: August 27, 2015
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoshinori Yokoyama, Kazuyo Endo, Jun Fujita, Shinnosuke Soda, Kazuyasu Nishikawa, Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue
  • Patent number: 8816493
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Grant
    Filed: June 19, 2013
    Date of Patent: August 26, 2014
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Publication number: 20140175615
    Abstract: A method for manufacturing a semiconductor device includes: forming a semiconductor element on a main surface of a substrate; forming a low melting glass film having a melting point of 450° C. or less on the main surface and the semiconductor element; heat treating the substrate while pressing the low melting glass film toward the main surface of the substrate with a pressurizing jig that is insulating or semi-insulating, and sintering the low melting glass film; and leaving the pressurizing jig on the low melting glass film after sintering the low melting glass film.
    Type: Application
    Filed: September 25, 2013
    Publication date: June 26, 2014
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Yoshinori Yokoyama, Shinnosuke Soda
  • Publication number: 20140077280
    Abstract: A semiconductor device includes: a substrate; a semiconductor element on the substrate; an interconnection on the substrate and electrically connected to the semiconductor element; a window frame member on the substrate, surrounding the semiconductor element, and in contact with the interconnection; and a sealing window bonded to the window frame member and encapsulating the semiconductor element. The window frame member is a low melting glass and has a sheet resistance of 106-1010 ?/?.
    Type: Application
    Filed: June 19, 2013
    Publication date: March 20, 2014
    Inventors: Yoichi Nogami, Yoshitsugu Yamamoto, Akira Inoue, Yoshinori Yokoyama, Jun Fujita, Kazuyo Endo, Shinnosuke Soda, Kazuyasu Nishikawa
  • Patent number: 7894205
    Abstract: There is provided a variable device circuit according to the present invention, including: a substrate; at least one movable switch device formed on a first principal surface of the substrate; at least one fixed capacitor device formed on the first principal surface of the substrate; at least one variable capacitor device formed on the first principal surface of the substrate; at least one variable inductor device formed on the first principal surface of the substrate; and wiring lines for electrically connecting the devices to one another, the wiring lines being formed on the first principal surface of the substrate; wherein electrical connections among the devices can be selected by operation of the movable switch device, whereby achieving stable, low-loss circuit characteristics with lower manufacturing cost.
    Type: Grant
    Filed: March 20, 2008
    Date of Patent: February 22, 2011
    Assignee: Mitsubishi Electric Corporation
    Inventors: Sangseok Lee, Yukihisa Yoshida, Tamotsu Nishino, Hiromoto Inoue, Shinnosuke Soda, Moriyasu Miyazaki
  • Patent number: 7675383
    Abstract: A switch circuit includes: a first input and output terminal; a first inductor connected with the first input and output terminal; a capacitor connected with the first inductor; a second input and output terminal connected with the capacitor; a first MEMS switch connected with one end of the capacitor; a second MEMS switch connected with the other end of the capacitor; and a second inductor connected between the first MEMS switch and the second MEMS switch, and satisfies a relationship of f=1/(2??CL1)=1/(2??CL2), where L1 is an inductance of the first inductor, L2 is an inductance of the second inductor, C is a capacitance of the capacitor, and f is a use frequency.
    Type: Grant
    Filed: January 27, 2005
    Date of Patent: March 9, 2010
    Assignee: Mitsubishi Electric Corporation
    Inventors: Masatake Hangai, Tamotsu Nishino, Shinnosuke Soda, Kenichi Miyaguchi, Kenji Kawakami, Masaomi Tsuru, Satoshi Hamano, Moriyasu Miyazaki, Tadashi Takagi