Patents by Inventor Shintaro Aoyama

Shintaro Aoyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6730613
    Abstract: A method of reducing by-product deposition inside wafer processing equipment includes providing a chamber having a peripheral inner wall and placing a semiconductor wafer within the chamber. The method also includes placing a ring within the chamber proximate the peripheral inner wall and introducing a plurality of reactant gases into the chamber and reacting the gases. The method also includes introducing a heated gas into the chamber through the ring proximate the peripheral inner wall to increase the temperature of the peripheral inner wall.
    Type: Grant
    Filed: July 15, 1999
    Date of Patent: May 4, 2004
    Assignee: Texas Instruments Incorporated
    Inventors: Ming Jang Hwang, Keizo Hosoda, Shintaro Aoyama, Tadashi Terasaki, Tsuyoshi Tamaru
  • Publication number: 20040053472
    Abstract: This method for film formation has a first step of forming a first insulation film, the essential component of which is a material having a first dielectric constant, on the surface of a semiconductor substrate and a second step of forming a second insulation film, the essential component of which is a material having a second dielectric constant larger than the first dielectric constant, on the first insulation film to be thicker than this first insulation film. Since the process of forming a film of a high dielectric constant material that constitutes the second insulation film is executed successively, following the formation of a barrier layer that is the first insulation film, it is possible to form a gate of a high dielectric constant material stable to the substrate.
    Type: Application
    Filed: October 14, 2003
    Publication date: March 18, 2004
    Inventors: Hideki Kiryu, Tsuyoshi Takahashi, Shintaro Aoyama, Hiroshi Shinriki, Masanobu Igeta
  • Publication number: 20040023513
    Abstract: A radical source is movably provided in a processing vessel holding a substrate, and the location or driving energy of the radical source is set such that the film formed on the substrate has a uniform thickness. Further, a radical source is provided at a first side of the substrate and a radical flow is formed such that the radical flow flows from the first side of the substrate surface to the other side. By optimizing the condition of the radical flow, the film formed on the substrate has a uniform thickness.
    Type: Application
    Filed: June 13, 2003
    Publication date: February 5, 2004
    Inventors: Shintaro Aoyama, Hiroshi Shinriki, Masanobu Igeta
  • Publication number: 20040005408
    Abstract: A method of forming a dielectric film on a Si substrate comprises the steps of adsorbing a gaseous molecular compound of a metal element constituting a dielectric material on a Si substrate, and causing a decomposition of the gaseous molecular compound thus adsorbed by a hydrolysis process or pyrolytic decomposition process or an oxidation process.
    Type: Application
    Filed: December 6, 2002
    Publication date: January 8, 2004
    Inventors: Hideki Kiryu, Shintaro Aoyama, Tsuyoshi Takahashi, Hiroshi Shinriki
  • Publication number: 20030170945
    Abstract: A method of nitriding an insulation film, includes the steps of forming nitrogen radicals by high-frequency plasma, and causing nitridation in a surface of an insulation film containing therein oxygen, by supplying the nitrogen radicals to the surface of the insulation film.
    Type: Application
    Filed: December 6, 2002
    Publication date: September 11, 2003
    Applicant: Tokyo Electron Limited
    Inventors: Masanobu Igeta, Shintaro Aoyama, Hiroshi Shinriki, Tsuyoshi Takahashi
  • Patent number: 6617207
    Abstract: A stacked gate insulating film comprises a silicon oxide film and a tantalum oxide film which is stacked on the silicon oxide film and whose dielectric constant is higher than a dielectric constant of the silicon oxide film. The stacked gate insulating film is formed in accordance with the following steps. A semiconductor wafer is heated up, and the surface thereof is heat-oxidized. The silicon oxide film is formed on the semiconductor wafer (heat oxidation process). The silicon oxide film is etched back so as to be made thin (etch back process). The tantalum oxide film is stacked on the thin silicon oxide film (dielectric film formation process), thereby to form the stacked gate insulating film.
    Type: Grant
    Filed: September 14, 2000
    Date of Patent: September 9, 2003
    Assignee: Tokyo Electron Limited
    Inventors: Hideki Kiryu, Shintaro Aoyama
  • Publication number: 20030073278
    Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are movable among them, and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.
    Type: Application
    Filed: April 11, 2002
    Publication date: April 17, 2003
    Inventors: Tadahiro Ohmi, Takashi Imaoka, Hisayuki Shimada, Nobuhiro Konishi, Mizuho Morita, Takeo Yamashita, Tadashi Shibata, Hidetoshi Wakamatsu, Jinzo Watanabe, Shintaro Aoyama, Masakazu Nakamura
  • Patent number: 6467491
    Abstract: A pretreatment chamber 120 is disposed within a vacuum transfer chamber 102 of a processing apparatus 100. The pretreatment chamber 120 is equipped with an orienting mechanism 128 and a UV lamp 124. The orienting mechanism 128 orients a wafer W through rotation of a table 130, on which the wafer W is placed, and by use of an optical sensor 134. Synchronously with the orientation, the UV lamp 124 emits UV through a UV transmission window 126 fitted to a ceiling portion of the pretreatment chamber 120, to thereby irradiate the surface of the wafer W with UV. Thus adhering to the wafer W is removed. A processing gas supplied into the pretreatment chamber 120 is also irradiated with UV. Active atoms generated from the processing gas also contribute to removal of carbon. Since the pretreatment chamber 120 is formed within the vacuum transfer chamber 102, the footprint of the processing apparatus can be reduced.
    Type: Grant
    Filed: August 3, 2000
    Date of Patent: October 22, 2002
    Assignee: Tokyo Electron Limited
    Inventors: Masahito Sugiura, Hiroshi Shinriki, Hideki Kiryu, Shintaro Aoyama
  • Publication number: 20010000146
    Abstract: A method of reducing by-product deposition inside wafer processing equipment includes providing a chamber having a peripheral inner wall and placing a semiconductor wafer within the chamber. The method also includes placing a ring within the chamber proximate the peripheral inner wall and introducing a plurality of reactant gases into the chamber and reacting the gases. The method also includes introducing a heated gas into the chamber through the ring proximate the peripheral inner wall to increase the temperature of the peripheral inner wall.
    Type: Application
    Filed: December 4, 2000
    Publication date: April 5, 2001
    Inventors: Ming Jang Hwang, Keizo Hosoda, Shintaro Aoyama, Tadashi Terasaki, Tsuyoshi Tamaru
  • Patent number: 6194292
    Abstract: A method of fabricating in-situ doped rough polycrystalline silicon in a single process in a single wafer reactor is disclosed. The method includes substantially simultaneously flowing SiH4, PH3, and H2 in the single wafer reactor under predetermined temperature and pressure conditions and gas flow rates that result in nucleation and growth of a rugged polycrystalline silicon.
    Type: Grant
    Filed: August 20, 1999
    Date of Patent: February 27, 2001
    Assignee: Texas Instruments Incorporated
    Inventors: Robert Yung-Hsi Tsu, Shintaro Aoyama, Toshio Ando
  • Patent number: 6146135
    Abstract: Vacuum processing equipment capable of preventing particles from sticking to objects to be processed in vacuum vessels. The vacuum equipment comprises a series of vacuum vessels separated by doors, and the pressure in the vessels are reducible respectively. The vessels are so configured that objects to be processed are movable among them, and there is provided light projection means for projecting ultra rays on gases introduced to at least of the vessels.
    Type: Grant
    Filed: July 9, 1996
    Date of Patent: November 14, 2000
    Assignees: Tadahiro Ohmi, Takasago Netsugaku Kogyo Kabushiki Kaisha
    Inventors: Jinzo Watanabe, Takeo Yamashita, Masakazu Nakamura, Shintaro Aoyama, Hidetoshi Wakamatsu, Tadashi Shibata, Tadahiro Ohmi, Nobuhiro Konishi, Mizuho Morita, Hisayuki Shimada, Takashi Imaoka