Patents by Inventor Shintaro Nakano
Shintaro Nakano has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20130277646Abstract: According to one embodiment, a display panel includes a substrate, a switching element, a pixel electrode, an organic light emitting layer, an opposite electrode, a detecting electrode, and an insulating layer. The substrate has a major surface. The switching element is provided on the major surface. The switching element includes a semiconductor layer. The pixel electrode is provided on the major surface. The pixel electrode is electrically connected to the switching element. The organic light emitting layer is provided on the pixel electrode. The opposite electrode is provided on the organic light emitting layer. The detecting electrode is provided between the substrate and at least a part of the pixel electrode. The detecting electrode includes at least one element included in the semiconductor layer. The insulating layer is provided between the pixel electrode and the detecting electrode.Type: ApplicationFiled: December 20, 2012Publication date: October 24, 2013Inventors: Nobuyoshi SAITO, Tomomasa Ueda, Hajime Yamaguchi, Kentaro Miura, Shintaro Nakano, Tatsunori Sakano
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Patent number: 8525182Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; a source electrode and a drain electrode provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source electrode and the drain electrode above the gate electrode.Type: GrantFiled: February 3, 2012Date of Patent: September 3, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
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Patent number: 8513040Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.Type: GrantFiled: May 30, 2012Date of Patent: August 20, 2013Assignee: Kabushiki Kaisha ToshibaInventors: Tatsunori Sakano, Kentaro Miura, Nobuyoshi Saito, Shintaro Nakano, Tomomasa Ueda, Hajime Yamaguchi
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Publication number: 20130078752Abstract: According to one embodiment, a method is disclosed for manufacturing a display device. A film material layer is formed on a support substrate. A first heating process for the film material layer at a first temperature to form a film layer and a second heating process for a second region surrounding a first region at a second temperature higher than the first temperature are performed. The first region is provided in a central part of the film layer. A display layer is formed in the first region and a peripheral circuit section is formed at least in a part of the second region. A third heating process is performed for at least a part of the film layer at a third temperature higher than the second temperature. In addition, the film layer is peeled off from the support substrate.Type: ApplicationFiled: May 30, 2012Publication date: March 28, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Tatsunori SAKANO, Kentaro MIURA, Nobuyoshi SAITO, Shintaro NAKANO, Tomomasa UEDA, Hajime YAMAGUCHI
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Publication number: 20130075719Abstract: According to one embodiment, a thin film transistor includes a substrate, a gate electrode, a first insulating film, an oxide semiconductor film, a second insulating film, a source electrode, and a drain electrode. The gate electrode is provided on a part of the substrate. The first insulating film covers the gate electrode. The oxide semiconductor film is provided on the gate electrode via the first insulating film. The second insulating film is provided on a part of the oxide semiconductor film. The source and drain electrodes are respectively connected to first and second portions of the oxide semiconductor film not covered with the second insulating film. The oxide semiconductor film includes an oxide semiconductor. Concentrations of hydrogen contained in the first and second insulating films are not less than 5×1020 atm/cm3, and not more than 1019 atm/cm3, respectively.Type: ApplicationFiled: May 30, 2012Publication date: March 28, 2013Applicant: Kabushiki Kaisha ToshibaInventors: Shintaro NAKANO, Tomomasa UEDA, Kentaro MIURA, Nobuyoshi SAITO, Tatsunori SAKANO, Hajime YAMAGUCHI
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Publication number: 20120242562Abstract: According to one embodiment, a display device includes an insulating layer, a display unit, and an organic EL layer. The display unit is provided on a major surface of the insulating layer and includes a plurality of gate lines, a plurality of signal lines, a plurality of power source lines and a plurality of pixel units arranged in a matrix configuration. The EL layer is provided on the display unit. Each pixel unit includes a drive transistor and a resistor. The drive transistor includes a drive gate electrode, a drive source electrode, and a drive drain electrode. The drive source electrode or the drive drain electrode is connected to one of the power source lines. An end of the resistor is connected to the drive gate electrode. An other end of the resistor is connected to one of the gate line, the signal line, and the power source line.Type: ApplicationFiled: September 21, 2011Publication date: September 27, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Nobuyoshi SAITO, Tomomasa Ueda, Hajime Yamaguchi, Kentaro Miura, Shintaro Nakano, Tatsunori Sakano
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Publication number: 20120223301Abstract: According to one embodiment, a thin film transistor includes: a substrate; a semiconductor layer; first and second insulating films; and gate, source and drain electrodes. The semiconductor layer is provided on the substrate. The semiconductor layer is made of an oxide having indium. The semiconductor layer has first and second regions and other region. The first insulating film covers a top face of the other region. The second insulating film covers at least a pair of side surfaces of the semiconductor layer. The second insulating film is formed under a condition different from that for the first insulating film. The gate electrode is provided on the first and second insulating films or below the semiconductor layer. The source and drain electrodes are provided on the first and second regions, respectively. The drain and source electrodes sandwich the pair of the side surfaces of the semiconductor layer.Type: ApplicationFiled: September 21, 2011Publication date: September 6, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Tomomasa Ueda, Shintaro Nakano, Nobuyoshi Saito, Kentaro Miura, Yujiro Hara, Hajime Yamaguchi
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Publication number: 20120211745Abstract: According to one embodiment, a thin film transistor includes a gate electrode, a semiconductor layer, a gate insulating film, and a source electrode and a drain electrode. The semiconductor layer includes an oxide including at least one of gallium and zinc, and indium. The gate insulating film is provided between the gate electrode and the semiconductor layer. The source electrode and a drain electrode are electrically connected to the semiconductor layer and spaced from each other. The semiconductor layer includes a plurality of fine crystallites dispersed three-dimensionally in the semiconductor layer and has periodicity in arrangement of atoms.Type: ApplicationFiled: March 2, 2012Publication date: August 23, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Tomomasa Ueda, Shintaro Nakano, Nobuyoshi Saito, Yujiro Hara, Shuichi Uchikoga
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Publication number: 20120132909Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; a source electrode and a drain electrode provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source electrode and the drain electrode above the gate electrode.Type: ApplicationFiled: February 3, 2012Publication date: May 31, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
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Publication number: 20120075260Abstract: According to one embodiment, an active-matrix organic EL display device includes a display region and a peripheral region. The display region includes a plurality of pixels disposed in a matrix configuration. The peripheral region includes a drive circuit. The pixel includes a bottom gate-type first transistor, a cathode electrode, an anode electrode, and an organic EL layer provided between the cathode electrode and the anode electrode. The drive circuit includes a bottom gate-type second transistor and a back gate electrode provided on the second transistor. A gate potential of the first transistor is lower than a potential of the cathode electrode when the pixel displays a minimum luminance.Type: ApplicationFiled: March 18, 2011Publication date: March 29, 2012Applicant: Kabushiki Kaisha ToshibaInventors: Nobuyoshi SAITO, Yujiro Hara, Tomomasa Ueda, Shintaro Nakano, Kentaro Miura
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Publication number: 20120058601Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; source and drain electrodes provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source and drain electrodes above the gate electrode.Type: ApplicationFiled: November 10, 2011Publication date: March 8, 2012Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Nobuyoshi Saito, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
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Publication number: 20100127266Abstract: A thin film transistor includes: an insulating layer; a gate electrode provided on the insulating layer; a gate insulating film provided on the gate electrode; a semiconductor layer provided on the gate insulating film, the semiconductor layer being formed of oxide; a source electrode and a drain electrode provided on the semiconductor layer; and a channel protecting layer provided between the source and drain electrodes and the semiconductor layer. The source electrode is opposed to one end of the gate electrode. The drain electrode is opposed to another end of the gate electrode. The another end is opposite to the one end. The drain electrode is apart from the source electrode. The channel protecting layer covers at least a part of a side face of a part of the semiconductor layer. The part of the semiconductor layer is not covered with the source electrode and the drain electrode above the gate electrode.Type: ApplicationFiled: November 17, 2009Publication date: May 27, 2010Applicant: KABUSHIKI KAISHA TOSHIBAInventors: Nobuyoshi SAITO, Tomomasa Ueda, Shintaro Nakano, Shuichi Uchikoga
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Patent number: 4801386Abstract: A porous water-treating material comprising cut porous strands each comprising a resinous matrix material which consists essentially of a thermoplastic polymer material or a mixture thereof with an inorganic particulate material. Each strand having a number of pores connected to each other and an irregularly rugged peripheral surface which has a ratio in diameter of a circumscribed circle to an inscribed circle in any cross-sectional profile from 1.10:1 to 5.00:1 and a ratio of the distance between circumscribed lines to that between inscribed lines in any side projection profile of from 1.10:1 to 3.00:1. The cut porous strands are prepared by melt-extruding a resinous mixture of the resinous matrix material with a blowing agent at a temperature higher than the melting point of the thermoplastic polymer material and the thermally decomposing point of the blowing material so as to cause the strands to have a number of pores and an irregularly rugged peripheral surface thereof.Type: GrantFiled: April 13, 1988Date of Patent: January 31, 1989Assignee: Mitsubishi Rayon Co., Ltd.Inventors: Shuichi Sugimori, Tomihiko Kawamura, Tadashi Matsuda, Shintaro Nakano, deceased, Sumito Saiki, Hideaki Habara