Patents by Inventor Shinya Sasagawa

Shinya Sasagawa has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20230027402
    Abstract: A semiconductor device with a small variation in characteristics is provided. The semiconductor device includes a first insulator; a second insulator having an opening over the first insulator; a third insulator that has a first depressed portion and is provided inside the opening; a first oxide that has a second depressed portion and is provided inside the first depressed portion; a second oxide provided inside the second depressed portion; a first conductor and a second conductor that are electrically connected to the second oxide and are apart from each other; a fourth insulator over the second oxide; and a third conductor including a region overlapping with the second oxide with the fourth insulator therebetween. The second oxide includes a first region, a second region, and a third region sandwiched between the first region and the second region in a top view. The first conductor includes a region overlapping with the first region and the second insulator.
    Type: Application
    Filed: December 28, 2020
    Publication date: January 26, 2023
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Ryota HODO, Tomoaki MORIWAKA
  • Publication number: 20230014711
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween. The second insulator has an opening and a side surface of the second insulator overlaps with a side surface of the first conductor in the opening with the first insulator positioned therebetween. Part of a surface of the second conductor and part of a surface of the third conductor are in contact with the first insulator in the opening. The oxide semiconductor overlaps with the second conductor and the third conductor.
    Type: Application
    Filed: September 19, 2022
    Publication date: January 19, 2023
    Inventors: Satoru OKAMOTO, Shinya SASAGAWA
  • Patent number: 11545551
    Abstract: A semiconductor device in which variations in characteristics, deterioration of elements, and abnormality in shape are inhibited is provided. The semiconductor device includes a first region including a plurality of elements and a second region including a plurality of dummy elements. The second region is provided in an outer edge of the first region, and the element and the dummy element each include an oxide semiconductor. The element and the dummy element have the same structure, and a structure body included in the element and a structure body included in the dummy element are formed with the same material and provided in the same layer. The oxide semiconductor includes In, an element M (M is Al, Ga, Y, or Sn), and Zn.
    Type: Grant
    Filed: April 17, 2019
    Date of Patent: January 3, 2023
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Shinya Sasagawa, Erika Takahashi, Katsuaki Tochibayashi, Ryo Arasawa
  • Publication number: 20220416061
    Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.
    Type: Application
    Filed: September 2, 2022
    Publication date: December 29, 2022
    Inventors: Shunpei YAMAZAKI, Hideomi SUZAWA, Shinya SASAGAWA, Motomu KURATA, Masashi TSUBUKU
  • Publication number: 20220399338
    Abstract: To provide a semiconductor device with less variations in characteristics. The semiconductor device includes a first circuit region and a second circuit region over a substrate, where the first circuit region includes a plurality of first transistors and a first insulator over the plurality of first transistors; the second circuit region includes a plurality of second transistors and a second insulator over the plurality of second transistors; the second insulator includes an opening portion; the first transistors and the second transistors each include an oxide semiconductor; a third insulator is positioned over and in contact with the first insulator and the second insulator; the first insulator, the second insulator, and the third insulator inhibit oxygen diffusion; and the density of the plurality of first transistors arranged in the first circuit region is higher than the density of the plurality of second transistors arranged in the second circuit region.
    Type: Application
    Filed: October 29, 2020
    Publication date: December 15, 2022
    Inventors: Shunpei YAMAZAKI, Hiroki KOMAGATA, Yoshihiro KOMATSU, Shinya SASAGAWA, Takashi HAMADA, Yasumasa YAMANE, Shota MIZUKAMI
  • Patent number: 11489065
    Abstract: A minute transistor is provided. A transistor with low parasitic capacitance is provided. A transistor having high frequency characteristics is provided. A semiconductor device including the transistor is provided. A semiconductor device includes an oxide semiconductor, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor overlaps with the oxide semiconductor with the first insulator positioned therebetween. The second insulator has an opening and a side surface of the second insulator overlaps with a side surface of the first conductor in the opening with the first insulator positioned therebetween. Part of a surface of the second conductor and part of a surface of the third conductor are in contact with the first insulator in the opening. The oxide semiconductor overlaps with the second conductor and the third conductor.
    Type: Grant
    Filed: October 19, 2020
    Date of Patent: November 1, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Satoru Okamoto, Shinya Sasagawa
  • Patent number: 11437500
    Abstract: The on-state characteristics of a transistor are improved and thus, a semiconductor device capable of high-speed response and high-speed operation is provided. A highly reliable semiconductor device showing stable electric characteristics is made. The semiconductor device includes a transistor including a first oxide layer; an oxide semiconductor layer over the first oxide layer; a source electrode layer and a drain electrode layer in contact with the oxide semiconductor layer; a second oxide layer over the oxide semiconductor layer; a gate insulating layer over the second oxide layer; and a gate electrode layer over the gate insulating layer. An end portion of the second oxide layer and an end portion of the gate insulating layer overlap with the source electrode layer and the drain electrode layer.
    Type: Grant
    Filed: February 4, 2021
    Date of Patent: September 6, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Shunpei Yamazaki, Hideomi Suzawa, Shinya Sasagawa, Motomu Kurata, Masashi Tsubuku
  • Publication number: 20220271168
    Abstract: A semiconductor device with a small variation in transistor characteristics is provided. The semiconductor device includes an oxide semiconductor, a first conductor and a second conductor over the oxide semiconductor, a first insulator in contact with a top surface of the first conductor, a second insulator in contact with a top surface of the second conductor, a third insulator which is positioned over the first insulator and the second insulator and has an opening overlapping with a region between the first conductor and the second conductor, a fourth insulator positioned over the oxide semiconductor and in the region between the first conductor and the second conductor, and a third conductor over the fourth insulator. Each of the first insulator and the second insulator is a metal oxide including an amorphous structure.
    Type: Application
    Filed: July 13, 2020
    Publication date: August 25, 2022
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Ryota HODO, Takashi HIROSE, Yoshihiro KOMATSU, Katsuaki TOCHIBAYASHI, Kentaro SUGAYA
  • Publication number: 20220271167
    Abstract: A semiconductor device with high reliability is provided. The semiconductor device includes a first oxide; a first conductor, a second conductor, and a first insulator over the first oxide; and a third conductor over the first insulator. The first conductor includes a first crystal. The second conductor includes a crystal having the same crystal structure as the first crystal. The first crystal has (111) orientation with respect to a surface of the first oxide. The first oxide includes a second crystal. The second crystal has c-axis alignment with respect to a surface where the first oxide is formed. The lattice mismatch degree of the first crystal with respect to the second crystal is lower than or equal to 8 percent.
    Type: Application
    Filed: July 8, 2020
    Publication date: August 25, 2022
    Applicant: Semiconductor Energy Laboratory co., Ltd.
    Inventors: Shunpei YAMAZAKI, Erika TAKAHASHI, Shinya SASAGAWA, Naoki OKUNO, Masahiro TAKAHASHI, Kazuki TANEMARA
  • Patent number: 11417773
    Abstract: A semiconductor device with favorable reliability is provided. The semiconductor device includes a first oxide, a second oxide, a first conductor, a second conductor, a third conductor, a first insulator, and a second insulator. The first conductor is provided in contact with a top surface of the first oxide. The second conductor is provided in contact with the top surface of the first oxide. The first insulator is provided over the first conductor and the second conductor. The second oxide is provided in contact with the top surface of the first oxide. The second insulator is provided over the second oxide. The third conductor is provided over the second insulator. The first insulator has a function of inhibiting diffusion of oxygen. The first oxide includes indium, an element M (M is gallium, yttrium, or tin), and zinc. The first oxide includes a first region overlapping with the third conductor.
    Type: Grant
    Filed: May 14, 2019
    Date of Patent: August 16, 2022
    Assignee: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
    Inventors: Shunpei Yamazaki, Erika Takahashi, Hiroaki Honda, Kentaro Sugaya, Shinya Sasagawa
  • Publication number: 20220216341
    Abstract: A transistor with a high on-state current and a semiconductor device with high productivity are provided. Included are a first oxide, a second oxide, a third oxide, and a fourth oxide over a first insulator; a first conductor over the third oxide; a second conductor over the fourth oxide; a second insulator over the first conductor; a third insulator over the second conductor; a fifth oxide positioned over the second oxide and between the third oxide and the fourth oxide; a sixth oxide over the fifth oxide; a fourth insulator over the sixth oxide; a third conductor over the fourth insulator; and a fifth insulator over the first insulator to the third insulator. The fifth oxide includes a region in contact with the second oxide to the fourth oxide and the first insulator. The sixth oxide includes a region in contact with the fifth oxide, the first conductor, and the second conductor. The fourth insulator includes a region in contact with at least the sixth oxide, the third conductor, and the fifth insulator.
    Type: Application
    Filed: April 27, 2020
    Publication date: July 7, 2022
    Inventors: Shunpei YAMAZAKI, Ryota HODO, Tetsuya KAKEHATA, Shinya SASAGAWA
  • Publication number: 20220208988
    Abstract: A semiconductor device with less variations in transistor characteristics is provided.
    Type: Application
    Filed: April 27, 2020
    Publication date: June 30, 2022
    Inventors: Shunpei YAMAZAKI, Tsutomu MURAKAWA, Shinya SASAGAWA, Naoto YAMADE, Takashi HAMADA, Hiroki KOMAGATA
  • Publication number: 20220199831
    Abstract: A semiconductor device includes a first oxide insulating layer over a first insulating layer, an oxide semiconductor layer over the first oxide insulating layer, a source electrode layer and a drain electrode layer over the oxide semiconductor layer, a second insulating layer over the source electrode layer and the drain electrode layer, a second oxide insulating layer over the oxide semiconductor layer, a gate insulating layer over the second oxide insulating layer, a gate electrode layer over the gate insulating layer, and a third insulating layer over the second insulating layer, the second oxide insulating layer, the gate insulating layer, and the gate electrode layer. A side surface portion of the second insulating layer is in contact with the second oxide insulating layer. The gate electrode layer includes a first region and a second region. The first region has a width larger than that of the second region.
    Type: Application
    Filed: February 3, 2022
    Publication date: June 23, 2022
    Inventors: Yoshinobu ASAMI, Yutaka OKAZAKI, Satoru OKAMOTO, Shinya SASAGAWA
  • Publication number: 20220189996
    Abstract: To provide a miniaturized semiconductor device with low power consumption. A method for manufacturing a wiring layer includes the following steps: forming a second insulator over a first insulator; forming a third insulator over the second insulator; forming an opening in the third insulator so that it reaches the second insulator; forming a first conductor over the third insulator and in the opening; forming a second conductor over the first conductor; and after forming the second conductor, performing polishing treatment to remove portions of the first and second conductors above a top surface of the third insulator. An end of the first conductor is at a level lower than or equal to the top level of the opening. The top surface of the second conductor is at a level lower than or equal to that of the end of the first conductor.
    Type: Application
    Filed: December 21, 2021
    Publication date: June 16, 2022
    Applicant: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Yutaka Okazaki, Tomoaki MORIWAKA, Shinya SASAGAWA, Takashi OHTSUKI
  • Publication number: 20220157986
    Abstract: A semiconductor device includes a first insulator; a first oxide over the first insulator; a second oxide over the first oxide; first and second conductors and a third oxide over the second oxide; a second insulator over the first conductor; a third insulator over the second conductor; first and second layers; and fourth to sixth insulators. The sixth insulator includes a region in contact with a top surface of the first insulator. The first layer includes a region in contact with side surfaces of the first and second oxides, a side surface of the first conductor, and the top surface of the first insulator. The second layer includes a region in contact with the side surfaces of the first and second oxides, a side surface of the second conductor, and the top surface of the first insulator.
    Type: Application
    Filed: March 18, 2020
    Publication date: May 19, 2022
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Shunichi ITO, Erika TAKAHASHI, Tetsuya KAKEHATA
  • Publication number: 20220157817
    Abstract: A semiconductor device with less variations in transistor characteristics is provided. A first insulator, first and second oxide films, a first conductive film, a first insulating film, and a second conductive film are deposited and processed to form a first and second oxides, a first conductive layer, a first insulating layer, and a second conductive layer. In the process, a layer is formed to cover the first and second oxides, the first conductive layer, the first insulating layer, and the second conductive layer. The second conductive layer and the layer are removed. A second insulating layer in contact with side surfaces of the first and second oxides, the first conductive layer, and the first insulating layer is formed, and a second insulator is formed thereover. An opening reaching the second oxide is formed in the first conductive layer, the first insulating layer, the second insulating layer, and the second insulator.
    Type: Application
    Filed: March 19, 2020
    Publication date: May 19, 2022
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Shunichi ITO, Erika TAKAHASHI, Tetsuya KAKEHATA
  • Publication number: 20220115409
    Abstract: The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.
    Type: Application
    Filed: December 21, 2021
    Publication date: April 14, 2022
    Inventors: Motomu KURATA, Shinya SASAGAWA, Ryota HODO, Katsuaki TOCHIBAYASHI, Tomoaki MORIWAKA, Jiro NISHIDA, Hidekazu MIYAIRI, Shunpei YAMAZAKI
  • Patent number: 11282860
    Abstract: The semiconductor device includes a first layer including a first transistor, a second layer including a first insulating film over the first layer, a third layer including a second insulating film over the second layer, and a fourth layer including a second transistor over the third layer. A first conductive film electrically connects the first transistor and the second transistor to each other through an opening provided in the first insulating film. A second conductive film electrically connects the first transistor, the second transistor, and the first conductive film to one another through an opening provided in the second insulating film. A channel formation region of the first transistor includes a single crystal semiconductor. A channel formation region of the second transistor includes an oxide semiconductor. The width of a bottom surface of the second conductive film is 5 nm or less.
    Type: Grant
    Filed: May 18, 2020
    Date of Patent: March 22, 2022
    Assignee: Semiconductor Energy Laboratory Co., Ltd.
    Inventors: Motomu Kurata, Shinya Sasagawa, Ryota Hodo, Katsuaki Tochibayashi, Tomoaki Moriwaka, Jiro Nishida, Hidekazu Miyairi, Shunpei Yamazaki
  • Publication number: 20220077317
    Abstract: A semiconductor device in which a variation of transistor characteristics is small is provided. The semiconductor device includes a transistor. The transistor includes a first insulator, a first oxide over the first insulator, a first conductor, a second conductor, and a second oxide, which is positioned between the first conductor and the second conductor, over the first oxide, a second insulator over the second oxide, and a third conductor over the second insulator. A top surface of the first oxide in a region overlapping with the third conductor is at a lower position than a position of a top surface of the first oxide in a region overlapping with the first conductor. The first oxide in the region overlapping with the third conductor has a curved surface between a side surface and the top surface of the first oxide, and the curvature radius of the curved surface is greater than or equal to 1 nm and less than or equal to 15 nm.
    Type: Application
    Filed: November 19, 2019
    Publication date: March 10, 2022
    Inventors: Shunpei YAMAZAKI, Shinya SASAGAWA, Katsuaki TOCHIBAYASHI, Tsutomu MURAKAWA, Erika TAKAHASHI
  • Publication number: 20220077322
    Abstract: A semiconductor device with small fluctuations in transistor characteristics can be provided. The semiconductor device includes a first oxide, a second oxide and a third oxide over the first oxide, a first conductor over the second oxide, a second conductor over the third oxide, a fourth oxide over the first oxide and between the second oxide and the third oxide, a first insulator over the fourth oxide, and a third conductor over the first insulator. The first oxide includes a groove in a region not overlapping with the second oxide and the third oxide. The first oxide includes a first layered crystal substantially parallel to the surface where the first oxide is formed. In the groove, the fourth oxide includes a second layered crystal substantially parallel to the surface where the first oxide is formed. A concentration of aluminum atoms at an interface between the first oxide and the fourth oxide and in the vicinity of the interface is less than or equal to 5.0 atomic %.
    Type: Application
    Filed: February 13, 2020
    Publication date: March 10, 2022
    Inventors: Shunpei YAMAZAKI, Erika TAKAHASHI, Tsutomu MURAKAWA, Shinya SASAGAWA, Katsuaki TOCHIBAYASHI