Patents by Inventor Shinya Yamaguchi

Shinya Yamaguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030213957
    Abstract: In a thin film semiconductor device according to the present invention, a continuous oscillating light beam from a solid laser or the like is modulated on time axis and spatially, thereby realizing crystal growth that is nearly optimum for a crystal structure and a growth speed of crystals in a Sin thin film. Crystal grains with a large diameter, flatness with no projections at their grain boundaries, and controlled surface orientations are thereby formed. By forming channels with these crystal grains, high-mobility semiconductor devices and an image display device using these semiconductor devices are realized.
    Type: Application
    Filed: May 16, 2003
    Publication date: November 20, 2003
    Inventors: Shinya Yamaguchi, Mutsuko Hatano, Mitsuharu Tai, Sedng-Kee Park, Takeo Shiba
  • Publication number: 20030132437
    Abstract: The present invention provides a method for crystallizing a polycrystalline silicon layers used for the material of thin film transistors at large size (more than 8 microns) with crystal orientation aligned to a specific orientation, and for controlling the positioning of crystal grains at high precision. On a polycrystalline silicon layer, projections at regular intervals are formed by using anisotropic etching and a photomask. The tip of projections is comprised of single crystal silicon of a specific crystal orientation selectively left by the anisotropic etching, which is a candidate for nuclei of amorphous silicon to be deposited thereon. By iterating above process at a plurality of times, and by gradually enlarging the interval, span, size and height of projections, the size of crystal grains of silicon at the surface may be enlarged to the extent required. Thereby silicon crystal grains of large grains with crystal orientation aligned may be formed at controllable positions.
    Type: Application
    Filed: January 30, 2003
    Publication date: July 17, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Shinya Yamaguchi, Masanobu Miyao, Kiyokazu Nakagawa, Nobuyuki Sugii
  • Publication number: 20030109074
    Abstract: An image display device which includes a display pixel block and circuit blocks peripheral thereto. Each block has a circuit made of high-performance thin film transistors. The display pixel block and the peripheral circuit blocks including the four corners of the display device are formed on an image display device substrate of circuit-built-in type thin film transistors having a small circuit occupation surface area. A circuit including thin film transistors of a polycrystalline silicon film anisotropically crystal-grown and having crystal grains aligned in its longitudinal direction with a current direction is provided in the whole or partial surface of the display pixel block and circuit blocks. The longitudinal direction is aligned with a horizontal or vertical direction within the block, and blocks aligned in the horizontal and vertical directions can be arranged as mixed when viewed from an identical straight line.
    Type: Application
    Filed: July 3, 2002
    Publication date: June 12, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Takeo Shiba, Mutsuko Hatano, Shinya Yamaguchi, Seong-Kee Park
  • Publication number: 20030104662
    Abstract: A thin film semiconductor device has a semiconductor thin film with a film thickness of 200 nm or less. The semiconductor thin film is formed over a dielectric substrate with a warping point of 600° C. or lower. The semiconductor thin film has a region in which a first semiconductor thin film region with the defect density of 1×1017 cm−3 or less and a second semiconductor thin film region with the defect density of 1×1017 cm−3 or more are disposed alternately in the form of stripes. The width of the first semiconductor thin film region is larger than the width of the semiconductor thin film region. The grain boundaries, grain size and orientation of crystals over the dielectric substrate are controlled, so that a high quality thin film semiconductor device is obtained.
    Type: Application
    Filed: July 5, 2002
    Publication date: June 5, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Mutsuko Hatano, Shinya Yamaguchi, Takeo Shiba
  • Publication number: 20030089907
    Abstract: A thin film made of silicon or another IV-group crystals (crystals and mixed crystals of C, Ge, Sn, and Pb) is twice scanned with a laser beam moving in two lateral directions in which crystal grains grow larger in order to form high-quality polycrystals in exact positions in the thin film, while defects uncontrollable by the prior arts are being reduced significantly, to realize a high-quality TFT device. The laser-scanning directions are defined by the crystallization face orientations.
    Type: Application
    Filed: July 9, 2002
    Publication date: May 15, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Shinya Yamaguchi, Mutsuko Hatano, Takeo Shiba
  • Publication number: 20030068836
    Abstract: A laser beam is concentrated using an objective lens and radiated on a amorphous silicon film or polycrystalline silicon film having a grain size of one micron or less, the laser beam being processed from a continuous wave laser beam (1) to be pulsed using an EO modulator and to have arbitrary temporal energy change while pulsing ; (2) to have an arbitrary spatial energy distribution using a beam-homogenizer, filter having an arbitrary transmittance distribution, and rectangular slit; and (3) to eliminate coherency thereof using a high-speed rotating diffuser. In this manner, it is possible to realize a liquid crystal display device in which a driving circuit comprising a polycrystalline silicon film having substantially the same properties as a single crystal is incorporated in a TFT panel device.
    Type: Application
    Filed: October 10, 2002
    Publication date: April 10, 2003
    Inventors: Mikio Hongo, Sachio Uto, Mineo Nomoto, Toshihiko Nakata, Mutsuko Hatano, Shinya Yamaguchi, Makoto Ohkura
  • Patent number: 6545294
    Abstract: The present invention provides an apparatus having a semiconductor device including a plurality of transistors formed on respective single crystal silicon regions of enlarged grain size. On a polycrystalline silicon layer, projections at regular intervals are formed by using anisotropic etching and a photomask. The tips of projections are composed of single crystal silicon of a specific crystal orientation selectively left by the anisotropic etching, which is a candidate for nuclei of amorphous silicon to be deposited thereon. By iterating the above process a plurality of times, and by gradually enlarging the pitch, span, size and height of projections, the size of the crystal grains of silicon at the surface may be enlarged to the extent required. Thereby, silicon crystal grains of large grain size with the crystal orientation aligned may be formed at controllable positions.
    Type: Grant
    Filed: May 16, 2000
    Date of Patent: April 8, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Yamaguchi, Masanobu Miyao, Kiyokazu Nakagawa, Nobuyuki Sugii
  • Publication number: 20030054593
    Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.
    Type: Application
    Filed: October 22, 2002
    Publication date: March 20, 2003
    Inventors: Shinya Yamaguchi, Takeo Shiba, Mutsuko Hatano, Seong-Kee Park
  • Publication number: 20030049892
    Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.
    Type: Application
    Filed: October 22, 2002
    Publication date: March 13, 2003
    Inventors: Shinya Yamaguchi, Takeo Shiba, Mutsuko Hatano, Seong-Kee Park
  • Patent number: 6521909
    Abstract: A high performance thin film transistor is provided containing polycrystalline Si-Ge alloy. The TFT has a crystal structure restraining both current scattering in a grain boundary and surface roughness by introduction of Ge into Si. This permits realizing an image display device having high performance and a large area at low cost.
    Type: Grant
    Filed: February 23, 2001
    Date of Patent: February 18, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Yamaguchi, Takeo Shiba, Mutsuko Hatano, Seong-Kee Park
  • Publication number: 20030013305
    Abstract: A method of producing a strain-relaxed Si—Ge virtual substrate for use in a semiconductor substrate which is planar and of less defects for improving the performance of a field effect semiconductor device, which method comprises covering an Si—Ge layer formed on an SOI substrate with an insulating layer to prevent evaporation of Ge, heating the mixed layer of silicon and germanium at a temperature higher than a solidus curve temperature determined by the germanium content of the Si—Ge layer into a partially melting state, and diffusing germanium to the Si layer on the insulating layer, thereby solidifying the molten Si—Ge layer to obtain a strain-relaxed Si—Ge virtual substrate.
    Type: Application
    Filed: June 7, 2002
    Publication date: January 16, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Nobuyuki Sugii, Shinya Yamaguchi, Katsuyoshi Washio
  • Patent number: 6501095
    Abstract: The present invention relates to a thin film transistor device, an object of the invention is to realize the thin film transistor device of high mobility by large-grain sizing (quasi single crystal) a low-temperature poly-Si thin film being an elemental material of the thin film transistor in a state trued up to a crystal orientation having the most stable lattice structure in consideration of strain at the interface with a substrate, and by controlling a crystal position.
    Type: Grant
    Filed: February 26, 2001
    Date of Patent: December 31, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shinya Yamaguchi, Mutsuko Hatano, Takeo Shiba, Yoshinobu Kimura, Seong-Kee Park
  • Publication number: 20020119609
    Abstract: In an MIS field effect transistor having a gate electrode formed on a first semiconductor layer which is a polycrystalline silicon film on an insulating substrate through a gate insulating film, a channel region formed in the semiconductor layer and a source region and a drain region arranged on both sides of the channel region, a thin film semiconductor device has a main orientation of at least the channel region of {110} with respect to the surface of the gate insulating film. Further, a polycrystalline semiconductor film having a main orientation of the surface almost perpendicular to a direction for connecting the source and drain regions of {100} is preferably used in the channel of a semiconductor device.
    Type: Application
    Filed: February 26, 2001
    Publication date: August 29, 2002
    Inventors: Mutsuko Hatano, Shinya Yamaguchi, Yoshinobu Kimura, Seong-Kee Park
  • Publication number: 20020102823
    Abstract: The present invention relates to a thin film transistor, in a low-temperature poly-Si thin film becoming an elemental material of the thin film transistor, an object of the invention is to provide the thin film transistor suitable for realizing an image display device having a high performance and a large area at low cost by realizing a poly-crystalline thin film having a crystal structure restraining current scattering in a grain boundary, lessening surface roughness, and capable of realizing high mobility even to a positive hole current.
    Type: Application
    Filed: February 23, 2001
    Publication date: August 1, 2002
    Inventors: Shinya Yamaguchi, Takeo Shiba, Mutsuko Hatano, Seong-Kee Park
  • Publication number: 20020100909
    Abstract: The present invention relates to a thin film transistor device, an object of the invention is to realize the thin film transistor device of high mobility by large-grain sizing (quasi single crystal) a low-temperature poly-Si thin film being an elemental material of the thin film transistor in a state trued up to a crystal orientation having the most stable lattice structure in consideration of strain at the interface with a substrate, and by controlling a crystal position.
    Type: Application
    Filed: February 26, 2001
    Publication date: August 1, 2002
    Inventors: Shinya Yamaguchi, Mutsuko Hatano, Takeo Shiba, Yoshinobu Kimura, Seong-Kee Park
  • Publication number: 20020082812
    Abstract: In Moment method, by regarding the current values of a wave source to be constants, the simultaneous equations of the wave source and the simultaneous equations of a receiving object can be separated and the current values of the wave source and the current values of the object can be separately calculated. Even if the positional relationship between the wave source and object changes, the mutual impedance between the elements of the object does not change. Therefore, there is no need to calculate the coefficient matrix of the simultaneous equations of the object again.
    Type: Application
    Filed: May 29, 2001
    Publication date: June 27, 2002
    Applicant: FUJITSU LIMITED
    Inventors: Shinya Yamaguchi, Kenji Nagase, Shinichi Ohtsu, Makoto Mukai
  • Publication number: 20010048108
    Abstract: At least one of a semiconductor thin-film for forming a picture display portion and a semiconductor thin-film for forming a peripheral circuit portion, which are accumulated on one common insulative substrate, is constructed with a semiconductor thin-film having a plural number of semiconductor crystalline portions formed to be divided and disposed in a matrix-like, and TFTs are provided in the semiconductor thin-film by bringing those semiconductor single crystal portions into active portions thereof. For that purpose, a crystallization accelerating material is adhered at the position of lattice points of a matrix and is treated with heating process, for forming the single crystal portions disposed in the matrix-like manner, so as to form the TFTs on the surface thereof, thereby completing the thin-film semiconductor integrated circuit device.
    Type: Application
    Filed: March 20, 2001
    Publication date: December 6, 2001
    Inventors: Seong-kee Park, Kiyokazu Nakagawa, Nobuyuki Sugii, Shinya Yamaguchi
  • Patent number: 5940310
    Abstract: A device accurately calculates the strength of an electromagnetic field radiated from an electric circuit apparatus having a data receiving unit, and extractor, a model generator, and a calculator. The data receiving unit receives structural data related to the electric circuit apparatus. The extractor exacts, from the received data, structural data related to a dielectric between a power source layer and a ground layer of a multilayer printed board.
    Type: Grant
    Filed: November 13, 1997
    Date of Patent: August 17, 1999
    Assignee: Fujitsu Limited
    Inventors: Shinya Yamaguchi, Tomoyuki Nakao, Shinichi Ohtsu, Makoto Mukai
  • Patent number: 5926377
    Abstract: A multilayer printed board has at least a signal layer, a power source layer, and a ground layer that are formed one upon another with insulation material being interposed among the layers. The board is capable of reducing radio waves to be emitted from the board.The board is provided with capacitors that are continuously or discretely formed at the edges of an overlapping pattern of the power source layer and ground layer, to pass a high-frequency current from the power source layer to the ground layer, thereby reducing the emission of radio waves.
    Type: Grant
    Filed: November 17, 1997
    Date of Patent: July 20, 1999
    Assignee: Fujitsu Limited
    Inventors: Tomoyuki Nakao, Shinya Yamaguchi, Makoto Mukai, Shinichi Ohtsu