Abstract: A circuit modification portion modifies circuit information of an integrated circuit depending on a result of a timing test at a timing test portion to presume delay information at a delay presumption portion by modeling the circuit relating to its modified circuit information. Thereafter updating the circuit information and delay information of the integrated circuit at an information update portion to re-test the timing. This allows to carry out a timing analysis/test of the modified circuit without designing layout with the modified circuit information, which is required in a conventional design method. As a result, the number of designing the layout in the integrated circuit design is reduced to shorten time required for the layout design, which allows to shorten time required for the layout design process (layout design, timing analysis/test, and timing adjustment).