Patents by Inventor Shohei Imai

Shohei Imai has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240128934
    Abstract: A Doherty amplifier circuit includes a carrier amplifier including one or more amplifiers, and a peaking amplifier including one or more amplifiers. At least one of the amplifiers includes a first transistor and a current draw circuit. The first transistor receives, at its base or gate, a first radio frequency signal, and outputs, from its emitter or source, a second radio frequency signal obtained by amplifying the first radio frequency signal. The current draw circuit draws, from the emitter or source of the first transistor, a current based on a control signal.
    Type: Application
    Filed: October 11, 2023
    Publication date: April 18, 2024
    Inventor: Shohei IMAI
  • Publication number: 20240113663
    Abstract: A Doherty amplifier circuit includes a carrier amplifier including one or more amplifiers, and a peaking amplifier including one or more amplifiers. At least one of the amplifiers includes a transistor and a feedback circuit. The transistor receives, at its base or gate, a radio frequency signal and a bias voltage or current which changes, and outputs an amplified radio frequency signal from its collector or drain. The feedback circuit provides, to the base or gate or the emitter or source of the transistor, a voltage or a current based on the amplified radio frequency signal.
    Type: Application
    Filed: September 28, 2023
    Publication date: April 4, 2024
    Inventor: Shohei IMAI
  • Patent number: 11929721
    Abstract: A power amplifier module includes a first amplifier, a power splitter, a second amplifier, a third amplifier, a phase shifter, a combining unit, and a controller. The first amplifier amplifies a first signal and outputs a second signal. The power splitter splits the second signal into a third signal and a fourth signal. The second amplifier amplifies the third signal and outputs a fifth signal. The third amplifier amplifies the fourth signal and outputs a sixth signal. The phase shifter receives the fifth signal and shifts a phase of the fifth signal. The combining unit combines the fifth signal having the phase shifted by the phase shifter and the sixth signal and outputs an amplified signal of the second signal. The controller outputs a first control signal for controlling a power level of the sixth signal output from the third amplifier.
    Type: Grant
    Filed: April 6, 2021
    Date of Patent: March 12, 2024
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventors: Satoshi Tanaka, Yoshiaki Sukemori, Takeshi Kogure, Shohei Imai
  • Publication number: 20240079999
    Abstract: A power amplifier circuit includes a first amplifier that, in a region where an input signal level is a first level or higher, amplifies a signal split from an input signal and outputs an amplified signal; a first converter connected to an output side of the first amplifier and converts an impedance on the output side of the first amplifier; and at least one or more second amplifiers that, in a region where the input signal level is a second level or higher, amplify a signal split from the input signal and output an amplified signal. Output sides of the second amplifiers are connected in series with an output side of the first converter.
    Type: Application
    Filed: November 10, 2023
    Publication date: March 7, 2024
    Inventor: Shohei IMAI
  • Publication number: 20230378922
    Abstract: A power amplifier module includes a carrier circuit including at least one carrier amplifier; a peak circuit including at least one peak amplifier; a carrier control circuit that controls base current or gate voltage of a certain carrier amplifier in the carrier circuit; and a carrier output circuit that is connected to a carrier amplifier at an output side in the carrier circuit and that supplies a carrier control signal for controlling the base current or the gate voltage of the certain carrier amplifier to the carrier control circuit.
    Type: Application
    Filed: July 31, 2023
    Publication date: November 23, 2023
    Inventors: Shohei IMAI, Satoshi TANAKA
  • Publication number: 20230378105
    Abstract: A power amplifier circuit includes a first carrier amplifier and a first peak amplifier. The first carrier amplifier includes a differential amplifier circuit having first and second transistors. The first peak amplifier is formed in or on a semiconductor substrate, which is the same semiconductor substrate in or on which the first carrier amplifier is formed. The emitter or the source of the first transistor is electrically connected to the emitter or the source of the second transistor. The emitter or the source of the first transistor is electrically connected to a ground electrode via a first bump. The emitter or the source of the second transistor is electrically connected to the ground electrode via a second bump. The second bump is different from the first bump.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 23, 2023
    Inventor: Shohei IMAI
  • Patent number: 11824501
    Abstract: A power amplifier circuit includes a first amplifier that, in a region where an input signal level is a first level or higher, amplifies a signal split from an input signal and outputs an amplified signal; a first converter connected to an output side of the first amplifier and converts an impedance on the output side of the first amplifier; and at least one or more second amplifiers that, in a region where the input signal level is a second level or higher, amplify a signal split from the input signal and output an amplified signal. Output sides of the second amplifiers are connected in series with an output side of the first converter. The first converter makes an absolute value of the impedance on the output side of the first amplifier larger than absolute values of impedances on the output sides of the second amplifiers.
    Type: Grant
    Filed: June 4, 2021
    Date of Patent: November 21, 2023
    Assignee: MURATA MANUFACTURING CO., LTD.
    Inventor: Shohei Imai
  • Publication number: 20230318546
    Abstract: A combiner circuit includes: a combiner section that outputs a combined signal by combining a first signal output from a carrier amplifier circuit and a second signal output from a peak amplifier circuit, the first signal being generated by amplifying a first distribution signal distributed from an input signal, the second signal being generated by amplifying a second distribution signal distributed from the input signal; and a matching section connected in series with the combiner section to receive the combined signal, wherein a variation coefficient of an imaginary part of impedance associated with an increase in frequency of the input signal indicates a negative value, and the matching section matches impedance between the combiner section and a load.
    Type: Application
    Filed: March 30, 2023
    Publication date: October 5, 2023
    Inventors: Yuuki TANAKA, Shohei IMAI
  • Publication number: 20230261622
    Abstract: A power amplifier circuit includes: a power splitter; a first amplifier; a second amplifier; a first balun that splits a first amplified signal into a third amplified signal and a fourth amplified signal having a different phase from the third amplified signal; a third amplifier and a fourth amplifier that respectively amplify the third amplified signal and the fourth amplified signal; a second balun that splits a second amplified signal into a fifth amplified signal and a sixth amplified signal having a different phase from the fifth amplified signal; a fifth amplifier that amplifies the fifth amplified signal if a power level of the fifth amplified signal is equal to or higher than a predetermined power level; and a sixth amplifier that amplifies the sixth amplified signal if a power level of the sixth amplified signal is equal to or higher than a predetermined power level.
    Type: Application
    Filed: April 26, 2023
    Publication date: August 17, 2023
    Inventors: Shohei IMAI, Satoshi TANAKA
  • Publication number: 20230216450
    Abstract: A power amplification circuit including: a power splitter which splits an input signal into a first signal and a second signal; a first carrier amplifier which amplifies the first signal to output a first amplified signal; a first peak amplifier which amplifies the second signal when a power level of the second signal is larger than or equal to a predetermined power level to output a second amplified signal; and a combiner which combines the first amplified signal and the second amplified signal, in which the first carrier amplifier and the first peak amplifier are provided to a same semiconductor substrate.
    Type: Application
    Filed: March 13, 2023
    Publication date: July 6, 2023
    Inventor: Shohei IMAI
  • Publication number: 20230216456
    Abstract: A power amplifier circuit includes a power splitter, a first amplifier, a second amplifier, a third amplifier, a fourth amplifier, a first bias circuit, a first line connecting the first bias circuit and the first amplifier, and a second line connecting the first bias circuit and the third amplifier on the same semiconductor substrate, in which the first line and the second line are formed such that a voltage drop amount of the first bias voltage between the first bias circuit and the first amplifier is substantially equal to a voltage drop amount of the first bias voltage between the first bias circuit and the third amplifier.
    Type: Application
    Filed: February 24, 2023
    Publication date: July 6, 2023
    Inventors: Shohei IMAI, Satoshi TANAKA
  • Publication number: 20230128900
    Abstract: A first transistor having a base or a gate supplied with a high-frequency signal through a capacitor, and supplied with a bias current through a resistive element, a second transistor having a base or a gate connected to an emitter or a source of the first transistor, and a collector or a drain connected to an output terminal, and a third transistor having a collector or a drain connected to the base or the gate of the first transistor, and an emitter or a source connected to reference potential are provided, and the third transistor is provided such that a current flowing through the collector or the drain of the third transistor increases when a current flowing through the collector or the drain of the second transistor increases.
    Type: Application
    Filed: October 20, 2022
    Publication date: April 27, 2023
    Inventor: Shohei IMAI
  • Publication number: 20230013880
    Abstract: A power amplifier circuit includes a first amplifier transistor, a first nonlinear element, and a current control circuit. The first amplifier transistor has a base or a gate into which a first signal is input, a collector or a drain from which a signal resulting from amplification of the first signal is output, and an emitter or a source that is grounded. The first nonlinear element is connected between the collector or the drain of the first amplifier transistor and the base or the gate of the first amplifier transistor. The current control circuit is connected between the ground and the base or the gate of the first amplifier transistor and controls current flowing through the first nonlinear element.
    Type: Application
    Filed: July 18, 2022
    Publication date: January 19, 2023
    Inventor: Shohei IMAI
  • Publication number: 20210384867
    Abstract: A power amplifier circuit includes a first amplifier that, in a region where an input signal level is a first level or higher, amplifies a signal split from an input signal and outputs an amplified signal; a first converter connected to an output side of the first amplifier and converts an impedance on the output side of the first amplifier; and at least one or more second amplifiers that, in a region where the input signal level is a second level or higher, amplify a signal split from the input signal and output an amplified signal. Output sides of the second amplifiers are connected in series with an output side of the first converter. The first converter makes an absolute value of the impedance on the output side of the first amplifier larger than absolute values of impedances on the output sides of the second amplifiers.
    Type: Application
    Filed: June 4, 2021
    Publication date: December 9, 2021
    Inventor: Shohei IMAI
  • Publication number: 20210313938
    Abstract: A power amplifier module includes a first amplifier, a power splitter, a second amplifier, a third amplifier, a phase shifter, a combining unit, and a controller. The first amplifier amplifies a first signal and outputs a second signal. The power splitter splits the second signal into a third signal and a fourth signal. The second amplifier amplifies the third signal and outputs a fifth signal. The third amplifier amplifies the fourth signal and outputs a sixth signal. The phase shifter receives the fifth signal and shifts a phase of the fifth signal. The combining unit combines the fifth signal having the phase shifted by the phase shifter and the sixth signal and outputs an amplified signal of the second signal. The controller outputs a first control signal for controlling a power level of the sixth signal output from the third amplifier.
    Type: Application
    Filed: April 6, 2021
    Publication date: October 7, 2021
    Inventors: Satoshi TANAKA, Yoshiaki SUKEMORI, Takeshi KOGURE, Shohei IMAI
  • Patent number: 10748860
    Abstract: Parallel inductors include a first metal wire (8a or 8b) for connecting a drain terminal (2) and a first metal pattern (7a or 7b), and a second metal wire (10a or 10b) for connecting the first metal pattern (7a or 7b) and a second metal pattern (9a or 9b). The second metal wires (10a and 10b) are each positioned between the corresponding first metal wire (8a or 8b) and a corresponding third metal wire (12a or 12b) for connecting the drain terminal (2) and a third metal pattern (11). The direction of current through the second metal wires (10a and 10b) is opposite to the direction of current through each of the first metal wire (8a or 8b) and the third metal wire (12a or 12b).
    Type: Grant
    Filed: July 1, 2016
    Date of Patent: August 18, 2020
    Assignee: MITSUBISHI ELECTRIC CORPORATION
    Inventors: Keigo Nakatani, Yuji Komatsuzaki, Shintaro Shinjo, Koji Yamanaka, Shohei Imai
  • Patent number: 10608594
    Abstract: In a Doherty amplifier including a carrier amplifier (6) and a peaking amplifier (8) connected in parallel with each other, a compensation circuit (9) for causing an impedance seen from an output end (9a) of the compensation circuit (9) toward the peaking amplifier (8) to be open within a used frequency range and compensating for frequency dependence of an impedance seen from an output of a combiner (10) toward the combiner (10) in a state in which the peaking amplifier (8) is not operating is arranged between the peaking amplifier (8) and the combiner (10). This achieves a wider bandwidth without making the circuit larger in size and more complicated.
    Type: Grant
    Filed: May 18, 2016
    Date of Patent: March 31, 2020
    Assignee: Mitsubishi Electric Corporation
    Inventors: Yuji Komatsuzaki, Shintaro Shinjo, Keigo Nakatani, Shohei Imai
  • Patent number: 10355130
    Abstract: A semiconductor device is provided with one or more gate fingers (20) that are provided in an active region on a semiconductor substrate (1), and a source finger (30) and a drain finger (40) that are provided in the active region and arranged alternately to allow each gate finger to be sandwiched between the source and drain fingers. The semiconductor device includes terminal circuit (60) that has inductive impedance at the frequency of a signal input to an input terminal of the one or more gate fingers, and is directly or indirectly connected to the one or more gate fingers at an area being spaced away from a connecting position of the input terminal (21a) of the one or more gate fingers (20).
    Type: Grant
    Filed: June 23, 2015
    Date of Patent: July 16, 2019
    Assignee: Mitsubishi Electric Corporation
    Inventors: Shohei Imai, Kazuhiro Iyomasa, Koji Yamanaka, Hiroaki Maehara, Ko Kanaya, Tetsuo Kunii, Hideaki Katayama
  • Publication number: 20190149097
    Abstract: In a Doherty amplifier including a carrier amplifier (6) and a peaking amplifier (8) connected in parallel with each other, a compensation circuit (9) for causing an impedance seen from an output end (9a) of the compensation circuit (9) toward the peaking amplifier (8) to be open within a used frequency range and compensating for frequency dependence of an impedance seen from an output of a combiner (10) toward the combiner (10) in a state in which the peaking amplifier (8) is not operating is arranged between the peaking amplifier (8) and the combiner (10). This achieves a wider bandwidth without making the circuit larger in size and more complicated.
    Type: Application
    Filed: May 18, 2016
    Publication date: May 16, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Yuji KOMATSUZAKI, Shintaro SHINJO, Keigo NAKATANI, Shohei IMAI
  • Publication number: 20190148315
    Abstract: Parallel inductors include a first metal wire (8a or 8b) for connecting a drain terminal (2) and a first metal pattern (7a or 7b), and a second metal wire (10a or 10b) for connecting the first metal pattern (7a or 7b) and a second metal pattern (9a or 9b). The second metal wires (10a and 10b) are each positioned between the corresponding first metal wire (8a or 8b) and a corresponding third metal wire (12a or 12b) for connecting the drain terminal (2) and a third metal pattern (11). The direction of current through the second metal wires (10a and 10b) is opposite to the direction of current through each of the first metal wire (8a or 8b) and the third metal wire (12a or 12b).
    Type: Application
    Filed: July 1, 2016
    Publication date: May 16, 2019
    Applicant: Mitsubishi Electric Corporation
    Inventors: Keigo NAKATANI, Yuji KOMATSUZAKI, Shintaro SHINJO, Koji YAMANAKA, Shohei IMAI