Abstract: A user equipment (UE) is described. The UE may comprise high-layer processing circuitry configured to acquire a RRC parameter and transmission circuitry configured to transmit a PUSCH in multiple slots. The RRC parameter may indicate that the multiple slots are determined according to slots which are available for transmission(s) of the PUSCH. If the RRC parameter is not provided, processing time for canceling a transmission of the PUSCH may be required to be shorter than or equal to a first length. If the RRC parameter is provided, the processing time for canceling a transmission of the PUSCH may be required to be shorter than or equal to a second length. The second length is longer than the first length.

Abstract: A terminal apparatus includes a reception circuitry that receives a PDCCH including a DCI format; and a transmission circuitry that transmits a PUCCH. The DCI format indicates transmission of the PUCCH. In a case that a first higher layer parameter NrofSlots indicating the number of repetitions is configured for a PUCCH format corresponding to the transmission of the PUCCH, the number of repetitions of the transmission of the PUCCH is determined based on the first higher layer parameter. In a case that the number of repetitions per transmission of the PUCCH is indicated to be valid for the transmission of the PUCCH based on a second higher layer parameter, the number of repetitions of the transmission of the PUCCH is determined based on a value set in a PUCCH-RepetitionFactor field for the transmission of the PUCCH, included in the DCI format.

Abstract: A terminal apparatus includes a reception circuitry that receives a PDCCH where a DCI format is mapped; and a transmission circuitry that transmits a PUCCH corresponding to a PUCCH resource indicated based on the DCI format. A first higher layer parameter is configured for a PUCCH format corresponding to the PUCCH. In a case that a second higher layer parameter is configured for the PUCCH resource, the number of repetitions of the PUCCH is a value of the second higher layer parameter, and in a case that the second higher layer parameter is not configured, the number of repetitions of the PUCCH is a value of the first higher layer parameter.

Abstract: A terminal device includes encoding circuitry configured to encode a code block and output coded bits for the code block, and rate-matching circuitry configured to perform bit-selection procedure for the coded bits, wherein the rate-matching circuitry is configured to determine a starting coded bit index for the bit-selection procedure based on a rate-matching sequence length or an index of an instance of a PUSCH in which the coded bits are mapped.

Abstract: Terminal device attempts to initiate a COT-u after the channel is sensed to be idle and transmit a configured grant PUSCH. A start of a time domain resource of the configured grant PUSCH is aligned with the start of the FFP-u. In a case that the FFP-u does not overlap with an IP-g of an FFP-g, the COT-u is initiated and the configured grant PUSCH is transmitted.

Abstract: Terminal device attempts to transmit a PUSCH scheduled by a DCI format after the channel is sensed to be idle. When the start of the PUSCH is not aligned with an FFP-u, in a case that the channel access mode is configured to as semi-static, the terminal device does not initiate a COT, regardless of indication by a ChannelAccess-CPext field in the DCI format.

Abstract: A terminal device includes configuration circuitry configured to determine multiple resources for configured repetitions for a PUSCH based on information indicating a starting OFDM symbol index in a slot, a length of a PUSCH in a slot and the number of repetitions, and baseband circuitry configured to generate one or more instances each of which includes one or more resources from the multiple resources, wherein the baseband circuitry is configured to determine the each of the one or more instances such that the each of the one or more instances has no gap in time domain, or the baseband circuitry is configured to determine each of the one or more instances such that the each of the one or more instances has no gap for downlink reception in time domain.

Abstract: An object of the present invention is to provide a new electroless plating film which can prevent the diffusion of molten solder to a metal material constituting a conductor. The present invention is an electroless Co—W plating film, wherein content of W is in an amount of 35 to 58 mass % and a thickness of the film is 0.05 ?m or more.

Abstract: An object of the present invention is to provide a new electroless plating film which can prevent the diffusion of molten solder to a metal material constituting a conductor. The present invention is an electroless Co—W plating film, wherein content of W is in an amount of 35 to 58 mass % and a thickness of the film is 0.05 ?m or more.

Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed. Over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11, insulating films 14, 15, 16 are formed. An opening is formed in those insulating films and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 to form the opening. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance. By interposing the insulating film 14 therebetween with a higher density of Si (silicon) atoms than the insulating film 11, an electrically weak interface is prevented from being formed.

Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

Abstract: A semiconductor device has a magnetoresistive element, a bit line over the magnetoresistive element, and a yoke cover over the bit line. To form the yoke cover, a laminate film is first formed over the bit line, the laminate film having a first barrier metal layer, a magnetic layer, and a second barrier metal layer which are formed successively over the bit line. Then, the laminate film is subjected to: reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas, reactive ion etching with a gas mixture of carbon monoxide (CO), an ammonia (NH3) gas, and an argon (Ar) gas, and reactive ion etching with a gas mixture of a carbon tetrafluoride (CF4) gas and an argon (Ar) gas.

Abstract: Provided is a semiconductor device causing less peeling between an insulating film having on the top surface thereof a strap line and a wiring formed on the bottom surface of the insulating film, and a manufacturing method of the semiconductor device. The semiconductor device according to the invention has a semiconductor substrate, first wiring layers formed over the semiconductor substrate and having a peripheral wiring and a first wiring, a second wiring layer formed over the first wiring layers and having a second wiring, and a third wiring layer formed over the second wiring layer and having a magnetic storage element. The diffusion preventive films formed over the first wiring are each comprised of a SiCN film or an SiC film and the diffusion preventive film formed over the second wiring is comprised of SiN.

Abstract: To provide a manufacturing method of a semiconductor device which can improve the reliability of the semiconductor device. A first insulating film for covering a semiconductor element formed in a semiconductor substrate is formed by a thermal CVD method or the like which has a good embedding property. A second insulating film is formed to cover the first insulating film by a plasma CVD method which has excellent humidity resistance. A plug is formed to penetrate the first insulating film and the second insulating film. A third insulating film comprised of a low-k film having a relatively low dielectric constant is formed over the second insulating film. A wiring is formed in the third insulating film by a damascene technique to be electrically coupled to the plug.

Abstract: To provide a semiconductor device in which the deterioration of the rewrite property is suppressed. In a memory cell region, magnetoresistive elements in a semiconductor magnetic-storage device are formed in an array shape in a mode that the magnetoresistive elements are arranged at portions where digit lines extending in one direction intersect bit lines extending in the direction approximately orthogonal to the digit lines. The digit line and the bit line have such a wiring structure constituted by covering a copper film to be a wiring main body with a cladding layer. One end side of the magnetoresistive element is electrically coupled to the bit line via a top via formed from a non-magnetic material.

Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

Abstract: To provide a manufacturing method of a semiconductor device which can improve the reliability of the semiconductor device. A first insulating film for covering a semiconductor element formed in a semiconductor substrate is formed by a thermal CVD method or the like which has a good embedding property. A second insulating film is formed to cover the first insulating film by a plasma CVD method which has excellent humidity resistance. A plug is formed to penetrate the first insulating film and the second insulating film. A third insulating film comprised of a low-k film having a relatively low dielectric constant is formed over the second insulating film. A wiring is formed in the third insulating film by a damascene technique to be electrically coupled to the plug.

Abstract: A copper interconnection layer is formed in an interconnection trench at a surface of an interlayer insulating film. A diffusion preventing insulating film is formed to cover the copper interconnection layer and is made of at least one of SiC and SiCN. An insulating film is formed on the copper interconnection layer with the diffusion preventing insulating film interposed and is made of SiN.

Abstract: The reliability of a semiconductor device having an embedded wire in the lowest layer wire is improved. In a main surface of a semiconductor substrate, MISFETs are formed and over the main surface, insulating films 10, 11 are formed. In the insulating films 10, 11 a contact hole is formed and a plug is embedded therein. Over the insulating film 11 in which the plug is embedded, insulating films 14, 15, 16 are formed and an opening is formed in the insulating films 14, 15, 16 and a wire is embedded therein. The insulating film 15 is an etching stopper film when etching the insulating film 16 in order to form the opening, containing silicon and carbon. The insulating film 11 has a high hygroscopicity and the insulating film 15 has a low moisture resistance, however, by interposing the insulating film 14 therebetween and making the insulating film 14 have a higher density of the number of Si (silicon) atoms than that of the insulating film 11, an electrically weak interface is prevented from being formed.

Abstract: An AlCu alloy interconnect line (100) including a TiN barrier layer (110), a lower Ti metal layer (120), an AlCu layer (130) and a TiN cap layer (140) is formed on a plasma oxide film formed on a semiconductor substrate in which devices are formed. Heat treatment is conducted to cause Al contained in the AlCu layer (130) and Ti contained in the lower Ti metal layer (120) to react with each other, thereby forming a lower AlTi alloy layer (150) in a lower portion of the AlCu layer (130). A via hole (170) is thereafter formed. A current path extending from the via hole (170) to reach the lower AlTi alloy layer (150) is ensured without passing through the AlCu layer (130), allowing electromigration resistance to be improved.