Patents by Inventor Shoichi Narahashi

Shoichi Narahashi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 7672395
    Abstract: A predistorter includes: a divider that divides an input signal and supplies the divided input signal to a linear transmission path and a distortion generating path; a (2k?1)th-order distortion generator that raises the signal supplied to the distortion generating path to the (2k?1)th power to generate a distortion component; a vector adjuster that adjusts the amplitude and phase of the output of the (2k?1)th-order distortion generator; and an adder that sums up the output of the vector adjuster and the output of the linear transmission path to generate a predistorted signal r(t), in which the (2k?1)th-order distortion generator comprises: a (2k?1)th-order multiplier (27B4) that raises the divided signal to the (2k?1)th power; a lower-than-(2k?1)th-order multiplier (27B3, 27B2, 27B1) that raises the divided signal to the 5th, 3rd and 1st power, respectively; a vector adjuster (27C3, 27C2, 27C1) that adjusts the amplitude and phase of the output of the lower-than-(2k?1)th-order multiplier; and an adder (27D) t
    Type: Grant
    Filed: October 12, 2005
    Date of Patent: March 2, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Shinji Mizuta, Yasunori Suzuki, Shoichi Narahashi
  • Patent number: 7656249
    Abstract: First, second and third matching parts 110, 120, and 130 are connected in series between a circuit element 199 whose impedance has a frequency characteristic and a circuitry 198 having a constant impedance. The second matching part 120 has the capability of converting impedances. The first matching part 110 operates as an element having reactance values according to any of frequency bands selected by exclusive switching between on and off of switches 118, 119 and the third matching part 130 operates as an element having reactance values according to any of the frequency bands selected by switching between on and off of a switch 133, thereby providing matching in each frequency band. A seventh reactance circuit 131 is configured on the basis of an interdependence relation with the configuration of a fifth reactance circuit 115 and an eighth reactance circuit 132.
    Type: Grant
    Filed: May 6, 2008
    Date of Patent: February 2, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7656228
    Abstract: A matching circuit includes a demultiplexer for demultiplexing a signal outputted from an amplification device into signals of respective frequency bands, and at least two matching blocks which are connected to the demultiplexer, are respectively fed with the signals of the respective frequency bands, and perform impedance matching in the respective frequency bands of the inputted signals. Impedance matching is performed on each of the demultiplexed signals of the respective frequency bands, thereby achieving a matching circuit capable of efficiently performing impedance matching in the respective frequency bands. With this matching circuit, it is possible to achieve a multi-band amplifier capable of simultaneously amplifying signals of multiple frequency bands with high efficiency and low noise.
    Type: Grant
    Filed: October 29, 2007
    Date of Patent: February 2, 2010
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20090315622
    Abstract: In a feedforward amplifier (200) including a signal cancellation circuit (10) and a distortion eliminating circuit (20), a harmonic reaction amplifier (130) is used as a main amplifier of the signal cancellation circuit. A controller (43) obtains an adjacent channel leakage power ratio (ACLR) and a power efficiency from an output of the feedforward amplifier (200) and controls the gate bias voltages of two transistors (33A and 33B) of the harmonic reaction amplifier (130) to maximize the power efficiency under the condition that the ACLR is less than or equal to a reference value.
    Type: Application
    Filed: February 18, 2009
    Publication date: December 24, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Yasunori Suzuki, Shoichi Narahashi
  • Patent number: 7634238
    Abstract: A lookup table type predistorter for reading out distortion compensation data by using a difference signal between a power amplifier input signal and an output signal as a reference signal; wherein N input side variable band signal extractors extract transmitting signals in N frequency bands from the input signal, N output side variable band signal extractors extract signals in N frequency bands from the output of power amplifier, and N difference detectors detect differences between N frequency band signals respectively detected at the input side and the output side as N reference signals, which are used to read out N compensation data from N lookup tables, the N compensation data are added to the transmitting signals in N frequency bands, and N results of addition are combined to produce an output of the predistorter.
    Type: Grant
    Filed: June 1, 2006
    Date of Patent: December 15, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yasunori Suzuki, Shoichi Narahashi
  • Publication number: 20090264089
    Abstract: A lookup table type predistorter for reading out distortion compensation data by using a difference signal between a power amplifier input signal and an output signal as a reference signal; wherein N input side variable band signal extractors extract transmitting signals in N frequency bands from the input signal, N output side variable band signal extractors extract signals in N frequency bands from the output of power amplifier, and N difference detectors detect differences between N frequency band signals respectively detected at the input side and the output side as N reference signals, which are used to read out N compensation data from N lookup tables, the N compensation data are added to the transmitting signals in N frequency bands, and N results of addition are combined to produce an output of the predistorter.
    Type: Application
    Filed: June 29, 2009
    Publication date: October 22, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Yasunori SUZUKI, Shoichi NARAHASHI
  • Patent number: 7602241
    Abstract: A multiband Doherty amplifier having a configuration including a divider which divides an input signal into two, a carrier amplifier which amplifies one of the divided signals, a delay element which delays the other divided signal, a peak amplifier which amplifies the output signal of the delay element, an impedance converter which is connected to an output port of the carrier amplifier and performs predetermined impedance conversion and a combiner which combines the output signals of the peak amplifier and the impedance converter, wherein the electric length of the delay element is the same as the electric length of the impedance converter and the impedance converter has N (N?2) cascade-connected impedance conversion transmission lines and performs substantially the same impedance conversion at each of the N frequencies.
    Type: Grant
    Filed: June 15, 2007
    Date of Patent: October 13, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yasunori Suzuki, Shoichi Narahashi
  • Patent number: 7583168
    Abstract: An object of the present invention is to provide a resonator capable of constituting a variable filter which has a small size, high mass productivity, low loss and high reproducibility of frequency. According to the present invention, a resonator having a line structure formed on a dielectric substrate 2, is reduced in size by providing a counter electrode 6 in the direction perpendicular to a surface of a resonant line 4 for forming a capacitive reactance which is added to the resonance circuit. The resonator can be further reduced in size by providing widened parts 7a, 7b on the resonant line with the use of the skin effect of an electric signal propagating in the resonant line, so as to enable a large capacitive reactance to be obtained, and by providing the widened parts and the counter electrodes for a part on the resonant line where a magnitude of voltage standing wave is high.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: September 1, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Kunihiro Kawai, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20090212886
    Abstract: A dual-band bandpass filter according to the present invention includes a plurality of dual-band bandpass resonators. The dual-band bandpass resonator includes a central conductor having a central axis aligned with an input/output direction, a pair of grounding conductors, a central conductor short-circuit part and a pair of stub conductors that are formed on a surface of a dielectric substrate. The pair of grounding conductors are disposed on the opposite sides of the central conductor with a space interposed therebetween. The central conductor short-circuit part short-circuits the pair of grounding conductors, and one end of the central conductor is connected to the central conductor short-circuit part.
    Type: Application
    Filed: February 18, 2009
    Publication date: August 27, 2009
    Applicant: NTT DoCoMo, Inc
    Inventors: Kei Satoh, Shoichi Narahashi
  • Publication number: 20090206942
    Abstract: A non-reciprocal circuit device comprising a magnetic plate F1; center conductors L1, L2, and L3 that are mutually insulated and disposed so as to intersect on magnetic plate F1; a plane conductor P1 that is disposed facing the center conductors with magnetic plate F1 placed therebetween, the plane conductor being connected to first ends of all the center conductors; matching capacitors C1 to C3 that have first ends grounded electrically and second ends connected to second ends of the center conductors; first matching circuits that have first ends connected to the second ends of the center conductors and second ends that are input/output ports; and a second matching circuit that has a first end connected to or integrated with the plane conductor and a second end grounded electrically.
    Type: Application
    Filed: February 17, 2009
    Publication date: August 20, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Takayuki FURUTA, Hiroshi OKAZAKI, Shoichi NARAHASHI
  • Patent number: 7573356
    Abstract: A tunable filter wherein coupling sections (51, 52, 53) are formed in an input/output line along its lengthwise direction, each coupling section including a gap (G51, G52, G53) formed in the input/output line and coupling electrodes (E5a1, E5b1, E5c1) arranged in the gap in the longitudinal direction of the input/output line; and resonators (41, 42) capable of varying the resonance frequency are connected to the input/output line at the positions between adjacent ones of the coupling sections. Switch means (71, 72, 73) are provided for selectively grounding the coupling electrodes of the coupling sections or selectively short-circuiting the coupling electrodes and the input/output line, and resonance frequency varying means (4m1, 4m2) are provided for varying the resonance frequency of the one or more resonators in association with the switch means.
    Type: Grant
    Filed: February 22, 2007
    Date of Patent: August 11, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Kunihiro Kawai, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7564699
    Abstract: A planar circuit housing (300) for containing a planar circuit (120) is disclosed. The planar circuit housing (300) comprises a support portion (341) for supporting edges of the planar circuit (120), the support portion (341) being provided on at least one housing internal surface substantially perpendicular to the planar circuit substrate (120); an upper cavity (380) in the housing (300) above the planar circuit (120); and a lower cavity (382) in the housing (300) below the planar circuit (120), the lower cavity (382) having the same sizes as the upper cavity (380) in directions parallel with the planar circuit substrate (120).
    Type: Grant
    Filed: September 19, 2005
    Date of Patent: July 21, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Daisuke Koizumi, Kei Satoh, Shoichi Narahashi, Tatsuro Masamura
  • Publication number: 20090179711
    Abstract: The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a ?-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this ?-type circuit and a load whose characteristics do not depend on the frequency to be Z0, the influence of the second matching block is removed.
    Type: Application
    Filed: March 17, 2009
    Publication date: July 16, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20090167458
    Abstract: The present invention has for its object to provide a matching circuit with multiband capability which can be reduced in size, even if the number of handled frequency bands rises. The matching circuit of the present invention comprises a load having frequency-dependent characteristics, a first matching block connected with one end to the load with frequency-dependent characteristics, and a second matching block formed by lumped elements connected in series to the first matching block. And then, when a certain frequency band is used, matching is obtained with the series impedance of the first matching block and the second matching block. When a separate frequency band is used, a ?-type circuit is constituted by connecting auxiliary matching blocks to both sides of the second matching block. Next, at the same frequency, by taking the combined impedance of this ?-type circuit and a load whose characteristics do not depend on the frequency to be Z0, the influence of the second matching block is removed.
    Type: Application
    Filed: March 3, 2009
    Publication date: July 2, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Atsushi FUKUDA, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7539464
    Abstract: A power series type predistorter for multi-frequency bands includes a linear transmission path PL provided with a delay element 5 and distortion generating paths PD1 and PD2 for a plurality of frequency bands in parallel; wherein each of the distortion generating paths PD1 and PD2 for a plurality of frequency bands includes variable band signal extractors 111 and 112 for extracting a signal in each frequency band from input signals and distortion generators 131a and 132a which is provided with the extracted signals and which generates at least one of the odd number distortion components of the signals and making it as an output from the distortion generating paths PD1 and PD2 for frequency bands; and wherein the frequency band controller 6 controls frequency bands of the variable band signal extractors 111 and 112.
    Type: Grant
    Filed: June 5, 2006
    Date of Patent: May 26, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Yasunori Suzuki, Shoichi Narahashi
  • Patent number: 7538635
    Abstract: Four variable reactance means are connected, respectively, to the four ports of a quadrature hybrid circuit which is composed of four ring-linked two-port circuits each composed of a transmission line or multiple lumped reactance elements, so that by changing the reactance values of the four variable reactance means, operating frequency of the quadrature hybrid circuit can be selectively changed.
    Type: Grant
    Filed: April 5, 2006
    Date of Patent: May 26, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20090121803
    Abstract: A duplexer according to the present invention includes a first port, a second port and a third port for external input/output, a first path formed between the first port and the third port, a second path formed between the second port and the third port, a phase shifting part provided for each path, and a resonating part provided for each path. At least any of the resonating parts has a ring conductor having a length equal to one wavelength at a resonant frequency or an integral multiple thereof, a plurality of passive circuits, and a plurality of switches each of which is connected to a different part of the ring conductor at one end and to any of the passive circuits at the other end. A switch may simply be connected to a ground conductor instead of being connected to the passive circuit.
    Type: Application
    Filed: October 28, 2008
    Publication date: May 14, 2009
    Applicant: NTT DoCoMo, Inc.
    Inventors: Kunihiro KAWAI, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7532075
    Abstract: A bias circuit 100 comprises: a first reactance means 2 connected to an AC circuit; a second reactance means 3 connected to the first reactance means 2; a switch 7 connected to a connection point 210 between them; a third reactance means 8 connected to the switch 7; a capacitive means 4 connected to the second reactance means 3; and a DC circuit 5 connected to a connection point 220 between the second reactance means 3 and the capacitive means 4; wherein the connection point 220 is grounded in terms of alternating current. The connection point 210 is at a position such that impedance as viewed from the connection point 210 toward the capacitive means 4 is sufficiently large at a second frequency different from a first frequency. Impedance as viewed from a bias point 800 toward the bias circuit is sufficiently large at any of the frequencies.
    Type: Grant
    Filed: October 25, 2007
    Date of Patent: May 12, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Patent number: 7508269
    Abstract: A stabilization circuit which includes serial stabilization blocks connected in series, with respect to a signal to be amplified, with an amplification element; parallel stabilization blocks connected in parallel with the amplification element, with respect to a signal to be amplified; and a switch part capable of connecting and disconnecting said parallel stabilization block, with respect to a signal to be amplified.
    Type: Grant
    Filed: November 20, 2006
    Date of Patent: March 24, 2009
    Assignee: NTT DoCoMo, Inc.
    Inventors: Atsushi Fukuda, Hiroshi Okazaki, Shoichi Narahashi
  • Publication number: 20090066443
    Abstract: A signal selecting device according to the present invention has two input/output ports, a plurality of resonating parts, a plurality of impedance transforming parts, and a controlling part. The resonating parts have a ring conductor having a length equal to one wavelength at a resonant frequency or an integral multiple thereof and a plurality of switches each of which is connected to a different part of the ring conductor at one end and to a ground conductor at the other end. The controlling part controls the state of the switches. The resonating parts are disposed in series between the two input/output ports. The impedance transforming parts are disposed between the input/output ports in such a manner that the impedance transforming parts at the both ends are disposed between the input/output port and the resonating part and the remaining impedance transforming parts are disposed between the resonating parts.
    Type: Application
    Filed: September 9, 2008
    Publication date: March 12, 2009
    Applicant: NTT DoCoMo, Inc
    Inventors: Kunihiro KAWAI, Kei Satoh, Hiroshi Okazaki, Shoichi Narahashi