Patents by Inventor Shoichi Watanabe

Shoichi Watanabe has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20090057749
    Abstract: A memory cell includes a floating gate electrode, a first inter-electrode insulating film and a control gate electrode. A peripheral transistor includes a lower electrode, a second inter-electrode insulating film and an upper electrode. The lower electrode and the upper electrode are electrically connected via an opening provided on the second inter-electrode insulating film. The first and second inter-electrode insulating films include a high-permittivity material, the first inter-electrode insulating film has a first structure, and the second inter-electrode insulating film has a second structure different from the first structure.
    Type: Application
    Filed: August 8, 2008
    Publication date: March 5, 2009
    Inventors: Kenji GOMIKAWA, Tadashi Iguchi, Mitsuhiro Noguchi, Shoichi Watanabe
  • Publication number: 20090028284
    Abstract: A method of controlling the criticality of a nuclear fuel cycle facility includes steps of producing a reactor fuel by adding less than 0.1% by weight of gadolinia to a uranium dioxide powder with a uranium enrichment of greater than 5% by weight and controlling the effective neutron multiplication factor of a uranium dioxide system in a step of handling the reactor fuel to be less than or equal to the maximum of the effective neutron multiplication factor of a uranium dioxide system with a uranium enrichment of 5% by weight.
    Type: Application
    Filed: May 14, 2008
    Publication date: January 29, 2009
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventors: Shoichi Watanabe, Ishi Mitsuhashi, Kenichi Yoshioka
  • Publication number: 20080142870
    Abstract: A nonvolatile semiconductor memory according to an example of the present invention includes first and second diffusion layers, a channel formed between the first and second diffusion layers, a gate insulating film formed on the channel, a floating gate electrode formed on the gate insulating film, an inter-gate insulating film formed on the floating gate electrode, and a control gate electrode formed on the inter-gate insulating film. An end portion of the inter-gate insulating film in a direction of channel length is on an inward side of a side surface of the floating gate electrode or a side surface of the control gate electrode.
    Type: Application
    Filed: December 18, 2007
    Publication date: June 19, 2008
    Applicant: KABUSHIKI KAISHA TOSHIBA
    Inventor: Shoichi Watanabe
  • Publication number: 20070278560
    Abstract: A nonvolatile semiconductor storage device includes a semiconductor substrate, and at least one memory cell formed on the semiconductor substrate, the at least one memory cell having a gate electrode unit in which a floating gate electrode and a control gate electrode are stacked, at least part of the control gate electrode being silicidated. The nonvolatile semiconductor storage device further includes at least one dummy transistor formed on the semiconductor substrate, the at least one dummy transistor having a first dummy electrode, and a second dummy electrode which has a current leakage path and which is stacked on the first dummy electrode.
    Type: Application
    Filed: May 31, 2007
    Publication date: December 6, 2007
    Inventor: Shoichi WATANABE
  • Patent number: 6557150
    Abstract: A method of extracting timing characteristics from transistor circuit data of modularity design products (a module) such as a CPU core in which the extracted timing characteristics are used for the timing verification of a circuit including a module to be extracted and timing constraints when logical synthesis or timing-driven layout is made. Particularly, since conditions fit for a timing rule of the module are included in timing characteristics when timing verification is executed by simulation, verification free of pseudo error is enabled. Also, the configuration of a timing characteristic library, a storage medium storing it and an LSI designing method using the storage medium are provided.
    Type: Grant
    Filed: February 7, 2000
    Date of Patent: April 29, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Tetsuroo Honmura, Takashi Nakajima, Kenzo Goto, Shoichi Watanabe
  • Patent number: 6239373
    Abstract: An end structure for a shielding wire is provided with a covering part 20 for covering an end portion 18b of a braided wire 18. In arrangement, an end 19a of an outside insulating rind 19 is positioned so as to recede from an end 18a of the braided wire 18. The covering part 20 is welded to an inside insulating rind 17 in the vicinity of the end portion 18b of the braided wire 18. Owing to the provision of the covering part 20, it is possible to prevent the braided wire 18 from being loosen from the end portion 18b.
    Type: Grant
    Filed: January 12, 1999
    Date of Patent: May 29, 2001
    Assignee: Yazaki Corporation
    Inventors: Kei Sato, Yasumichi Kuwayama, Shigeji Kudo, Shoichi Watanabe, Nobuaki Yamakawa
  • Patent number: 5720341
    Abstract: A duplex heat exchanger of the so-called stacked type has in principle a plurality of plate-shaped tubular elements (1) which are stacked side by side or one on another and a plurality of fins (2) each intervening between the adjacent tubular elements. Each tubular element is composed of flat tubular segments (3a, 4a) separated from each other and each communicating with one of bulged header portions (3b, 4b) of the tubular element, so that flow paths (3, 4) for heat exchanging media are formed through each tubular element. Two or more unit heat exchangers (X, Y) are defined integral with each other within the duplex heat exchanger, since the adjacent tubular elements (1) communicate with each other through the header portions (3b, 4b).
    Type: Grant
    Filed: November 12, 1996
    Date of Patent: February 24, 1998
    Assignee: Showa Aluminum Corporation
    Inventors: Mikio Watanabe, Takayuki Yasutake, Shoichi Watanabe, Yuji Hasegawa
  • Patent number: 5667857
    Abstract: The present invention provides a molding sheet material having a sandwich structure produced by preparing a fiber reinforced thermoplastic resin layer (A) reinforced with a woven fabric or a knitted web and a fiber reinforced thermoplastic resin layer (B) reinforced with a random mat and using the layer (A) as a core layer and the layer (B) as a skin layer, or using the layer (B) as a core layer and the layer (A) as a skin layer. When this sheet material is molded into a three-dimensional structure, the layer (B) serves as a cushion to prevent the occurrence of a wrinkle or a crease in the layer (A). A toe puff for a safety shoe having a light weight and excellent pressing resistance can be prepared through the molding of this sheet material. In the sheet materials, the core layer or the skin layer consisting of a thermoplastic resin reinforced with a woven fabric or a knitted web of a reinforcing fiber may be prepared from a woven fabric or a knitted web of a reinforcing fiber alone.
    Type: Grant
    Filed: August 7, 1996
    Date of Patent: September 16, 1997
    Assignee: Nitto Boseki Co., Ltd.
    Inventors: Shoichi Watanabe, Hirokazu Inoguchi, Yoshihiro Kanzaka, Yoshiharu Tanaka, Hideji Ikehara, Ryuji Saiki, Nobukatsu Yamato, Tomohiro Mori, Minoru Senna
  • Patent number: 5560985
    Abstract: The present invention provides a molding sheet material having a sandwich structure produced by preparing a fiber reinforced thermoplastic resin layer (A) reinforced with a woven fabric or a knitted web and a fiber reinforced thermoplastic resin layer (B) reinforced with a random mat and using the layer (A) as a core layer and the layer (B) as a skin layer, or using the layer (B) as a core layer and the layer (A) as a skin layer. When this sheet material is molded into a three-dimensional structure, the layer (B) serves as a cushion to prevent the occurrence of a wrinkle or a crease in the layer (A). A toe puff for a safety shoe having a light weight and excellent pressing resistance can be prepared through the molding of this sheet material. In the sheet materials, the core layer or the skin layer consisting of a fiber reinforced thermoplastic resin reinforced with a woven fabric or a knitted web of a reinforcing fiber may be prepared from a woven fabric or a knitted web of a reinforcing fiber alone.
    Type: Grant
    Filed: September 27, 1993
    Date of Patent: October 1, 1996
    Assignee: Nitto Boseki Co., Ltd.
    Inventors: Shoichi Watanabe, Hirokazu Inoguchi, Yoshihiro Kanzaka, Yoshiharu Tanaka, Hideji Ikehara, Ryuji Saiki, Nobukatsu Yamato, Tomohiro Mori, Minoru Senna
  • Patent number: 5256475
    Abstract: A fabric for a fiber-reinforced thermoplastic composite material is disclosed, which comprises the warp and the weft wherein the warp comprises reinforcing fiber and the weft comprises high molecular weight grade polyether ether ketone resin yarns and low molecular weight grade polyether ether ketone resin yarns, or wherein the warp comprises reinforcing fiber and at least one of high molecular weight grade polyether ether ketone resin yarns and low molecular weight grade polyether ether ketone resin yarns and the weft comprises reinforcing fiber and at least one of high molecular weight grade polyether ether ketone resin yarns and low molecular weight grade polyethe ether ketone resin yarns. The fabric can be laminated or molded into a product having an excellent toughness and shock resistance in almost the same heating time as the conventional one.
    Type: Grant
    Filed: October 28, 1992
    Date of Patent: October 26, 1993
    Inventors: Ryota Koyanagi, Mikiya Fujii, Shoichi Watanabe, Hirokazu Inoguchi
  • Patent number: 5206078
    Abstract: A fabric for a printed circuit-board characterized by that it is composed of one or more fiber(s) selected from the group consisting of polyether ether ketone fiber, polyetherimide fiber and polysulphone fiber, and glass fiber, and a printed circuit-board employing the fabric as its base material.
    Type: Grant
    Filed: December 14, 1989
    Date of Patent: April 27, 1993
    Assignee: Nitto Boseki Co., Ltd.
    Inventors: Hirokazu Inoguchi, Shoichi Watanabe, Shin Kasai, Keiichi Kato, Mikiya Fujii
  • Patent number: 5168006
    Abstract: Disclosed is a woven fabric used for production of fiber-reinforced thermoplastic resin laminates wherein each or warps and wefts which constitute the fabric comprises at least one kind of thermoplastic resin yarns and at least one kind of reinforcing yarns and the reinforcing yarns of the warps and wefts as such constitute a weave. The weave constituted of only the reinforcing yarns is preferably a plain weave. The fiber-reinforced thermoplastic resin laminates made by compression molding a laminate of said woven fabrics are high in strength.
    Type: Grant
    Filed: November 22, 1989
    Date of Patent: December 1, 1992
    Assignee: Nitto Boseki Co., Ltd.
    Inventors: Hirokazu Inoguchi, Shoichi Watanabe, Shin Kasai, Keiichi Kato, Mikiya Fujii
  • Patent number: 4960724
    Abstract: A method is provided for manufacturing a master slice semiconductor integrated circuit device. Initially, a first total circuit diagram which is to be reformed into a master slice semiconductor integrated circuit device is defined. First and second circuit points on the first total circuit block which are to be used respectively as input and output terminals of the master slice semiconductor integrated circuit device are specified. Next, signal transmitting paths are successively traced from the output to the input of each logic gate located in the signal transmitting paths in actual use. In the course of the tracing, these traced gates are marked and the logic gates actually in use are identified. As a result, in addition to those logic gates having unused output terminals, the gates constituting a closed loop isolated from the signal transmitting paths for transmitting substantial output signals are identified as unnecessary gates and deleted.
    Type: Grant
    Filed: July 11, 1989
    Date of Patent: October 2, 1990
    Assignees: Hitachi, Ltd., Hitachi Microcomputer Engineering Ltd.
    Inventors: Shoichi Watanabe, Takayuki Takei, Terumine Hayashi, Takashi Natabe
  • Patent number: 4929102
    Abstract: A ribbon protector is used for protecting paper from contamination by an ink ribbon in a printer, where the protector is inserted between paper located between a platen and a printing head. The printing head facing the platen performs spacing movement for printing. Two connected plate-like elements are provided with through openings for passage of the pin of the printing head. Mutually engageable electroconductive elements are provided on the inner walls of the two plate-like elements, at least in the area where they are compressed by the tip of the printing head, and spacers which are made from resilient materials are located between the two plate-like elements.
    Type: Grant
    Filed: December 10, 1987
    Date of Patent: May 29, 1990
    Assignee: Oki Electric Co., Ltd.
    Inventors: Minoru Mizutani, Hiroshi Kikuchi, Shoichi Watanabe, Kuniharu Hayashi, Masanori Maekawa
  • Patent number: 4865910
    Abstract: Here is disclosed a glass fiber product for use in the reinforcement of fluororesin which is improved in the adhesiveness to fluororesin. Thus, a glass fiber product for use in the reinforcement of fluororesin pre-treated with perfluoroalkylsilane represented by the following formula:CF.sub.3 --CH.sub.2 --Ch.sub.2 --SiX.sub.3(X is a hydrolyzable group such as alkoxy groups having 1 to 4 carbon atoms) retains an excellent electrical insulation resistance.
    Type: Grant
    Filed: November 22, 1988
    Date of Patent: September 12, 1989
    Assignee: Nitto Boseki Co., Ltd.
    Inventors: Hirokazu Inoguchi, Shoichi Watanabe
  • Patent number: 4248612
    Abstract: Energy or power is recovered from blast furnace exhaust gas by passing it through coarse dust removing mechanism, and then passing the gas through a dry moving bed type dust collecting mechanism for final dust removal, thereafter the blast furnace exhaust gas is supplied to a top pressure recovery turbine.
    Type: Grant
    Filed: April 12, 1979
    Date of Patent: February 3, 1981
    Assignee: Kobe Steel, Limited
    Inventors: Akira Wakabayashi, Shoichi Watanabe, Koji Sato, Hiroyuki Kohama, Katsumi Sakuma