Patents by Inventor Shoichiro Matsumoto

Shoichiro Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8922467
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Grant
    Filed: November 1, 2013
    Date of Patent: December 30, 2014
    Assignee: Nextgen Display Technologies, LLC
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Patent number: 8692749
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: April 8, 2014
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Publication number: 20140061686
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Application
    Filed: November 1, 2013
    Publication date: March 6, 2014
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shoichiro MATSUMOTO, Yasunori KINPARA
  • Patent number: 8659524
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Grant
    Filed: September 13, 2012
    Date of Patent: February 25, 2014
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Publication number: 20130001569
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Application
    Filed: September 13, 2012
    Publication date: January 3, 2013
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Patent number: 8289235
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Grant
    Filed: October 13, 2006
    Date of Patent: October 16, 2012
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Patent number: 7742023
    Abstract: In an electroluminescence display device having, on a display panel, a display portion in which pixels are arranged in matrix, an external connection terminal is placed along a lateral side of the display panel and a vertical scan driver circuit is placed on a lateral side of the display panel which opposes the lateral side on which the external connection terminal is placed. Lines for a horizontal scan driver circuit and for the vertical scan driver circuit can be provided only on three sides of the display panel including the side on which the external connection terminal is provided, a side opposing this side, and another side. By not placing the line for the driver circuits on the remaining side, spaces can be secured on this side for a drive current line which supplies power to an electroluminescence element. With this structure, a size of a frame portion can be reduced while securing sufficient width for the drive current common line.
    Type: Grant
    Filed: July 12, 2006
    Date of Patent: June 22, 2010
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7623102
    Abstract: A variation in a display image and duration of a residual image are reduced to improve quality of display of an active matrix type display device. A control circuit sequentially outputs a pre-charge pulse signal PCG1 and a storage capacitor control pulse signal SC1 in synchronization with a falling edge of a vertical start pulse signal STV. A pre-charge TFT in a pixel in a first row is turned on according to the pre-charge pulse signal PCG1. As a result, a source and a gate of a driver TFT are short-circuited, both an electric potential at the gate and an electric potential at the source of the driver TFT become a positive power supply electric potential PVdd, and the driver TFT is turned off. After that, the storage capacitor control pulse signal SC1 rises to a high level, and the electric potential at the gate of the driver transistor is raised by capacitive coupling. With this, electric characteristics of the driver TFT are initialized.
    Type: Grant
    Filed: March 10, 2006
    Date of Patent: November 24, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7499121
    Abstract: A display capable of inhibiting a transistor from an instable operation resulting from fluctuation of the potential of a shielding film and suppressing occurrence of a malfunction is provided. This display comprises a first region including a first transistor, a first shielding film provided on the first region, arranged on a region corresponding to the first transistor and supplied with a first potential, a second region including a second transistor and a second shielding film provided on the second region, arranged on a region corresponding to the second transistor and supplied with a second potential.
    Type: Grant
    Filed: December 22, 2005
    Date of Patent: March 3, 2009
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yukihiro Noguchi, Shoichiro Matsumoto, Naoya Sotani, Daisuke Ide, Yasutaka Kobayashi, Yoshiyuki Ishizuka, Isao Hasegawa
  • Patent number: 7397447
    Abstract: A light emitting display having an emissive element which emits light in response to a supplied current, comprises a drive current generating element for generating a drive current for allowing light to be emitted from the emissive element, a data line onto which a voltage signal and a current signal corresponding to data regarding an amount of light emission from the emissive element are sequentially supplied, and a voltage storage element connected to the data line and for sequentially storing a charge voltage based on the voltage signal and the current signal corresponding to data regarding the amount of light emission.
    Type: Grant
    Filed: March 30, 2004
    Date of Patent: July 8, 2008
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7289088
    Abstract: An organic electroluminescent (EL) display device has a touch panel function and includes a display panel that has first and second light sources disposed along sides of the display portion and first and second light detecting portions disposed on sides of the display portion opposite the light sources. The display device includes a plurality of organic EL display elements disposed in a matrix on the display portion and a plurality of organic EL light source elements disposed in a row in each of the light source portions. The light detecting portions include a plurality of detection light sensors and a reference light sensor disposed in a row in each of the light detecting portions. The display device also includes a comparator that compares an output of the detection light sensors with the output of the reference light sensor.
    Type: Grant
    Filed: September 24, 2004
    Date of Patent: October 30, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7215304
    Abstract: A characteristic of a driving transistor which drives a diode is made to differ in terms of current driving capability from that of a switching transistor. The current driving capability of the driving transistor is made lower than that of the switching transistor.
    Type: Grant
    Filed: February 7, 2003
    Date of Patent: May 8, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Hiroshi Tsuchiya, Yukihiro Noguchi, Shoichiro Matsumoto
  • Publication number: 20070096135
    Abstract: A drive current line which supplies power to an EL element includes a branch line which is provided in a display region and a trunk line having a larger cross sectional area than the branch line and which is provided along two or more sides of a peripheral portion of a display region. By providing the trunk line to surround the display region, the percentage of the trunk line along the route of the drive power supply line from a power supply terminal to a pixel is increased. With this structure, a voltage drop of the drive power supply is reduced and uniform power supply to each EL element of the EL panel is realized.
    Type: Application
    Filed: October 2, 2006
    Publication date: May 3, 2007
    Inventor: Shoichiro Matsumoto
  • Patent number: 7209131
    Abstract: A display capable of excellently writing data when making transition to a standby operation mode is obtained. This display comprises a pixel part having a memory, a power supply circuit formed on the same substrate as the pixel part for operating the memory and a control circuit writing data in the memory after the voltage of the power supply circuit reaches a prescribed value. Thus, the control circuit writing the data in the memory after the voltage of the power supply circuit reaches the set value is so provided that the power supply circuit completely rises and a through current is suppressed in data writing, whereby the data is excellently written in the memory.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: April 24, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Publication number: 20070085782
    Abstract: A capacitance setting line is disposed at the top end of a pixel, a light emission setting line is disposed at the bottom end of the pixel, and a gate line is disposed at the center between both the lines. A selection transistor, a potential control transistor and a capacitor are disposed between the gate line and a capacitance setting line. A short-circuit transistor, a drive transistor and a drive control transistor are disposed between the gate line and the light emission setting line. With such an arrangement, the efficient arrangement of wiring contacts can be performed, and an aperture ratio can be increased.
    Type: Application
    Filed: October 13, 2006
    Publication date: April 19, 2007
    Inventors: Shoichiro Matsumoto, Yasunori Kinpara
  • Patent number: 7202841
    Abstract: Pixels for three colors, namely, R, G, and B, are arranged in a stripe manner. Two data lines DL are placed in a space between pixel columns for every other pixel column, and a power supply line is placed in a space between the pixel columns, where a data line is not placed. Pixel columns for colors with the best current efficiency and with the least current efficiency share a single power supply line, while pixel columns for colors with intermediate current efficiency share another power supply line.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: April 10, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7173607
    Abstract: A signal detector capable of linearly reading data at a high speed is obtained. This signal detector comprises a plurality of signal transfer transistors arranged in the form of a matrix, signal detection means connected to a first terminal of each signal transfer transistor, a data line connected to a second terminal of each signal transfer transistor, a control line connected to the gate of each signal transfer transistor, a gate line driving circuit for driving the control line, data read lines connected to a plurality of prescribed data lines through switching transistors respectively, and a switch driving circuit for driving the switching transistors corresponding to the aforementioned plurality of prescribed data lines substantially at the same timing. Thus, a plurality of prescribed data are simultaneously read for enabling linear data reading and increasing the speed of data reading.
    Type: Grant
    Filed: February 4, 2002
    Date of Patent: February 6, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Ryoichi Yokoyama
  • Publication number: 20070013629
    Abstract: In an electroluminescence display device having, on a display panel, a display portion in which pixels are arranged in matrix, an external connection terminal is placed along a lateral side of the display panel and a vertical scan driver circuit is placed on a lateral side of the display panel which opposes the lateral side on which the external connection terminal is placed. Lines for a horizontal scan driver circuit and for the vertical scan driver circuit can be provided only on three sides of the display panel including the side on which the external connection terminal is provided, a side opposing this side, and another side. By not placing the line for the driver circuits on the remaining side, spaces can be secured on this side for a drive current line which supplies power to an electroluminescence element. With this structure, a size of a frame portion can be reduced while securing sufficient width for the drive current common line.
    Type: Application
    Filed: July 12, 2006
    Publication date: January 18, 2007
    Inventor: Shoichiro Matsumoto
  • Patent number: 7164399
    Abstract: A power supply line VL is formed with a protruding portion. Contacts are formed in this portion and a drain region of a second transistor is connected to the contact. Because the contacts are provided off line from a primary current flow path of the power supply line, a low resistance can be maintained in the power supply line VL.
    Type: Grant
    Filed: May 29, 2003
    Date of Patent: January 16, 2007
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7154455
    Abstract: A gate line GL is set to an H level to switch on a selection TFT (10) and a short-circuiting TFT (16). A current corresponding to data (data current (negative)) is applied to a data line (Data). In this manner, a current corresponding to the data current flows through a voltage converter TFT (12) and a driver TFT (14) and light is emitted from an organic EL element (50). A gate voltage of the voltage converter TFT (12) and the driver TFT (14) in this process is stored in a storage capacitor (C). Even after the data current is switched off and the selection TFT (10) and the short-circuiting TFT (16) are switched off, the driver TFT (14) continues to apply a current. After a predetermined emission period elapses, an erase line (ESL) is driven to switch an erase TFT (18) on to discharge the storage capacitor (C) and switch the driver TFT (14) off.
    Type: Grant
    Filed: August 29, 2003
    Date of Patent: December 26, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto