Patents by Inventor Shoichiro Matsumoto

Shoichiro Matsumoto has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20060262050
    Abstract: A high quality display is realized with an organic EL display device by reducing a coarse look and variations in brightness on a display panel due to variations in threshold voltages of driver transistors. Also, a cost of the display device is reduced by eliminating a need for an external driver IC. The electroluminescent display device of this invention is of passive drive type that has no TFT in each pixel or of semi-passive drive type that has a pixel selection transistor and an organic EL device in each pixel. With this, an aperture ratio of the pixel is improved and the high quality display is realized by reducing the coarse look. Various kinds of drive circuits such as a horizontal shift register, a data line drive circuit and a vertical shift register are formed on a single glass substrate together with a pixel region in which the electroluminescent device is formed. The data line drive circuit has a first data line drive circuit and a second data line drive circuit.
    Type: Application
    Filed: April 28, 2006
    Publication date: November 23, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takashi Ogawa, Shoichiro Matsumoto, Kyoji Ikeda
  • Publication number: 20060250592
    Abstract: A display capable of inhibiting a transistor from an instable operation resulting from fluctuation of the potential of a shielding film and suppressing occurrence of a malfunction is provided. This display comprises a first region including a first transistor, a first shielding film provided on the first region, arranged on a region corresponding to the first transistor and supplied with a first potential, a second region including a second transistor and a second shielding film provided on the second region, arranged on a region corresponding to the second transistor and supplied with a second potential.
    Type: Application
    Filed: December 22, 2005
    Publication date: November 9, 2006
    Inventors: Yukihiro Noguchi, Shoichiro Matsumoto, Naoya Sotani, Daisuke Ide, Yasutaka Kobayashi, Yoshiyuki Ishizuka, Isao Hasegawa
  • Patent number: 7129937
    Abstract: This invention provides an active matrix type display device where an aperture ratio of each of pixels is improved and a storage value of a storage capacitor is secured. A driving power supply line overlaps a storage capacitor line in each of the pixels to reduce an area formed with the driving power supply line. The storage capacitor line is disposed to wind in zigzag along a plurality of pixel selecting TFTs arrayed in a row, thereby effectively utilizing a pixel area. Furthermore, a longitudinal direction of a contact connecting a source of the pixel selecting TFT and a gate of a driving TFT is disposed parallel to the storage capacitor line.
    Type: Grant
    Filed: September 29, 2004
    Date of Patent: October 31, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Mari Okubo
  • Patent number: 7126593
    Abstract: A first transistor and a second transistor which serve as switches are connected with each other in series between a data line and a gate electrode of a third transistor which drives a diode. A characteristic of the first transistor is made to differ in terms of current driving capability from that of the second transistor. A storage characteristic of one of the first transistor and the second transistor is made higher than that of the other transistor whereas the current driving capability of the other transistor is raised, and so that leakage current in the first and second transistors which are connected in series is significantly reduced.
    Type: Grant
    Filed: December 26, 2002
    Date of Patent: October 24, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7126272
    Abstract: To adjust for differences in service life among light emissive materials used for respective colors by determining the length of a pixel region in the row direction according to the service lives of the light emissive materials. To allow for material change after completion of the laying out process, a light emitting region is formed such that a margin is ensured in the row or column direction within each pixel region.
    Type: Grant
    Filed: September 11, 2003
    Date of Patent: October 24, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Publication number: 20060214889
    Abstract: A variation in a display image and duration of a residual image are reduced to improve quality of display of an active matrix type display device. A control circuit sequentially outputs a pre-charge pulse signal PCG1 and a storage capacitor control pulse signal SC1 in synchronization with a falling edge of a vertical start pulse signal STV. A pre-charge TFT in a pixel in a first row is turned on according to the pre-charge pulse signal PCG1. As a result, a source and a gate of a driver TFT are short-circuited, both an electric potential at the gate and an electric potential at the source of the driver TFT become a positive power supply electric potential PVdd, and the driver TFT is turned off. After that, the storage capacitor control pulse signal SC1 rises to a high level, and the electric potential at the gate of the driver transistor is raised by capacitive coupling. With this, electric characteristics of the driver TFT are initialized.
    Type: Application
    Filed: March 10, 2006
    Publication date: September 28, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7102293
    Abstract: A drive transistor is connected, via its drain region, to a power supply line, and, via its source region, to a transparent electrode of an organic EL element. The channel region is formed bent into a substantially L shape. This arrangement is able to simplify the arrangement of a gate electrode by providing the gate electrode so as to run straight over a channel region in parallel to the power source line. Accordingly, the aperture ratio is increased.
    Type: Grant
    Filed: September 27, 2004
    Date of Patent: September 5, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7084862
    Abstract: Provided is a semiconductor device, including a pixel part or a sensor part, capable of reducing the size of a connector part connecting the semiconductor device with an external IC in correspondence to miniaturization of the semiconductor device also when the semiconductor device is miniaturized. In this semiconductor device, a pixel part or a sensor part arranged in the form of a matrix, a scanning system driving circuit driving a gate line, a data system driving circuit driving a drain line and a scanning system control signal generation circuit generating a control signal for the scanning system driving circuit are formed on an identical substrate. Thus, a scanning system control signal is generated in the substrate, whereby the number of external input signals is reduced. Therefore, the number of signal lines wired to the connector part connected to the semiconductor device is reduced, whereby the size of the connector part can be reduced.
    Type: Grant
    Filed: November 5, 2002
    Date of Patent: August 1, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7078934
    Abstract: The source of a p-channel MOSFET of a level conversion unit is connected to a supply terminal which receives supply voltage VDD. The drain is connected to an output node NO and the gate is connected to an input node I2. The source of a n-channel MOSFET is connected to an input node I2, the drain is connected to the output node NO and the gate is connected to the supply terminal which receives the supply voltage VDD. Input signals CLK1 and CLK2 change complementarily and difference of voltage between the high level and low level of the signals is smaller than difference between the supply voltage VDD and the ground voltage.
    Type: Grant
    Filed: January 12, 2004
    Date of Patent: July 18, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yukihiro Noguchi, Shoichiro Matsumoto
  • Patent number: 7049637
    Abstract: A gate length L of a second TFT (21) is set longer than the gate length L of a peripheral TFT. This arrangement makes it possible to accurately control even a small current, using the second TFT (21).
    Type: Grant
    Filed: July 25, 2003
    Date of Patent: May 23, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 7038240
    Abstract: A color display device comprises a plurality of pixel regions having different areas, which may be realized by differences in the horizontal width, corresponding to different color components. Each pixel region is provided with a first thin film transistor for selectively supplying a signal corresponding to a display information to the pixel region, and a storage capacitor connected to the first thin film transistor for retaining the signal corresponding to the display information. A plan view distance obtained by projecting onto a display plane surface an extent from the capacitor-side end portion of a gate of the first thin film transistor to the storage capacitor is configured identical in the respective pixel regions. With this arrangement, the need to adjust for each color component the writing time and rate of the signal supplied via the first thin film transistor can be eliminated, even when the pixel regions have different areas.
    Type: Grant
    Filed: February 27, 2004
    Date of Patent: May 2, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Publication number: 20060066254
    Abstract: In a state where a selection TFT is off, a control TFT is turned off and a reset control TFT and a short-circuit TFT are turned on. This results in the selection TFT side of a capacitor to be set to PVDD so that the short-circuit TFT turns on and a drive TFT is connected to a diode. Then, a voltage lower then PVDD by a threshold voltage of the drive TFT is set to the gate of the drive TFT. Next, the reset control TFT and the short-circuit TFT are turned off so that the control TFT is turned on. The gate voltage of the drive TFT is shifted by the voltage of a video signal on a data line DL so that the drive TFT turns on and a driving current is supplied to an organic EL device. As a result, the driving current can be controlled, independently of the threshold voltage of the drive TFT, in accordance with the video signal.
    Type: Application
    Filed: September 27, 2005
    Publication date: March 30, 2006
    Inventors: Akifumi Sasaki, Shoichiro Matsumoto
  • Patent number: 7019729
    Abstract: A driving circuit capable of implementing voltage reduction and attaining high-speed operation and high precision while controlling currents consumed by two through current control transistors independently of each other is obtained. This driving circuit comprises a first differential circuit including a first through current control transistor, a second differential circuit including a second through current control transistor and an output circuit including a first conductivity type first output transistor having a gate supplied with an output of the first differential circuit and a second conductivity type second output transistor having a gate supplied with an output of the second differential circuit. A first potential is supplied to the gate of the first through current control transistor of the first differential circuit while a second potential is supplied to the gate of the second through current control transistor of the second differential circuit.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: March 28, 2006
    Assignee: Sanyo Eleectric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Publication number: 20060033016
    Abstract: A photosensor and a display unit are fabricated on the same substrate. Input coordinates are identified by comparing the light quantities at positions (pixels) which is and is not touched by a finger or the like by use of a comparison circuit. Thus, TFTs to form the photosensor can be fabricated on the same substrate in the same process, and also reductions in manufacturing cost and the number of parts can be realized. A region required for disposing a sensor in the circumference becomes unnecessary, thus realizing the miniaturization of the device. Moreover, since a region to be a blind spot is eliminated in the display unit, it is possible to utilize the display unit effectively. It is possible to improve the precision of an input recognition and to uniformly perform detection all over the display unit.
    Type: Application
    Filed: August 4, 2005
    Publication date: February 16, 2006
    Applicant: SANYO ELECTRIC CO., LTD.
    Inventors: Takashi Ogawa, Shoichiro Matsumoto
  • Patent number: 6989813
    Abstract: A low power-consumption active matrix display device including gate lines, drain lines, and pixel electrodes, which are arranged at intersections between the gate lines and the drain lines. A drain line driver is connected to the drain lines to select a drain line and provide the selected drain line with an image signal. A gate line driver is connected to the gate lines to select a predetermined gate line and provide the selected gate line with a gate signal. Level shifters are connected to the drain line driver to operate in a time-dividing manner. Each level shifter supplies the drain line driver with a boosted voltage.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: January 24, 2006
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Naoaki Komiya, Masahiro Okuyama, Koji Hirosawa, Shoichiro Matsumoto
  • Publication number: 20050253531
    Abstract: A semiconductor device for individually controlling an element to be driven, such as an electroluminescence element, includes a switching TFT which operates when a selection signal is applied to its gate and which also captures a data signal, and an element-driving TFT in which its drain is connected with a drive power source, its source is connected with the element to be driven, gate receives a data signal supplied from the switching TFT, for controlling electric power supplied from the drive power source to the element to be driven. The semiconductor device further includes a storage capacitor having a first electrode connected with the switching TFT and with the gate of the element-driving TFT and a second electrode connected between the source of the element-driving TFT and the element to be driven, for holding the gate-source voltage of the element-driving TFT in accordance with the data signal, and a switching element for controlling the potential of the second electrode of the storage capacitor.
    Type: Application
    Filed: July 22, 2005
    Publication date: November 17, 2005
    Inventors: Shoichiro Matsumoto, Keiichi Sano
  • Patent number: 6963324
    Abstract: The switching between the normal operation mode and the memory operation mode is achieved by disposing one retaining circuit 110 for a plurality of pixel elements (for example, 2 or 4 pixel elements). The retaining circuit 110, which is a SRAM, requires considerable circuit space. The sharing of one retaining circuit by a plurality of the pixel elements enables the reduction of the seeming “number of the pixel elements” under the memory operation mode. This can lead to the size reduction of the pixel element, achieving the finer display under the normal operation mode. Also, the reduction in the number of the retaining circuits can further reduce the energy consumption under the memory operation mode, comparing to the case where the retaining circuit 110 is disposed for each of the pixel elements.
    Type: Grant
    Filed: November 19, 2001
    Date of Patent: November 8, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Yusuke Tsutsui, Ryoichi Yokoyama, Shoichiro Matsumoto
  • Patent number: 6961054
    Abstract: A driving circuit capable of reducing current consumption is obtained. This driving circuit comprises an analog buffer circuit outputting a signal responsive to the potential of input data while supplying the data to a data line and a buffer control circuit for substantially stopping the analog buffer circuit when not supplying the data to the data line. Thus, the operating time of the analog buffer circuit is minimized, whereby current consumption can be reduced.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: November 1, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventor: Shoichiro Matsumoto
  • Patent number: 6954194
    Abstract: A semiconductor device for individually controlling an element to be driven, such as an electroluminescence element, includes a switching TFT which operates when a selection signal is applied to its gate and which also captures a data signal, and an element-driving TFT in which its drain is connected with a drive power source, its source is connected with the element to be driven, gate receives a data signal supplied from the switching TFT, for controlling electric power supplied from the drive power source to the element to be driven. The semiconductor device further includes a storage capacitor having a first electrode connected with the switching TFT and with the gate of the element-driving TFT and a second electrode connected between the source of the element-driving TFT and the element to be driven, for holding the gate-source voltage of the element-driving TFT in accordance with the data signal, and a switching element for controlling the potential of the second electrode of the storage capacitor.
    Type: Grant
    Filed: November 18, 2002
    Date of Patent: October 11, 2005
    Assignee: Sanyo Electric Co., Ltd.
    Inventors: Shoichiro Matsumoto, Keiichi Sano
  • Publication number: 20050212787
    Abstract: In an active matrix display apparatus, the drive transistor to drive an OLED self-corrects the operation timing of the drive transistor. A correction transistor controls on and off of the self-correction. The drive circuit self-corrects the operation of the drive transistor by generating a luminance signal which is corrected based on a predetermined signal delivered temporarily and an operation threshold value. The current flowing to the OLED is controlled by gradually changing the voltage of luminance signal from a ramp signal line. After the luminance signal for one frame is inputted to each pixel, the same luminance signal for one frame is inputted to the each pixel in a reversed scanning direction. One frame period is divided into a plurality of subframe periods and the data control circuit inputs respectively the same luminance signal to each pixel in the plurality of subframe periods.
    Type: Application
    Filed: March 21, 2005
    Publication date: September 29, 2005
    Inventors: Yukihiro Noguchi, Satoru Sekine, Kouiti Yamada, Shoichiro Matsumoto