Patents by Inventor Shoji Hotta

Shoji Hotta has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20050090120
    Abstract: In a massed region of each of a plurality of transfer areas of a mask a plurality of light transmission patterns are formed by opening a half-tone film. A phase shifter is disposed in each of the light transmission patterns so that a 180° phase inversion occurs between the lights that transmit through adjacent light transmission patterns. In a sparse region of the plurality of transfer areas a solitary light transmission pattern is formed by opening the half-tone film. Both shape and size are the same among the light transmission patterns, which are disposed symmetrically in both the massed and sparse regions about the center between the transfer areas. The phase shifters in the massed regions are disposed so that the phase of each phase shifter in one of the transfer areas comes to be opposed to that of its counterpart in the other transfer area. In the exposure process, those transfer areas are overlaid one upon another in the same chip region.
    Type: Application
    Filed: October 19, 2004
    Publication date: April 28, 2005
    Inventors: Norio Hasegawa, Katsuya Hayano, Shoji Hotta
  • Patent number: 6774020
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Grant
    Filed: January 31, 2003
    Date of Patent: August 10, 2004
    Assignee: Renesas Technology Corp.
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Patent number: 6656646
    Abstract: A pattern accuracy of a semiconductor integrated circuit device is to be improved. When an ordinary photomask is to be replaced with a resist mask, in setting a planar size of a shielding pattern formed by resist film, a correction quantity L is subtracted from a planar size of a corresponding shielding pattern formed of metal. Conversely, when the resist mask is to be replaced with the ordinary mask, in setting a planar size of the shielding pattern formed of metal, the correction quantity L is added to the planar size of the corresponding shielding pattern formed by resist film.
    Type: Grant
    Filed: July 16, 2002
    Date of Patent: December 2, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shoji Hotta, Norio Hasegawa
  • Publication number: 20030139031
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Application
    Filed: January 31, 2003
    Publication date: July 24, 2003
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Patent number: 6555464
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Grant
    Filed: January 17, 2002
    Date of Patent: April 29, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Publication number: 20030073038
    Abstract: A fabrication method of a semiconductor integrated circuit device, comprises preparing a mask having, on a first main surface of a mask substrate, a first light transmitting region, a second light transmitting region disposed at the periphery of the first light transmitting region and permitting inversion of the phase of a light transmitted through the second light transmitting region relative to a light transmitted through the first light transmitting region, and a light shielding region disposed at the periphery of the second light transmitting region; and transferring a predetermined pattern to a photoresist film over the main surface of a wafer through said mask by a projection exposure reduction treatment, wherein said second light transmitting region is formed from a first film deposited over the first main surface of the mask substrate, said light shielding region is formed by a second film deposited over the first main surface of the mask substrate via said first film, and at least one of said first f
    Type: Application
    Filed: September 30, 2002
    Publication date: April 17, 2003
    Inventors: Shoji Hotta, Norio Hasegawa, Toshihiko Tanaka
  • Publication number: 20030044721
    Abstract: A pattern accuracy of a semiconductor integrated circuit device is to be improved. When an ordinary photomask is to be replaced with a resist mask, in setting a planar size of a shielding pattern formed by resist film, a correction quantity L is subtracted from a planar size of a corresponding shielding pattern formed of metal. Conversely, when the resist mask is to be replaced with the ordinary mask, in setting a planar size of the shielding pattern formed of metal, the correction quantity L is added to the planar size of the corresponding shielding pattern formed by resist film.
    Type: Application
    Filed: July 16, 2002
    Publication date: March 6, 2003
    Applicant: Hitachi, Ltd.
    Inventors: Shoji Hotta, Norio Hasegawa
  • Patent number: 6528400
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Grant
    Filed: December 3, 2001
    Date of Patent: March 4, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Publication number: 20020127848
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Application
    Filed: January 17, 2002
    Publication date: September 12, 2002
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Publication number: 20020076921
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Application
    Filed: December 3, 2001
    Publication date: June 20, 2002
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi
  • Patent number: 6340632
    Abstract: Insulating films 34 through 38 (of which insulating films 34, 36, 38 are silicon nitride films and insulating films 35, 38 are silicon oxide films) are sequentially formed on the wires 33 of the fourth wiring layer and groove pattern 40 is transferred into the insulating film 38 by means of photolithography. An anti-reflection film 41 is formed to fill the grooves 40 of the insulating film 38 and then a resist film 42 carrying a hole pattern 43 is formed. The films are subjected to an etching operation in the presence of the resist film 42 to transfer the hole pattern into the insulating films 38, 37, 36 and part of the insulating film 35. Subsequently, the resist film 42 and the anti-reflection film 41 are removed and the groove pattern 40 and the hole pattern 43 are transferred respectively into the insulating film 37 and the insulating film 35 by using the insulating film 38 as mask.
    Type: Grant
    Filed: June 2, 2000
    Date of Patent: January 22, 2002
    Assignee: Hitachi, Ltd.
    Inventors: Shinichi Fukada, Kazuo Nojiri, Takashi Yunogami, Shoji Hotta, Hideo Aoki, Takayuki Oshima, Nobuyoshi Kobayashi