Patents by Inventor Shoji Nishida
Shoji Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 11090645Abstract: A solution jetting device includes: a cylindrical member; a movable member that is movably fitted to a hollow portion of the cylindrical member; a first drive mechanism that moves the movable member; a first flow passage that connects a solution container, in which a solution containing a biological sample or containing a reagent to be reacted with a biological sample is contained, to the hollow portion; an openable and closable first on-off valve that is provided on the first flow passage; a jetting tool that jets the solution to an objective region; a second flow passage that connects the hollow portion to the jetting tool; an openable and closable second on-off valve that is provided on the second flow passage; a second drive mechanism as defined herein; and a control unit as defined herein.Type: GrantFiled: August 31, 2018Date of Patent: August 17, 2021Assignee: FUJIFILM CorporationInventor: Shoji Nishida
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Publication number: 20180369803Abstract: A solution jetting device includes: a cylindrical member; a movable member that is movably fitted to a hollow portion of the cylindrical member; a first drive mechanism that moves the movable member; a first flow passage that connects a solution container, in which a solution containing a biological sample or containing a reagent to be reacted with a biological sample is contained, to the hollow portion; an openable and closable first on-off valve that is provided on the first flow passage; a jetting tool that jets the solution to an objective region; a second flow passage that connects the hollow portion to the jetting tool; an openable and closable second on-off valve that is provided on the second flow passage; a second drive mechanism as defined herein; and a control unit as defined herein.Type: ApplicationFiled: August 31, 2018Publication date: December 27, 2018Applicant: FUJIFILM CorporationInventor: Shoji NISHIDA
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Patent number: 8388400Abstract: The following method is provided: a method of readily fabricating an electron-emitting device, coated with a low-work function material, having good electron-emitting properties with high reproducibility such that differences in electron-emitting properties between electron-emitting devices are reduced. Before a structure is coated with the low-work function material, a metal oxide layer is formed on the structure.Type: GrantFiled: November 30, 2009Date of Patent: March 5, 2013Assignee: Canon Kabushiki KaishaInventors: Naofumi Aoki, Shoji Nishida
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Patent number: 8344607Abstract: An electron-emitting device includes an electroconductive member and a lanthanum boride layer on the electroconductive member and further includes an oxide layer between the electroconductive member and the lanthanum boride layer. The oxide layer can contain a lanthanum element. The lanthanum boride layer can be overlaid with a lanthanum oxide layer.Type: GrantFiled: November 30, 2009Date of Patent: January 1, 2013Assignee: Canon Kabushiki KaishaInventors: Naofumi Aoki, Shoji Nishida
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Patent number: 7750367Abstract: An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain inducing porous layer or a porous silicon layer and strain inducing porous layer. An SiGe layer and strained silicon layer are formed on the resultant structure. The SiGe layer in the stacking growth step only needs to be on the uppermost surface of the porous layer. For this reason, an SiGe layer with a low defect density and high concentration can be formed. Since the SiGe layer on the strain inducing porous layer can achieve a low defect density without lattice mismatching. Hence, a high-quality semiconductor substrate having a high strained silicon layer can be obtained.Type: GrantFiled: February 28, 2007Date of Patent: July 6, 2010Assignee: Canon Kabushiki KaishaInventors: Kazuya Notsu, Kiyofumi Sakaguchi, Nobuhiko Sato, Hajime Ikeda, Shoji Nishida
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Publication number: 20100136869Abstract: The following method is provided: a method of readily fabricating an electron-emitting device, coated with a low-work function material, having good electron-emitting properties with high reproducibility such that differences in electron-emitting properties between electron-emitting devices are reduced. Before a structure is coated with the low-work function material, a metal oxide layer is formed on the structure.Type: ApplicationFiled: November 30, 2009Publication date: June 3, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Naofumi Aoki, Shoji Nishida
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Publication number: 20100134313Abstract: An electron-emitting device includes an electroconductive member and a lanthanum boride layer on the electroconductive member and further includes an oxide layer between the electroconductive member and the lanthanum boride layer. The oxide layer can contain a lanthanum element. The lanthanum boride layer can be overlaid with a lanthanum oxide layer.Type: ApplicationFiled: November 30, 2009Publication date: June 3, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Naofumi Aoki, Shoji Nishida
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Publication number: 20100053126Abstract: An electron emission device includes a polycrystalline film of lanthanum boride, and a size of a crystallite which composes the polycrystalline film is equal to or more than 2.5 nm and equal to or less than 100 nm, preferably the film thickness of the polycrystalline film is equal to or less than 100 nm.Type: ApplicationFiled: August 28, 2009Publication date: March 4, 2010Applicant: CANON KABUSHIKI KAISHAInventors: Tamaki Kobayashi, Shoji Nishida, Takuto Moriguchi, Takeo Tsukamoto
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Patent number: 7642179Abstract: A method of manufacturing a semiconductor substrate includes a growing step of growing a second single crystalline semiconductor on a first single crystalline semiconductor, a blocking layer forming step of forming a blocking layer on the second single crystalline semiconductor, and a relaxing step of generating crystal defects at a portion deeper than the blocking layer to relax a stress acting on the second single crystalline semiconductor. The blocking layer includes, e.g., a porous layer, and prevents the crystal defects at the portion deeper than the blocking layer from propagating to the surface of the second single crystalline semiconductor.Type: GrantFiled: August 8, 2005Date of Patent: January 5, 2010Assignee: Canon Kabuhsiki KaishaInventors: Hajime Ikeda, Kazuya Notsu, Nobuhiko Sato, Shoji Nishida
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Publication number: 20090284123Abstract: An image display apparatus uses electron-emitting devices each having: a pair of device electrodes on an insulating substrate; and an electroconductive film connecting the device electrodes. The insulating substrate has concave portions in a gap between the device electrodes. The film has opening portions having a first gap in a region adjacent to the opening portions along such a gap. A carbon film having a second gap is formed in the first gap and has extending portions extending from side surfaces of the concave portions toward the bottom. The extending portions of the adjacent carbon films are not coupled.Type: ApplicationFiled: April 24, 2009Publication date: November 19, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Shoji Nishida, Koki Nukanobu, Takuto Moriguchi, Takeo Tsukamoto
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Patent number: 7615115Abstract: A liquid-phase growth apparatus for growing a crystal on a substrate includes a crucible containing a solution that contains a raw material for forming the crystal, and a substrate holder for vertically holding the substrate. The substrate holder includes connectors, a receiving component, and a push component. The receiving component and the push component are opposite to each other and are connected by the connectors. The push component holds an upper portion of the substrate while the receiving component holds a lower portion of the substrate. The substrate holder containing the vertically held substrate is dipped into the solution. The receiving component ascends with buoyancy in the solution contained in the crucible, so that the substrate is now held securely and prevented from cracking due to thermal expansion.Type: GrantFiled: July 7, 2008Date of Patent: November 10, 2009Assignee: Canon Kabushiki KaishaInventors: Masaki Mizutani, Katsumi Nakagawa, Takehito Yoshino, Shoji Nishida
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Publication number: 20090000540Abstract: A liquid-phase growth apparatus for growing a crystal on a substrate includes a crucible containing a solution that contains a raw material for forming the crystal, and a substrate holder for vertically holding the substrate. The substrate holder includes connectors, a receiving component, and a push component. The receiving component and the push component are opposite to each other and are connected by the connectors. The push component holds an upper portion of the substrate while the receiving component holds a lower portion of the substrate. The substrate holder containing the vertically held substrate is dipped into the solution. The receiving component ascends with buoyancy in the solution contained in the crucible, so that the substrate is now held securely and prevented from cracking due to thermal expansion.Type: ApplicationFiled: July 7, 2008Publication date: January 1, 2009Applicant: CANON KABUSHIKI KAISHAInventors: Masaki MIZUTANI, Katsumi NAKAGAWA, Takehito YOSHINO, Shoji NISHIDA
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Publication number: 20080271783Abstract: There is provided a photovoltaic device in which at least one pin-junction is formed in a thin film semiconductor deposited on a substrate, the substrate including: a base including polycrystalline silicon; and a polycrystalline silicon layer formed on the base by liquid phase growth, in which at least a part of a surface of the polycrystalline silicon layer has unevenness composed of facet surfaces. The photovoltaic device prevents a reduction in photoelectric conversion efficiency due to the absence of preferable unevenness, an increase in cost due to the use of an expensive material, and a reduction in throughput in the photovoltaic device, and has a preferable characteristic and high productivity.Type: ApplicationFiled: July 8, 2008Publication date: November 6, 2008Applicant: CANON KABUSHIKI KAISHAInventors: Tsutomu Murakami, Shoji Nishida
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Patent number: 7407547Abstract: A liquid-phase growth apparatus for growing a crystal on a substrate includes a crucible containing a solution that contains a taw material for forming the crystal, and a substrate holder for vertically holding the substrate. The substrate holder includes connectors, a receiving component, and a push component. The receiving component and the push component are opposite to each other and are connected by the connectors. The push component holds an upper portion of the substrate while the receiving component holds a lower portion of the substrate. The substrate holder containing the vertically held substrate is dipped into the solution. The receiving component ascends with buoyancy in the solution contained in the crucible, so that the substrate is now held securely and prevented from cracking due to thermal expansion.Type: GrantFiled: November 10, 2005Date of Patent: August 5, 2008Assignee: Canon Kabushiki KaishaInventors: Masaki Mizutani, Katsumi Nakagawa, Takehito Yoshino, Shoji Nishida
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Publication number: 20070272944Abstract: An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain inducing porous layer or a porous silicon layer and strain inducing porous layer. An SiGe layer and strained silicon layer are formed on the resultant structure. The SiGe layer in the stacking growth step only needs to be on the uppermost surface of the porous layer. For this reason, an SiGe layer with a low defect density and high concentration can be formed. Since the SiGe layer on the strain inducing porous layer can achieve a low defect density without lattice mismatching. Hence, a high-quality semiconductor substrate having a high strained silicon layer can be obtained.Type: ApplicationFiled: February 28, 2007Publication date: November 29, 2007Applicant: Canon Kabushiki KaishaInventors: Kazuya Notsu, Kiyofumi Sakaguchi, Nobuhiko Sato, Hajime Ikeda, Shoji Nishida
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Patent number: 7282190Abstract: A solar cell is produced by dipping a multicrystalline silicon substrate 28 in a solution 24 containing silicon, growing a silicon layer on the substrate 28 while decreasing with time the temperature drop rate of the solution during the dipping of the substrate in the solution, and forming a pn junction in the silicon layer. Thereby, there is provided a silicon layer production method that can form a thick layer while restraining the degree of roughness, whereby a low-cost, multicrystalline-silicon solar cell production method is provided that realizes both a large current and a high FF.Type: GrantFiled: May 17, 2005Date of Patent: October 16, 2007Assignee: Canon Kabushiki KaishaInventors: Masaki Mizutani, Shoji Nishida, Katsumi Nakagawa
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Patent number: 7238973Abstract: An SiGe layer is grown on a silicon substrate. The SiGe layer or the silicon substrate and SiGe layer are porosified by anodizing the SiGe layer to form a strain induction porous layer or a porous silicon layer and strain induction porous layer. An SiGe layer and strained silicon layer are formed on the resultant structure. The SiGe layer in the stacking growth step only needs to be on the uppermost surface of the porous layer. For this reason, an SiGe layer with a low defect density and high concentration can be formed. Since the SiGe layer on the strain induction porous layer can achieve a low defect density without lattice mismatching. Hence, a high-quality semiconductor substrate having a high strained silicon layer can be obtained.Type: GrantFiled: December 14, 2004Date of Patent: July 3, 2007Assignee: Canon Kabushiki KaishaInventors: Kazuya Notsu, Kiyofumi Sakaguchi, Nobuhiko Sato, Hajime Ikeda, Shoji Nishida
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Patent number: 7175706Abstract: There is provided a process of producing a multicrystalline silicon substrate having excellent characteristics as a solar cell substrate. A multicrystalline silicon ingot made by directional solidification 10 is cut such that a normal line of a principal surface 14 of a multicrystalline silicon substrate 13 is substantially perpendicular to a longitudinal direction of crystal grains 11 of the multicrystalline silicon ingot made by directional solidification 10.Type: GrantFiled: February 21, 2003Date of Patent: February 13, 2007Assignee: Canon Kabushiki KaishaInventors: Masaki Mizutani, Shunichi Ishihara, Katsumi Nakagawa, Hiroshi Sato, Takehito Yoshino, Shoji Nishida, Noritaka Ukiyo, Masaaki Iwane, Yukiko Iwasaki
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Patent number: 7118625Abstract: With respect to a liquid phase growth method for a silicon crystal in which the silicon crystal is grown on a substrate by immersing the substrate in a solvent or allowing the substrate to contact the solvent, a gas containing a raw material and/or a dopant is supplied to the solvent after at least a part of the gas is decomposed by application of energy thereto. In this manner, a liquid phase growth method for a silicon crystal, the method capable of achieving continuous growth and suitable for mass production, a manufacturing method for a solar cell and a liquid phase growth apparatus for a silicon crystal are provided.Type: GrantFiled: October 2, 2003Date of Patent: October 10, 2006Assignee: Canon Kabushiki KaishaInventors: Shoji Nishida, Takehito Yoshino, Masaaki Iwane, Masaki Mizutani
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Publication number: 20060194417Abstract: A polycrystalline silicon substrate for a solar cell formed by growing a high purity polycrystalline silicon layer on a surface of a base obtained by slicing a polycrystalline silicon ingot obtained by melting metallurgical grade silicon and performing one-direction solidification, wherein one-direction solidification is performed on a melt prepared by adding B to molten metallurgical grade silicon at an amount of 2×1018 cm?3 to 5×1019 cm?3 based on the concentration in the melt to produce the polycrystalline silicon ingot. With this structure, it is possible to easily obtain a polycrystalline silicon substrate having resistivity and the type of conductivity suitable for manufacture of a solar cell.Type: ApplicationFiled: October 10, 2003Publication date: August 31, 2006Applicant: Canon Kabushiki KaishaInventors: Shunichi Ishihara, Katsumi Nakagawa, Hiroshi Sato, Takehito Yoshino, Shoji Nishida, Noritaka Ukiyo, Masaaki Iwane, Yukiko Iwasaki, Masaki Mizutani