Patents by Inventor Shoji Nishida

Shoji Nishida has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20020005158
    Abstract: Provided are a liquid phase growth method of silicon crystal comprising a step of injecting a source gas containing at least silicon atoms into a solvent to decompose the source gas and, simultaneously therewith, dissolving the silicon atoms into the solvent, thereby supplying the silicon atoms into the solvent, and a step of dipping or contacting a substrate into or with the solvent, thereby growing a silicon crystal on the substrate; and a method of producing a solar cell utilizing the aforementioned method. Also provided is a liquid phase growth apparatus of a silicon crystal comprising means for holding a solvent in which silicon atoms are dissolved, and means for dipping or contacting a substrate into or with the solvent, the apparatus further comprising means for injecting a source gas containing at least silicon atoms into the solvent.
    Type: Application
    Filed: December 10, 1998
    Publication date: January 17, 2002
    Inventors: SHOJI NISHIDA, KATSUMI NAKAGAWA, NORITAKA UKIYO, MASAAKI IWANE
  • Publication number: 20010055854
    Abstract: A process for producing a semiconductor member, comprising a first step of forming a porous layer by making porous a first member at its surface portion, leaving some region or regions thereof not made porous; a second step of bonding a semiconductor layer formed on the porous layer and on the first-member surface left not made porous, to a second member to form a bonded structure; and a third step of separating the bonded structure at the part of the porous layer. The first member is made porous leaving some region or regions thereof not made porous so that the porous layer does not cause any separation at the part of the porous layer in the first and second steps.
    Type: Application
    Filed: March 29, 2001
    Publication date: December 27, 2001
    Inventors: Shoji Nishida, Takao Yonehara, Kiyofumi Sakaguchi, Noritaka Ukiyo, Yukiko Iwasaki
  • Patent number: 6331208
    Abstract: A crystal silicon substrate is anodized to form a porous layer thereon, and a thin-film crystal is grown by epitaxial growth on the porous layer. Openings extending from the surface of the grown crystal and reaching the porous layer are provided by applying laser beams, and the porous layer is selectively etched through the openings to separate the thin-film crystal from the substrate. The thin-film crystal separated is transferred to another supporting substrate to form a solar cell. Also, porous silicon layers serving as separation layers are formed on a substrate silicon wafer on both sides, and thin-film semiconductor (thin-film single-crystal silicon) layers are formed by epitaxial growth on both porous silicon layers. Then, through openings are made in the thin-film single-crystal silicon layers. Thereafter, the porous silicon layers are removed by wet etching carried out through the openings to separate two thin-film single-crystal silicon layers simultaneously from the wafer.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: December 18, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Nishida, Takao Yonehara, Kiyofumi Sakaguchi, Masaaki Iwane
  • Publication number: 20010051387
    Abstract: The method of the present invention of growing single crystal silicon in a liquid phase comprises preparing a melt by dissolving a solid of silicon containing boron, aluminum, phosphorus or arsenic at a predetermined concentration into indium melted in a carbon boat or a quartz crucible, supersaturating the melt, and submerging a substrate into the melt, thereby growing a silicon crystal containing a dopant element. This method can provide a method of growing a thin film of crystalline silicon having a high crystallinity and a dopant concentration favorably controlled, thereby serving for mass production of inexpensive solar cells which have high performance as well as image displays which have high contrast and are free from color ununiformity.
    Type: Application
    Filed: November 24, 1998
    Publication date: December 13, 2001
    Inventors: KATSUMI NAKAGAWA, SHOJI NISHIDA, NORITAKA UKIYO, MASAAKI IWANE
  • Publication number: 20010041423
    Abstract: A method for transferring a porous layer includes forming a porous layer on one side of a crystalline silicon member by anodization, fixing a supporting substrate onto the surface of the porous layer, and applying force to any one of the supporting substrate and the porous layer, whereby at least part of the porous layer is cleaved from the crystalline silicon member and is transferred onto the supporting substrate. The crystalline silicon member can be recycled and this method is suitable for mass production of semiconductor devices or solar batteries at low cost.
    Type: Application
    Filed: January 26, 2001
    Publication date: November 15, 2001
    Inventors: Shoji Nishida, Katsumi Nakagawa, Takao Yonehara, Kiyofumi Sakaguchi
  • Publication number: 20010023702
    Abstract: The solar cell module of the present invention comprises a plurality of unit cells connected in series, each of the unit cells comprising in this order an electrode, a first semiconductor layer having a first conductivity type and a second semiconductor layer having a second conductivity type, wherein the electrode has a region not covered with the first semiconductor layer, wherein the second semiconductor layer has a main region and a subregion which are separated by a groove, wherein the main region of the second semiconductor layer in one unit cell of the unit cells is electrically connected to the region of the electrode not covered with the first semiconductor layer in another unit cell adjacent to the one unit cell, and wherein the region of the electrode not covered with the first semiconductor layer in the one unit cell is electrically connected to the subregion of the second semiconductor layer in the another unit cell, whereby it is possible to simplify a step of forming a bypass diode and the pres
    Type: Application
    Filed: February 23, 2001
    Publication date: September 27, 2001
    Inventors: Katsumi Nakagawa, Shoji Nishida, Yukiko Iwasaki
  • Patent number: 6258698
    Abstract: A process for producing a semiconductor substrate is provided which comprises a first step of anodizing a surface of a first substrate to form a porous layer on the surface, a second step of simultaneously forming a semiconductor layer on the surface of the porous layer and a semiconductor layer on a surface of the first substrate on its side opposite to the porous layer side, a third step of bonding the surface of the semiconductor layer formed on the surface of the porous layer to a surface of a second substrate, and a fourth step of separating the first substrate and the second substrate at the part of the porous layer to transfer to the second substrate the semiconductor layer formed on the surface of the porous layer, thereby providing the semiconductor layer on the surface of the second substrate. This makes it possible to produce semiconductor substrates at a low cost while making good use of expensive substrate materials.
    Type: Grant
    Filed: March 24, 1998
    Date of Patent: July 10, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Yukiko Iwasaki, Katsumi Nakagawa, Takao Yonehara, Shoji Nishida, Kiyofumi Sakaguchi
  • Patent number: 6248948
    Abstract: A solar cell module comprises a plurality of unit cells connected in series, each of the unit cells comprising in this order an electrode, a first semiconductor layer having a first conductivity type and a second semiconductor layer having a second conductivity type. The electrode has a region not covered with the first semiconductor layer. The second semiconductor layer has a main region and a subregion which are separated by a groove. The main region of the second semiconductor layer in one unit cell is electrically connected to the region of the electrode not covered with the first semiconductor layer in another unit cell adjacent to the one unit cell. The region of the electrode not covered with the first semiconductor layer in the one unit cell is electrically connected to the subregion of the second semiconductor layer in the another unit cell. With this structure, it is possible to simplify the formation of a bypass diode and therefore provide a solar cell module with high reliability at a low cost.
    Type: Grant
    Filed: May 13, 1999
    Date of Patent: June 19, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Nakagawa, Shoji Nishida, Yukiko Iwasaki
  • Patent number: 6231667
    Abstract: A liquid phase growth apparatus of a dipping system has a plurality of liquid phase growth chambers and liquid phase growth operations of semiconductors are carried out on a plurality of substrates in the growth chambers. Another liquid phase growth apparatus of the dipping system has a liquid phase growth chamber and an annealing chamber, and is constructed in such structure that liquid phase growth of a semiconductor on one substrate is carried out in the liquid phase growth chamber and that an annealing operation of another substrate different from the aforementioned substrate is carried out in the annealing chamber. Another liquid phase growth apparatus of the dipping system has a liquid phase growth chamber and an annealing chamber, and is constructed in such structure that a semiconductor material is dissolved into a solvent in the liquid phase growth chamber and that the annealing operation of a substrate is carried out in the annealing chamber.
    Type: Grant
    Filed: November 27, 1998
    Date of Patent: May 15, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Masaaki Iwane, Isao Tanikawa, Katsumi Nakagawa, Tatsumi Shoji, Shoji Nishida, Noritaka Ukiyo
  • Patent number: 6211038
    Abstract: A method for manufacturing a thin-film crystalline solar cell includes the steps of (i) forming a porous layer including a large number of fine pores in a surface portion of a crystalline substrate, (ii) transforming a part of the porous layer including the surface thereof into a smooth layer which does not include fine pores by providing the porous layer with excitation energy, and (iii) peeling the smooth layer from the substrate. The excitation energy is provided, for example, by performing heat treatment in a hydrogen atmosphere, irradiating with light having a wavelength equal to or less than 600 nm, or irradiating with an electron beam. It is thereby possible to form a thin-film crystalline semiconductor layer on an inexpensive and flexible substrate by simple processes.
    Type: Grant
    Filed: March 25, 1998
    Date of Patent: April 3, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Nakagawa, Takao Yonehara, Shoji Nishida, Kiyofumi Sakaguchi, Yukiko Iwasaki
  • Patent number: 6190937
    Abstract: To accomplish both higher performance of a crystal and lower cost in a semiconductor member, and to produce a solar cell having a high efficiency and a flexible shape at low cost, the semiconductor member is produced by the following steps, (a) forming a porous layer in the surface region of a substrate, (b) immersing the porous layer into a melting solution in which elements for forming a semiconductor layer to be grown is dissolved, under a reducing atmosphere at a high temperature, to grow a crystal semiconductor layer on the surface of the porous layer, (c) bonding another substrate onto the surface of the substrate on which the porous layer and the semiconductor layer are formed and (d) separating the substrate from the another substrate at the porous layer.
    Type: Grant
    Filed: December 29, 1997
    Date of Patent: February 20, 2001
    Assignee: Canon Kabushiki Kaisha
    Inventors: Katsumi Nakagawa, Takao Yonehara, Shoji Nishida, Kiyofumi Sakaguchi
  • Patent number: 6100166
    Abstract: A process for producing a semiconductor article is provided which comprises the steps of bonding a film onto a substrate having a porous semiconductor layer, and separating the film from the substrate at the porous semiconductor layer by applying a force to the film in a peeling direction.
    Type: Grant
    Filed: December 18, 1997
    Date of Patent: August 8, 2000
    Assignee: Canon Kabushiki Kaisha
    Inventors: Kiyofumi Sakaguchi, Takao Yonehara, Shoji Nishida, Kenji Yamagata
  • Patent number: 5584941
    Abstract: In order to provide a low cost solar cell which has a high quality, little stressed polycrystalline silicon semiconductor layer of large crystal sizes on a low cost metal substrate and to provide a production process therefor, the solar cell has a metal layer, a metal oxide layer, and a polycrystalline silicon semiconductor layer formed in this order on the substrate, and the production process therefor comprises a step of depositing the metal layer on the substrate, a step of depositing the metal oxide layer on the metal layer, a step of depositing the semiconductor layer on the metal oxide layer, a step of depositing a cap layer on the surface of the semiconductor layer and fusing and solidifying the semiconductor layer by radiant heating from above the cap layer to form the polycrystalline semiconductor layer, and a step of removing the cap layer.
    Type: Grant
    Filed: March 17, 1995
    Date of Patent: December 17, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shoji Nishida
  • Patent number: 5575862
    Abstract: This invention provides an inexpensive polycrystalline silicon solar cell having a large grain size polycrystalline semiconductor layer grown on a low-cost metallurgical grade (MG) silicon substrate, and a process for its production. The polycrystalline silicon solar cell comprises a MG-silicon substrate, a metal oxide layer formed thereon and a polycrystalline silicon layer formed on the metal oxide layer. The process for producing the polycrystalline silicon solar cell comprises the steps of i) depositing the metal oxide layer on the MG-silicon substrate, ii) depositing a silicon layer on the surface of the metal oxide layer, iii) depositing a cap layer on the surface of the silicon layer and melting the silicon layer by heating from the upper part of the cap layer, followed by solidification to form a polycrystalline silicon layer, and iv) removing the cap layer and forming a semiconductor junction on the surface of the polycrystalline silicon layer.
    Type: Grant
    Filed: November 30, 1994
    Date of Patent: November 19, 1996
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shoji Nishida
  • Patent number: 5492859
    Abstract: A process for producing a semiconductor device substrate comprises the steps of making a first substrate member porous, forming an insulating layer on a second substrate member, forming an amorphous layer on the insulating layer on the second substrate member, bonding the porous first substrate member to the amorphous layer at a temperature of an atmosphere in which the amorphous layer at least does not crystallize, causing solid-phase epitaxial growth of the amorphous layer by utilizing the porous first substrate member as crystal growth seed, and removing the bonded first substrate member after completion of the epitaxial growth by chemical etching.
    Type: Grant
    Filed: January 6, 1995
    Date of Patent: February 20, 1996
    Inventors: Kiyofumi Sakaguchi, Takao Yonehara, Shoji Nishida
  • Patent number: 5403771
    Abstract: A process for effectively producing an inexpensive solar cell by using a metallic substrate and growing a polycrystal semiconductor layer of a large crystal grain size. And a process for effectively producing a high quality and inexpensive solar cell by forming a polycrystal semiconductor layer of a large crystal grain size and with a reduced defect level density in grain boundaries on a polycrystal semiconductor layer of a small crystal grain size which serves as a crystal seed.
    Type: Grant
    Filed: February 2, 1994
    Date of Patent: April 4, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Nishida, Takao Yonehara
  • Patent number: 5403751
    Abstract: A process for the production of a solar cell, characterized in that the surface of a silicon wafer is periodically exposed through minute spaced portions of an insulating layer formed on the silicon wafer; crystal growth is performed until monocrystalline silicon regions caused at the spaced portions by way of selective epitaxial growth and lateral crystal growth become collided with each other; the insulating layer is removed through gaps left among the monocrystals; a resin is embedded in the gaps; an electrode layer is formed over the surfaces of the monocrystalline silicon regions; the surface of the electrode layer is fastened to a substrate through a resin; a body comprising the monocrystalline silicon regions is separated from the silicon wafer; and a counter electrode is disposed to the monocrystalline silicon regions.
    Type: Grant
    Filed: June 20, 1994
    Date of Patent: April 4, 1995
    Assignee: Canon Kabushiki Kaisha
    Inventors: Shoji Nishida, Kenji Yamagata
  • Patent number: 5279686
    Abstract: There is disclosed a polycrystalline silicon solar cell, utilizing a continuous polycrystalline silicon film consisting of single crystals grown from a plurality of small nucleation surfaces provided on a non-nucleation surface. The semiconductor junction, providing the photoelectromotive force of the solar cell, is formed on the single crystals, avoiding the areas of grain boundaries formed by mutual contact of the single crystals, in order to eliminate the drawbacks resulting from such boundaries. The semiconductor junction is formed by masking the areas of the grain boundaries with a suitable masking material, such as photoresist.
    Type: Grant
    Filed: February 20, 1992
    Date of Patent: January 18, 1994
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shoji Nishida
  • Patent number: 5269852
    Abstract: A crystalline solar cell is formed by growing single crystals on respective plural nucleation areas provided on a non-nucleation surface in such a manner that the neighboring single crystals do not have a crystal grain boundary therebetween. The solar cell comprises an insulation layer having an aperture formed on each of said single crystals. A semiconductor junction is formed at each single crystal at the respective aperture.
    Type: Grant
    Filed: May 26, 1992
    Date of Patent: December 14, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shoji Nishida
  • Patent number: 5254481
    Abstract: A solar cell has a polycrystalline silicon layer formed on a metal substrate. The crystal orientation of the crystal grains of the silicon layer is regulated in the film thickness direction.
    Type: Grant
    Filed: November 19, 1991
    Date of Patent: October 19, 1993
    Assignee: Canon Kabushiki Kaisha
    Inventor: Shoji Nishida