Abstract: A semiconductor device includes: an LCD controller configured to output a plurality of image signals in parallel; a plurality of signal lines respectively corresponding to the plurality of image signals to be outputted in parallel; a plurality of terminal portions respectively connected to the plurality of signal lines; and delay circuits configured to delay a plurality of image signals, which are divided into a plurality of groups to the extent that the sum of each value of a current flowing through each signal line does not exceed a predetermined current value and outputted from a plurality of terminal portions, by a predetermined delay time from each other among the plurality of groups.

Abstract: A semiconductor device includes: an LCD controller configured to output a plurality of image signals in parallel; a plurality of signal lines respectively corresponding to the plurality of image signals to be outputted in parallel; a plurality of terminal portions respectively connected to the plurality of signal lines; and delay circuits configured to delay a plurality of image signals, which are divided into a plurality of groups to the extent that the sum of each value of a current flowing through each signal line does not exceed a predetermined current value and outputted from a plurality of terminal portions, by a predetermined delay time from each other among the plurality of groups.

Abstract: A computer automated design system includes a subject routing module configured to set a first grid area and a first diagonal grid area and route a first wire in the first grid area and a first diagonal wire extending diagonally to a longitudinal direction of the first wire and a next routing module configured to set a second grid area and a second diagonal grid area and route a second wire in the second grid area and a second diagonal wire extending diagonally to a longitudinal direction of the second wire.

Abstract: A programmable logic device unit, a non-volatile memory unit which stores data for programming the programmable logic device unit in a part of data storage area thereof and a control circuit which controls the non-volatile memory unit to allow the data stored in a part of the data storage area to be read at power-on time and supplied to the programmable logic device unit are integrally provided on a semiconductor chip. Based on the program data, the programmable logic device unit forms an interface for allowing the non-volatile memory unit to operate as at least one of a register, a flash memory, a random access memory, and a read-only memory.

Abstract: A computer automated design system includes a subject routing module configured to set a first grid area and a first diagonal grid area and route a first wire in the first grid area and a first diagonal wire extending diagonally to a longitudinal direction of the first wire and a next routing module configured to set a second grid area and a second diagonal grid area and route a second wire in the second grid area and a second diagonal wire extending diagonally to a longitudinal direction of the second wire.

Abstract: A computer automated design system includes a subject routing module configured to set a first grid area and a first diagonal grid area and route a first wire in the first grid area and a first diagonal wire extending diagonally to a longitudinal direction of the first wire and a next routing module configured to set a second grid area and a second diagonal grid area and route a second wire in the second grid area and a second diagonal wire extending diagonally to a longitudinal direction of the second wire.

Abstract: A semiconductor device includes: an LCD controller configured to output a plurality of image signals in parallel; a plurality of signal lines respectively corresponding to the plurality of image signals to be outputted in parallel; a plurality of terminal portions respectively connected to the plurality of signal lines; and delay circuits configured to delay a plurality of image signals, which are divided into a plurality of groups to the extent that the sum of each value of a current flowing through each signal line does not exceed a predetermined delay time from each other among the plurality of groups.

Abstract: Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second wiring structure formed on the semiconductor substrate belonging to the wiring layer equal to the first wiring structure and including a second plug and a second wiring formed on the second plug, wherein the upper surface of the first wiring is positioned higher than the upper surface of the second wiring, and the lower surface of the first wiring is positioned flush with or lower than the upper surface of the second wiring. The present invention also provides a method of manufacturing the particular semiconductor device.

Abstract: A programmable logic device unit, a non-volatile memory unit which stores data for programming the programmable logic device unit in a part of data storage area thereof and a control circuit which controls the non-volatile memory unit to allow the data stored in a part of the data storage area to be read at power-on time and supplied to the programmable logic device unit are integrally provided on a semiconductor chip. Based on the program data, the programmable logic device unit forms an interface for allowing the non-volatile memory unit to operate as at least one of a register, a flash memory, a random access memory, and a read-only memory.

Abstract: A computer automated design system includes a subject routing module configured to set a first grid area and a first diagonal grid area and route a first wire in the first grid area and a first diagonal wire extending diagonally to a longitudinal direction of the first wire and a next routing module configured to set a second grid area and a second diagonal grid area and route a second wire in the second grid area and a second diagonal wire extending diagonally to a longitudinal direction of the second wire.

Abstract: A semiconductor device is disclosed, which comprises a semiconductor substrate, a semiconductor element formed on the semiconductor substrate, and multi-level wiring structure including first wirings at a plurality of levels, in which the first wirings at at least one of the levels are provided at different heights in a cross-sectional view of the multi-level wiring structure, and extend to cross at an oblique angle with the first wirings at an adjacent level in a plan view.

Abstract: A dry etching method comprises sequentially laminating a first insulating layer containing carbon and a second insulating layer containing carbon on a substrate, patterning the second insulating layer to form a mask; forming grooves in the first insulating layer by etching the first insulating layer with the second insulating layer used as a mask such that each of the grooves has a side surface and a bottom surface in the first insulating layer; and removing the second insulating layer by use of a reactive gas containing carbon atoms and at least one of oxygen atoms, hydrogen atoms and nitrogen atoms.

Abstract: Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second wiring structure formed on the semiconductor substrate belonging to the wiring layer equal to the first wiring structure and including a second plug and a second wiring formed on the second plug, wherein the upper surface of the first wiring is positioned higher than the upper surface of the second wiring, and the lower surface of the first wiring is positioned flush with or lower than the upper surface of the second wiring. The present invention also provides a method of manufacturing the particular semiconductor device.

Abstract: Disclosed is a semiconductor device, comprising a first wiring structure formed on a semiconductor substrate and including a first plug and a first wiring formed on the first plug, and a second wiring structure formed on the semiconductor substrate belonging to the wiring layer equal to the first wiring structure and including a second plug and a second wiring formed on the second plug, wherein the upper surface of the first wiring is positioned higher than the upper surface of the second wiring, and the lower surface of the first wiring is positioned flush with or lower than the upper surface of the second wiring. The present invention also provides a method of manufacturing the particular semiconductor device.

Abstract: According to the present invention, there is provided a method of manufacturing a semiconductor device, where a soluble thin film which is soluble in a dissolving liquid is used. According to the method of the present invention, when a soluble thin film is formed between a film to be processed which should be patterned and a mask pattern, it becomes possible to remove the mask pattern by lifting-off. On the other hand, when the thin film is used for a dummy layer for forming an air wiring structure, the dummy layer can be removed without performing ashing using oxygen plasma.

Abstract: According to the present invention, there is provided a method of manufacturing a semiconductor device, where a soluble thin film which is soluble in a dissolving liquid is used. According to the method of the present invention, when a soluble thin film is formed between a film to be processed which should be patterned and a mask pattern, it becomes possible to remove the mask pattern by lifting-off. On the other hand, when the thin film is used for a dummy layer for forming an air wiring structure, the dummy layer can be removed without performing ashing using oxygen plasma.

Abstract: In a method for dry-etching a coating by use of reactive gas which is activated, a second insulating layer containing carbon atoms which is formed on a first insulating layer containing carbon atoms is ashed by use of a gas containing carbon atoms and at least one of oxygen atoms, nitrogen atoms and hydrogen atoms. By using the above gas, the second insulating layer containing carbon atoms which is formed on the first insulating layer which is an underlying layer can be efficiently ashed and removed without removing carbon atoms in the side surface of the grooves formed in the first insulating layer and etching the side surface thereof. Thus, the side surface of the groove formed in the first insulating layer will not be modified or deformed.

Abstract: There is provided a method of forming an interlayer insulating film having a dual-damascene structure, a contact hole and a deep trench mask using an organic silicon film. The shape of polysilane or the like is processed so that polysilane is used as an interlayer insulating film having a dual-damascene structure to control the shape and depth and prevent borderless etching which must be solved when a trench is formed. Polysilane and an insulating film are formed into a laminated structure so as to be integrated with each other after a dry etching step has been completed to easily form a contact hole having a high aspect ratio. The surface of polysilane is selectively formed into an insulating film so as to be used as a mask for use in a dry etching step. Polysilane for use as an anti-reflective film or an etching mask is changed to an oxide film or a nitride film so that films are easily removed.

Abstract: Disclosed is a method of manufacturing a semiconductor device, which comprises the steps of forming an insulating film or a metal film on a surface of a semiconductor substrate, forming at least two kinds of mask on a surface of the insulating film or the metal film, and performing a plurality of etching works to the insulating film or the metal film in conformity with the various kinds of mask.

Abstract: In a method for dry-etching a coating by use of reactive gas which is activated, a second insulating layer containing carbon atoms which is formed on a first insulating layer containing carbon atoms is ashed by use of a gas containing carbon atoms and at least one of oxygen atoms, nitrogen atoms and hydrogen atoms. By using the above gas, the second insulating layer containing carbon atoms which is formed on the first insulating layer which is an underlying layer can be efficiently ashed and removed without removing carbon atoms in the side surface of the grooves formed in the first insulating layer and etching the side surface thereof. Thus, the side surface of the groove formed in the first insulating layer will not be modified or deformed.