Patents by Inventor Shooji Kubono

Shooji Kubono has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6525960
    Abstract: In the nonvolatile semiconductor memory device, a plurality of threshold voltages are associated with the programming of multi-valued information in one memory cell, data is first written into a memory cell having a threshold voltage which is the lowest or furthest away from the threshold voltage corresponding to the erase level, and data is successively written into memory cells having higher threshold voltages, namely, threshold voltages that are successively closer to the erase level, thereby overcoming threshold voltage fluctuations attributed to word line disturbance.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 25, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Keiichi Yoshida, Shooji Kubono
  • Publication number: 20020181279
    Abstract: In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store, multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.
    Type: Application
    Filed: June 29, 1999
    Publication date: December 5, 2002
    Inventors: KEIICHI YOSHIDA, SHOOJI KUBONO
  • Publication number: 20020136056
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Application
    Filed: March 13, 2002
    Publication date: September 26, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6452838
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: November 27, 2001
    Date of Patent: September 17, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6392932
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: November 17, 2000
    Date of Patent: May 21, 2002
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Publication number: 20020054506
    Abstract: In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.
    Type: Application
    Filed: October 31, 2001
    Publication date: May 9, 2002
    Inventors: Keiichi Yoshida, Shooji Kubono
  • Publication number: 20020054511
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Application
    Filed: November 27, 2001
    Publication date: May 9, 2002
    Applicant: Hitachi, Ltd.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6385092
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: September 25, 2001
    Date of Patent: May 7, 2002
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Publication number: 20020034099
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Application
    Filed: September 25, 2001
    Publication date: March 21, 2002
    Applicant: Hitaci, Ltd.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6320785
    Abstract: In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.
    Type: Grant
    Filed: October 5, 2000
    Date of Patent: November 20, 2001
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corporation
    Inventors: Keiichi Yoshida, Shooji Kubono
  • Patent number: 6157573
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: December 21, 1999
    Date of Patent: December 5, 2000
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6023425
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: June 29, 1999
    Date of Patent: February 8, 2000
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 6009016
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: June 2, 1999
    Date of Patent: December 28, 1999
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 5982668
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: August 18, 1998
    Date of Patent: November 9, 1999
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 5959882
    Abstract: In a nonvolatile semiconductor memory device wherein a plurality of threshold voltages are set so as to store multivalued information in one memory cell, data is first written into the memory cell whose threshold voltage is the lowest as a written state from the erase level, and data is successively written into memory cells whose threshold voltages are higher.
    Type: Grant
    Filed: July 9, 1997
    Date of Patent: September 28, 1999
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Keiichi Yoshida, Shooji Kubono
  • Patent number: 5867428
    Abstract: A nonvolatile semiconductor memory recovers variation in the threshold of a memory cell due to disturbance related to a word line. The nonvolatile memory continuously performs many writing operations without carrying out single-sector erasing after each writing operation, performing the additional writing operations quicker than the usual writing operation, and lightening the burden imposed on software for use in additional writing. The data stored in a designated sector is read out before being saved in a register, and the selected sector is subjected to single-sector erasing when a predetermined command is given. Then write expected value data is formed from the saved data and data to be additionally written, completing the writing operation.
    Type: Grant
    Filed: July 8, 1997
    Date of Patent: February 2, 1999
    Assignees: Hitachi, Ltd., USLI Engineering Corp.
    Inventors: Tatsuya Ishii, Hitoshi Miwa, Osamu Tsuchiya, Shooji Kubono
  • Patent number: 5553021
    Abstract: A semiconductor integrated circuit is provided which includes a charge pump circuit for forming a step-up (boost) voltage higher than a desired internal voltage, a voltage dividing circuit which forms a plurality of divided voltages based on a reference voltage, and a control circuit which intermittently operates the charge pump circuit so that an output voltage of the charge pump circuit provides the desired internal voltage obtained by adding a voltage obtained by multiplying a particular voltage among the plurality of divided voltages by n to a predetermined divided voltage.
    Type: Grant
    Filed: December 13, 1994
    Date of Patent: September 3, 1996
    Assignees: Hitachi, Ltd., Hitachi ULSI Engineering Corp.
    Inventors: Shooji Kubono, Hitoshi Kume