Patents by Inventor Shou-Chian Hsu
Shou-Chian Hsu has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240047498Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.Type: ApplicationFiled: October 19, 2023Publication date: February 8, 2024Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20230395633Abstract: An image sensor package may include an image sensor die including a bond pad and an optically transmissive lid coupled over the bond pad at an adhesive dam, the adhesive dam including a first layer directly coupled to a largest planar surface of the optically transmissive lid and a second optically opaque layer coupled over the bond pad.Type: ApplicationFiled: May 19, 2022Publication date: December 7, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Patent number: 11830903Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.Type: GrantFiled: February 2, 2022Date of Patent: November 28, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Publication number: 20230378207Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: ApplicationFiled: August 1, 2023Publication date: November 23, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20230378208Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: ApplicationFiled: August 1, 2023Publication date: November 23, 2023Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Patent number: 11756973Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: GrantFiled: July 12, 2021Date of Patent: September 12, 2023Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Publication number: 20220246660Abstract: Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package.Type: ApplicationFiled: April 20, 2022Publication date: August 4, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Patent number: 11342375Abstract: Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package.Type: GrantFiled: December 5, 2017Date of Patent: May 24, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Publication number: 20220157878Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.Type: ApplicationFiled: February 2, 2022Publication date: May 19, 2022Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Patent number: 11276724Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.Type: GrantFiled: June 27, 2019Date of Patent: March 15, 2022Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Publication number: 20210343772Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: ApplicationFiled: July 12, 2021Publication date: November 4, 2021Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Patent number: 11063078Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: GrantFiled: June 28, 2019Date of Patent: July 13, 2021Assignee: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian Hsu
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Publication number: 20200411581Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side and an active area on the second side of the die. The semiconductor packages may also include two or more bumps coupled to two or more die pads on a second side of the die. The semiconductor packages may include an optically transmissive lid coupled to the semiconductor die through an adhesive, two or more bumps, and a first redistribution layer (RDL). The semiconductor package may include a second redistribution layer (RDL) coupled with the first RDL on the second side of the semiconductor die. The second RDL may extend to the first side of the semiconductor die. The first RDL may extend to an edge of the semiconductor die.Type: ApplicationFiled: June 27, 2019Publication date: December 31, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20200411580Abstract: Implementations of semiconductor packages may include: a die having a first side and a second side and at least two through silicon vias (TSVs) extending from a first side of the die to the second side of the die. Semiconductor packages may also include a glass lid coupled to a second side of the die through adhesive. The adhesive may be positioned over the at least two TSVs. Semiconductor packages may also include a molding compound around a perimeter of the die, extending from the first side of the die to at least the glass lid.Type: ApplicationFiled: June 25, 2019Publication date: December 31, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20200411576Abstract: Implementations of semiconductor packages may include: a semiconductor die having a first side and a second side. A first side of an optically transmissive lid may be coupled to the second side of the semiconductor die through one or more dams. The packages may also include a light block material around the semiconductor package extending from the first side of the semiconductor die to a second side of the optically transmissive lid. The package may include an opening in the light block material on the second side of the optically transmissive lid that substantially corresponds with an active area of the semiconductor die.Type: ApplicationFiled: June 28, 2019Publication date: December 31, 2020Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20190172864Abstract: Implementations of image sensor packages may include an image sensor chip, a first layer including an opening therethrough coupled to a first side of the image sensor chip, and a optically transmissive cover coupled to the first layer. The optically transmissive cover, the first layer, and the image sensor chip may form a cavity within the image sensor. The image sensor package may also include at least one electrical contact coupled to a second side of the image sensor chip opposing the first side and an encapsulant coating an entirety of the sidewalls of the image sensor package.Type: ApplicationFiled: December 5, 2017Publication date: June 6, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20190006531Abstract: Implementations of semiconductor packages may include: a semiconductor die including a plurality of pads and a first dielectric layer with a plurality of openings therethrough that expose at least a portion of each of the plurality of pads. A second dielectric layer coupled to the first dielectric layer may have a thickness greater than or equal to a thickness of the first dielectric layer and a plurality of openings corresponding with the plurality of openings in the first dielectric layer. A plurality of bumps may be coupled with the plurality of pads into the plurality of openings in the first dielectric layer and in the second dielectric layer. The semiconductor package may also include a bump encapsulation material extending upwardly from the material of the plurality of pads along sides of the plurality of bumps. The package may couple with a motherboard using no underfill material.Type: ApplicationFiled: March 29, 2018Publication date: January 3, 2019Applicant: SEMICONDUCTOR COMPONENTS INDUSTRIES, LLCInventor: Shou-Chian HSU
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Publication number: 20170084513Abstract: A semiconductor package including an insulating layer, a chip, a thermal interface material, a heat-dissipating cover and a re-distribution layer is provided. The insulating layer has an accommodating opening. The chip is disposed in the accommodating opening. The chip has an active surface, a back surface opposite to the active surface and a side surface connected to the active surface and the back surface. The thermal interface material is filled in the accommodating opening for at least encapsulating the side surface of the chip and exposing the active surface. The re-distribution layer and the heat-dissipating cover are disposed on two side of the insulating layer respectively. The heat-dissipating cover is thermally coupled to the chip through the thermal interface material. The re-distribution layer directly covers the insulating layer, the active surface of the chip and the thermal interface material, and the re-distribution layer is electrically connected to the chip.Type: ApplicationFiled: December 5, 2016Publication date: March 23, 2017Applicant: Powertech Technology Inc.Inventors: Shou-Chian Hsu, Hiroyuki Fujishima
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Patent number: 9553036Abstract: A semiconductor package including an insulating layer, a chip, a thermal interface material, a heat-dissipating cover and a re-distribution layer is provided. The insulating layer has an accommodating opening. The chip is disposed in the accommodating opening. The chip has an active surface, a back surface opposite to the active surface and a side surface connected to the active surface and the back surface. The thermal interface material is filled in the accommodating opening for at least encapsulating the side surface of the chip and exposing the active surface. The re-distribution layer and the heat-dissipating cover are disposed on two side of the insulating layer respectively. The heat-dissipating cover is thermally coupled to the chip through the thermal interface material. The re-distribution layer covers the active surface of the chip and the thermal interface material, and the re-distribution layer is electrically connected to the chip.Type: GrantFiled: July 9, 2015Date of Patent: January 24, 2017Assignee: Powertech Technology Inc.Inventors: Shou-Chian Hsu, Hiroyuki Fujishima
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Publication number: 20170011983Abstract: A semiconductor package including an insulating layer, a chip, a thermal interface material, a heat-dissipating cover and a re-distribution layer is provided. The insulating layer has an accommodating opening. The chip is disposed in the accommodating opening. The chip has an active surface, a back surface opposite to the active surface and a side surface connected to the active surface and the back surface. The thermal interface material is filled in the accommodating opening for at least encapsulating the side surface of the chip and exposing the active surface. The re-distribution layer and the heat-dissipating cover are disposed on two side of the insulating layer respectively. The heat-dissipating cover is thermally coupled to the chip through the thermal interface material. The re-distribution layer covers the active surface of the chip and the thermal interface material, and the re-distribution layer is electrically connected to the chip.Type: ApplicationFiled: July 9, 2015Publication date: January 12, 2017Inventors: Shou-Chian Hsu, Hiroyuki Fujishima