Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate While spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.

Abstract: Some embodiments relate to a processing tool for processing a singulated semiconductor die. The tool includes an evaluation unit, a drying unit, and a die wipe station. The evaluation unit is configured to subject the singulated semiconductor die to a liquid to detect flaws in the singulated semiconductor die. The drying unit is configured to dry the liquid from a frontside of the singulated semiconductor die. The die wipe station includes an absorptive drying structure configured to absorb the liquid from a backside of the singulated semiconductor die after the drying unit has dried the liquid from the frontside of the singulated semiconductor die.

Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.

Abstract: A multi-spray RRC process with dynamic control to improve final yield and further reduce resist cost is disclosed. In one embodiment, a method, includes: dispensing a first layer of solvent on a semiconductor substrate while spinning at a first speed for a first time period; dispensing the solvent on the semiconductor substrate while spinning at a second speed for a second time period so as to transform the first layer to a second layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a third speed for a third time period so as to transform the second layer to a third layer of the solvent; dispensing the solvent on the semiconductor substrate while spinning at a fourth speed for a fourth time period so as to transform the third layer to a fourth layer of the solvent; and dispensing a first layer of photoresist on the fourth layer of the solvent while spinning at a fifth speed for a fifth period of time.

Abstract: The present disclosure, in some embodiments, relates to an integrated chip processing tool. The integrated chip processing tool includes a first transfer module and a second transfer module. The first transfer module has a first robotic arm disposed within a housing. The first transfer module is configured to receive a single and unitary first die tray configured to hold a plurality of integrated chip (IC) die and to concurrently transfer all of the plurality of IC die held by the single and unitary first die tray to a single and unitary die boat. The second transfer module has an additional robotic arm disposed within the housing and configured to concurrently transfer all of the plurality of IC die from the single and unitary die boat to a single and unitary second die tray.

Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.

Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.

Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.

Abstract: A gas tube, a gas supply system containing the same and a semiconductor manufacturing method using the same are provided. The gas tube includes a porous material body and a resistant sheath surrounding the porous material body. The porous material body has a hollow tube structure and an empty cavity inside the hollow tube structure. The porous material body is hydrophobic and has a plurality of pores therein. The resistant sheath is disposed on the porous material body and surrounds the porous material body. The resistant sheath includes a plurality of holes penetrating through the resistant sheath.

Abstract: A method includes: receiving a defect map from a defect scanner, wherein the defect map comprises at least one defect location of a semiconductor workpiece; annotating the defect map with a reference fiducial location of the semiconductor workpiece; determining a detected fiducial location within image data of the semiconductor workpiece; determining an offset correction based on comparing the detected fiducial location with the reference fiducial location; producing a corrected defect map by applying the offset correction to the defect map, wherein the applying the offset correction translocates the at least one defect location; and transferring the corrected defect map to a defect reviewer configured to perform root cause analysis based on the corrected defect map.

Abstract: In an embodiment a system includes: an automated vehicle configured to traverse a first predetermined path; and a sensor system located on the automated vehicle, the sensor system configured to detect a vertical obstacle along the first predetermined path along one or two floorboards ahead of the automated vehicle, wherein the automated vehicle is configured to traverse a second predetermined path in response to detecting the vertical obstacle.

Abstract: A gas tube, a gas supply system containing the same and a semiconductor manufacturing method using the same are provided. The gas tube includes a porous material body and a resistant sheath surrounding the porous material body. The porous material body has a hollow tube structure and an empty cavity inside the hollow tube structure. The porous material body is hydrophobic and has a plurality of pores therein. The resistant sheath is disposed on the porous material body and surrounds the porous material body. The resistant sheath includes a plurality of holes penetrating through the resistant sheath.

Abstract: In an embodiment a system includes: an automated vehicle configured to traverse a first predetermined path; and a sensor system located on the automated vehicle, the sensor system configured to detect a vertical obstacle along the first predetermined path along one or two floorboards ahead of the automated vehicle, wherein the automated vehicle is configured to traverse a second predetermined path in response to detecting the vertical obstacle.

Abstract: A system and method for defect detection in a hole array on a substrate is disclosed herein. In one embodiment, a method for defect detection in a hole array on a substrate, includes: scanning a substrate surface using at least one optical detector, generating at least one image of the substrate surface; and analyzing the at least one image to detect defects in the hole array on the substrate surface based on a set of predetermined criteria.

Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.

Abstract: Disclosed is a vacuum chuck and a method for securing a warped semiconductor substrate during a semiconductor manufacturing process so as to improve its flatness during a semiconductor manufacturing process. For example, a semiconductor manufacturing system includes: a vacuum chuck configured to hold a substrate, wherein the vacuum chuck comprises, a plurality of vacuum grooves located on a top surface of the vacuum chuck, wherein the top surface is configured to face the substrate; and a plurality of flexible seal rings disposed on the vacuum chuck and extending outwardly from the top surface, wherein the plurality of flexible seal rings are configured to directly contact a bottom surface of the substrate and in adjacent to the plurality of vacuum grooves so as to form a vacuum seal between the substrate and the vacuum chuck, and wherein each of the plurality of flexible seal rings has a zigzag cross section.

Abstract: Some embodiments of the present disclosure relate to a processing tool. The tool includes a housing enclosing a processing chamber, and an input/output port configured to pass a wafer through the housing into and out of the processing chamber. A back-side macro-inspection system is arranged within the processing chamber and is configured to image a back side of the wafer. A front-side macro-inspection system is arranged within the processing chamber and is configured to image a front side of the wafer according to a first image resolution. A front-side micro-inspection system is arranged within the processing chamber and is configured to image the front side of the wafer according to a second image resolution which is higher than the first image resolution.

Abstract: In an embodiment, a system includes a profiler configured to detect variations along a surface of a semiconductor stage; and a jig configured to move the profiler along an axis over the semiconductor stage.

Abstract: A method for scanning and analyzing a surface, the method comprising: receiving a piece of equipment with a target surface for inspection; receiving an input from a user; determining at least one scan parameter based on the user input; scanning the target surface using an optical detector in accordance with the at least one scan parameter; generating an image of the target surface; correcting the image of the target surface to remove at least one undesired feature to generate a corrected image based on the at least one scan parameter; and analyzing the corrected image to determine at least one geometric parameter of the target surface.

Abstract: A wafer includes a first face having a first center, and a second face having a second center. The first and second centers are each arranged on a central axis, which passes through the first face and the second face. The first face and the second face adjoin one another at a circumferential edge. An alignment notch is disposed along the circumferential edge, and extends inwardly from the circumferential edge by an alignment notch radial distance. The alignment notch radial distance is less than a wafer radius as measured from the first center to the circumferential edge. A die region includes an array of die arranged in rows and columns and is circumferentially bounded by a die-less region which is devoid of die. A first identification mark including a string of characters is disposed entirely in the die-less region to a first side of the alignment notch.