Abstract: A display device includes a plurality of data lines, a plurality of scan lines, and a pixel array. The pixel array is electrically coupled to the data lines and the scan lines. Colors of the sub pixels electrically coupled to the same scan line are the same. The pixel array includes a plurality of first color sub-pixel rows, a plurality of second color sub-pixel rows, and a plurality of third color sub-pixel rows. The third color sub-pixels corresponding to the same data line include a first sub-pixel and a second sub-pixel. The first sub-pixel and the second sub-pixel have different polarities. The sub-pixels configured between the first sub-pixel and the second sub-pixel have the same polarity.

Abstract: A display panel includes a pixel array, a gate driving circuit, and a data driving circuit. The pixel array includes a plurality of pixel blocks, a plurality of gate lines and a plurality of data lines. The gate driving circuit is electrically coupled to the gate lines for driving sub-pixels of the pixel array. The data driving circuit is electrically coupled to the data lines for providing data signals to the sub-pixels of the pixel array. The sub-pixels of each pixel block include a plurality of first sub-pixels and a plurality of second sub-pixels. For each pixel block, the first sub-pixels and the second sub-pixels have same quantity. For displaying a specified gray-scale value, a luminance value in each first sub-pixel is greater than a luminance value in each second sub-pixel. The data driving circuit changes a polarity of each sub-pixel of the pixel array by using a polarization sequence.

Abstract: A pixel structure including a plurality of sub-pixels arranged in array is provided. Each of the sub-pixels includes an active device and a pixel electrode electrically connected to the active device respectively. Each of the pixel electrodes includes a plurality of stripe patterns respectively, and spacings of at least one portion of the stripe patterns of at least one of the sub-pixels are larger than spacings of the stripe patterns of the other sub-pixels.

Abstract: A display panel includes a pixel array, a gate driving circuit, and a data driving circuit. The pixel array includes a plurality of pixel blocks, a plurality of gate lines and a plurality of data lines. The gate driving circuit is electrically coupled to the gate lines for driving sub-pixels of the pixel array. The data driving circuit is electrically coupled to the data lines for providing data signals to the sub-pixels of the pixel array. The sub-pixels of each pixel block include a plurality of first sub-pixels and a plurality of second sub-pixels. For each pixel block, the first sub-pixels and the second sub-pixels have same quantity. For displaying a specified gray-scale value, a luminance value in each first sub-pixel is greater than a luminance value in each second sub-pixel. The data driving circuit changes a polarity of each sub-pixel of the pixel array by using a polarization sequence.

Abstract: A display device includes a plurality of data lines, a plurality of scan lines, and a pixel array. The pixel array is electrically coupled to the data lines and the scan lines. Colors of the sub pixels electrically coupled to the same scan line are the same. The pixel array includes a plurality of first color sub-pixel rows, a plurality of second color sub-pixel rows, and a plurality of third color sub-pixel rows. The third color sub-pixels corresponding to the same data line include a first sub-pixel and a second sub-pixel. The first sub-pixel and the second sub-pixel have different polarities. The sub-pixels configured between the first sub-pixel and the second sub-pixel have the same polarity.

Abstract: A pixel structure is provided. The pixel structure includes a control device, a main pixel electrode, and a sub pixel electrode. The main pixel electrode is electrically connected to the control device, and the main pixel electrode has a plurality of main pixel slits where the width thereof is S. The sub pixel electrode is electrically connected to the control device, and the sub pixel electrode has a first electrode pattern and a second electrode pattern. The first electrode pattern has a plurality of first slits where the width S1 thereof is equal to or greater than the width S of the main pixel slits. The second electrode pattern has no slits or has a plurality of second slits where the width S2 thereof is less than the width S of the main pixel slits. A pixel array including the pixel structure is also provided.

Abstract: A pixel structure is provided. The pixel structure includes a control device, a main pixel electrode, and a sub pixel electrode. The main pixel electrode is electrically connected to the control device, and the main pixel electrode has a plurality of main pixel slits where the width thereof is S. The sub pixel electrode is electrically connected to the control device, and the sub pixel electrode has a first electrode pattern and a second electrode pattern. The first electrode pattern has a plurality of first slits where the width S1 thereof is equal to or greater than the width S of the main pixel slits. The second electrode pattern has no slits or has a plurality of second slits where the width S2 thereof is less than the width S of the main pixel slits. A pixel array including the pixel structure is also provided.

Abstract: A pixel structure including a plurality of sub-pixels arranged in array is provided. Each of the sub-pixels includes an active device and a pixel electrode electrically connected to the active device respectively. Each of the pixel electrodes includes a plurality of stripe patterns respectively, and spacings of at least one portion of the stripe patterns of at least one of the sub-pixels are larger than spacings of the stripe patterns of the other sub-pixels.

Abstract: A pixel structure includes a plurality of sub-pixels arranged in an array. Each of the sub-pixels includes an active device and a pixel electrode electrically connected to the active device. A disclination area and a plurality of domains separated by the disclination area are defined in each of the pixel electrodes, respectively. Here, only a portion of the sub-pixels further includes a light-shielding pattern arranged corresponding to the disclination area.

Abstract: A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.

Abstract: A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.

Abstract: A low-power magnetic random access memory (MRAM) with high write selectivity is provided. Write word lines and pillar write word lines covered with a magnetic material are disposed in an zigzag relation, solving the magnetic interference problem generated by cells adjacent to the pillar write word line in the magnetic RAM with the pillar write word line form. According to the disclosed structure, each of the cells has a smaller bit size and a lower write current. This effectively reduces the power consumption of the MRAM.