Patents by Inventor Shu-Wei Yeh

Shu-Wei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240349515
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.
    Type: Application
    Filed: June 27, 2024
    Publication date: October 17, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240321632
    Abstract: A semiconductor device includes an interconnect structure embedded in a first metallization layer comprising a dielectric material. The interconnect structure includes a first metal material. The semiconductor device includes a first liner structure embedded in the first metallization layer. The first liner structure is extended along one or more boundaries of the interconnect structure in the first metallization layer. The first liner structure includes a second metal material reacted with one or more dopants, the second metal material being different from the first metal material.
    Type: Application
    Filed: June 4, 2024
    Publication date: September 26, 2024
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Ching-Fu Yeh, Yu-Chen Chan, Guanyu Luo, Meng-Pei Lu, Chao-Hsien PENG, Shin-Yi Yang, Ming-Han Lee, Shu-Wei Li
  • Publication number: 20240280407
    Abstract: Systems, apparatuses, and methods for multi-application optical sensing are provided. For example, an optical sensing apparatus can include a photodetector array, a first circuitry, and a second circuitry. The photodetector array includes a plurality of photodetectors, wherein a first subset of the plurality of photodetectors are configured as a first region for detecting a first optical signal, and a second subset of the plurality of photodetectors are configured as a second region for detecting a second optical signal. The first circuitry, coupled to the first region, is configured to perform a first function based on the first optical signal to output a first output result. The second circuitry, coupled to the second region, is configured to perform a second function based on the second optical signal to output a second output result.
    Type: Application
    Filed: May 1, 2024
    Publication date: August 22, 2024
    Inventors: Chih-Wei Yeh, Hung-Chih Chang, Yun-Chung Na, Tsung-Ting Wu, Shu-Lu Chen
  • Patent number: 12063791
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: August 13, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240238432
    Abstract: A method for modifying glycoproteins is provided. The present disclosure also provides a method for producing glycoprotein-payload conjugates, the conjugates produced thereby, and the use thereof.
    Type: Application
    Filed: December 29, 2023
    Publication date: July 18, 2024
    Inventors: Shih-Hsien CHUANG, Yu-Wei LAI, Cheng-Chou YU, Shu-Ping YEH, Jin-Yu WANG, Shih-Chong TSAI, Wei-Ting SUN, Chin-Yi Huang
  • Publication number: 20240178694
    Abstract: A smart charging method and an electronic device using the same are provided. The smart charging method includes the following steps. Whether an electronic device is connected to a charger is determined. If the battery is connected to the charger, whether a current time is within a predetermined idle period is determined. If the current time is within the predetermined idle period, a battery of the electronic device is charged at a charge rate less than 0.8C by constant current charging, which lasts for a predetermined constant current charging time. After the predetermined constant current charging time is over, the battery is idled for a predetermined idle time. After the predetermined idle time is over, the battery is charged by constant voltage charging.
    Type: Application
    Filed: November 30, 2023
    Publication date: May 30, 2024
    Applicant: Acer Incorporated
    Inventors: Shu-Wei YEH, Chuan-Jung WANG
  • Patent number: 11989411
    Abstract: An electronic apparatus and a hotkey prompt method thereof are provided. The method includes the following steps. A power-on self-test (POST) procedure of a basic input output system (BIOS) is performed. During the POST procedure, a display panel of a keyboard module is controlled to display a first keyboard layout, so as to display at least one hotkey corresponding to at least one hotkey function of the BIOS via the display panel. After a hotkey input operation is received via the keyboard, a first hotkey function of the at least one hotkey function of the BIOS is performed. The hotkey input operation is used to enable the first hotkey function. In response to performing the first hotkey function, the display panel of the keyboard module is controlled to display a second keyboard layout.
    Type: Grant
    Filed: December 14, 2022
    Date of Patent: May 21, 2024
    Assignee: Acer Incorporated
    Inventor: Shu-Wei Yeh
  • Publication number: 20240147683
    Abstract: The invention provides a layout pattern of static random access memory, which comprises a plurality of fin structures on a substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate. The transistors include a first pull-up transistor (PU1), a first pull-down transistor (PD1), a second pull-up transistor (PU2) and a second pull-down transistor (PD2), a first access transistor (PG1), a second access transistor (PG2), a first read port transistor (RPD) and a second read port transistor (RPG). The gate structure of the first read port transistor (RPD) is connected to the gate structure of the first pull-down transistor (PD1), wherein a drain of the first pull-down transistor (PD1) is connected to a first voltage source Vss1, and a drain of the first read port transistor (RPD) is connected to a second voltage source Vss2.
    Type: Application
    Filed: November 27, 2022
    Publication date: May 2, 2024
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Wei Yeh, Chang-Hung Chen
  • Patent number: 11943935
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: September 26, 2022
    Date of Patent: March 26, 2024
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20240053885
    Abstract: An electronic apparatus and a hotkey prompt method thereof are provided. The method includes the following steps. A power-on self-test (POST) procedure of a basic input output system (BIOS) is performed. During the POST procedure, a display panel of a keyboard module is controlled to display a first keyboard layout, so as to display at least one hotkey corresponding to at least one hotkey function of the BIOS via the display panel. After a hotkey input operation is received via the keyboard, a first hotkey function of the at least one hotkey function of the BIOS is performed. The hotkey input operation is used to enable the first hotkey function. In response to performing the first hotkey function, the display panel of the keyboard module is controlled to display a second keyboard layout.
    Type: Application
    Filed: December 14, 2022
    Publication date: February 15, 2024
    Applicant: Acer Incorporated
    Inventor: Shu-Wei Yeh
  • Patent number: 11586304
    Abstract: A digital-pointer interaction system is provided, which includes a display apparatus, a host, a wireless receiving device, and a plurality of wireless pointer devices. The host plays a display screen on the display apparatus, and executes a digital-pointer application. The digital-pointer application renders a plurality of pointer cursors on the display screen according to a number of wireless pointer devices connected to the wireless receiving device, and each wireless pointer device corresponds to each pointer cursor. Each wireless pointer device periodically emits an indication signal to the wireless receiving device, and the wireless receiving device transmits the indication signal to the host. The indication signal includes displacement information of each wireless pointer device. The digital-pointer application controls movement of each pointer cursor on the display screen according to the displacement information of each wireless pointer device.
    Type: Grant
    Filed: October 12, 2021
    Date of Patent: February 21, 2023
    Assignee: ACER INCORPORATED
    Inventors: Chun-Wen Wang, Shu-Kuo Kao, Chao-Kuang Yang, Chien-Shan Wang, Shu-Wei Yeh, Chi-Hsiu Kao
  • Publication number: 20230020795
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Application
    Filed: September 26, 2022
    Publication date: January 19, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20230018513
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region and a second cell region and a diffusion region on the substrate extending through the first cell region and the second cell region. Preferably, the diffusion region includes a first H-shape and a second H-shape according to a top view.
    Type: Application
    Filed: September 26, 2022
    Publication date: January 19, 2023
    Applicant: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Patent number: 11531388
    Abstract: An electronic apparatus and a power management method thereof are provided. The power management method is adapted to the electronic apparatus and includes the following steps. A target time is obtained according to a user input. A remaining demand time is determined according to the target time and an elapsed time after activating timing. A time-to-empty of a battery device is obtained. The time-to-empty of the battery device and the remaining demand time are compared to provide a visual notification and a user behavior suggestion message according to the comparison result. The user behavior suggestion message includes at least one power saving operation.
    Type: Grant
    Filed: November 18, 2020
    Date of Patent: December 20, 2022
    Assignee: Acer Incorporated
    Inventor: Shu-Wei Yeh
  • Patent number: 11502088
    Abstract: A layout pattern of static random access memory at least includes a substrate, a plurality of fin structures on the substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate, the plurality of transistors include, a first pull-up transistor PU1, a first pull-down transistor PD1, a second pull-up transistor PU2, a second pull-down transistor PD2, a first pass gate transistor PG1, a second pass gate transistor PG2, a first read transistor RPD and a second read transistor RPG, and an additional fin structure, the additional fin structure is located between the fin structure of the first pass gate transistor PG1 and the fin structure of the second read transistor RPG.
    Type: Grant
    Filed: February 1, 2021
    Date of Patent: November 15, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Wei-Chi Lee, Shu-Wei Yeh, Chang-Hung Chen
  • Patent number: 11489010
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Grant
    Filed: August 31, 2020
    Date of Patent: November 1, 2022
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang
  • Publication number: 20220216220
    Abstract: A layout pattern of static random access memory at least includes a substrate, a plurality of fin structures on the substrate, a plurality of gate structures on the substrate and spanning the fin structures to form a plurality of transistors distributed on the substrate, the plurality of transistors include, a first pull-up transistor PU1, a first pull-down transistor PD1, a second pull-up transistor PU2, a second pull-down transistor PD2, a first pass gate transistor PG1, a second pass gate transistor PG2, a first read transistor RPD and a second read transistor RPG, and an additional fin structure, the additional fin structure is located between the fin structure of the first pass gate transistor PG1 and the fin structure of the second read transistor RPG.
    Type: Application
    Filed: February 1, 2021
    Publication date: July 7, 2022
    Inventors: Wei-Chi Lee, Shu-Wei Yeh, Chang-Hung Chen
  • Publication number: 20220155883
    Abstract: A digital-pointer interaction system is provided, which includes a display apparatus, a host, a wireless receiving device, and a plurality of wireless pointer devices. The host plays a display screen on the display apparatus, and executes a digital-pointer application. The digital-pointer application renders a plurality of pointer cursors on the display screen according to a number of wireless pointer devices connected to the wireless receiving device, and each wireless pointer device corresponds to each pointer cursor. Each wireless pointer device periodically emits an indication signal to the wireless receiving device, and the wireless receiving device transmits the indication signal to the host. The indication signal includes displacement information of each wireless pointer device. The digital-pointer application controls movement of each pointer cursor on the display screen according to the displacement information of each wireless pointer device.
    Type: Application
    Filed: October 12, 2021
    Publication date: May 19, 2022
    Inventors: Chun-Wen WANG, Shu-Kuo KAO, Chao-Kuang YANG, Chien-Shan WANG, Shu-Wei YEH, Chi-Hsiu KAO
  • Patent number: 11290847
    Abstract: An electronic device includes an indoor positioner and a positioning engine server. The indoor positioner has an array antenna to receive a wireless signal from user equipment, and to calculate the angle of arrival (AOA) of the wireless signal according to the phase difference and the time difference. The wireless signal includes status data of the user equipment. The positioning engine server converts the angle of arrival into a set of coordinates that correspond to a position of the user equipment, and inputs the set of coordinates to an IMM module. The IMM module includes a first state module and a second state module. The IMM module calculates weighting values for the first state module and the second state module according to the status data of the user equipment, and outputs an estimated set of coordinates according to the set of coordinates and the weighting values.
    Type: Grant
    Filed: September 8, 2020
    Date of Patent: March 29, 2022
    Assignee: QUANTA COMPUTER INC.
    Inventors: Shu-Wei Yeh, Po-Shan Kao, Chiao-Wei Lu, Wan-An Yang
  • Publication number: 20220045126
    Abstract: A layout pattern of a magnetoresistive random access memory (MRAM) includes a substrate having a first cell region, a second cell region, a third cell region, and a fourth cell region and a diffusion region on the substrate extending through the first cell region, the second cell region, the third cell region, and the fourth cell region. Preferably, the diffusion region includes a H-shape according to a top view.
    Type: Application
    Filed: August 31, 2020
    Publication date: February 10, 2022
    Inventors: Chun-Yen Tseng, Shu-Ru Wang, Yu-Tse Kuo, Chang-Hung Chen, Yi-Ting Wu, Shu-Wei Yeh, Ya-Lan Chiou, Chun-Hsien Huang