Patents by Inventor Shu-Wei Yeh

Shu-Wei Yeh has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20210400435
    Abstract: An electronic device includes an indoor positioner and a positioning engine server. The indoor positioner has an array antenna to receive a wireless signal from user equipment, and to calculate the angle of arrival (AOA) of the wireless signal according to the phase difference and the time difference. The wireless signal includes status data of the user equipment. The positioning engine server converts the angle of arrival into a set of coordinates that correspond to a position of the user equipment, and inputs the set of coordinates to an IMM module. The IMM module includes a first state module and a second state module. The IMM module calculates weighting values for the first state module and the second state module according to the status data of the user equipment, and outputs an estimated set of coordinates according to the set of coordinates and the weighting values.
    Type: Application
    Filed: September 8, 2020
    Publication date: December 23, 2021
    Inventors: Shu-Wei YEH, Po-Shan KAO, Chiao-Wei LU, Wan-An YANG
  • Patent number: 10607981
    Abstract: The present invention provides a layout pattern of a static random access memory (SRAM), comprising at least one substrate, two SRAM units on the substrate, respectively located in a first region and a second region which is adjacent to the first region. Each of the SRAM units includes a first inverter coupled to a second inverter and configured to form a latching circuit, the first inverter includes a first pull-up transistor (PU1) and a first pull-down transistor (PD1), the second inverter includes a second pull-up transistor (PU2) and a second pull-down transistor (PD2). A dummy layer crossing the first a region and the second region, and between the PD1 in the first region and the PD1 in the second region, and a contact structure on the dummy layer, electrically connected to a voltage source Vss.
    Type: Grant
    Filed: August 13, 2018
    Date of Patent: March 31, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Wei Yeh, Chang-Hung Chen
  • Publication number: 20200027869
    Abstract: The present invention provides a layout pattern of a static random access memory (SRAM), comprising at least one substrate, two SRAM units on the substrate, respectively located in a first region and a second region which is adjacent to the first region. Each of the SRAM units includes a first inverter coupled to a second inverter and configured to form a latching circuit, the first inverter includes a first pull-up transistor (PU1) and a first pull-down transistor (PD1), the second inverter includes a second pull-up transistor (PU2) and a second pull-down transistor (PD2). A dummy layer crossing the first a region and the second region, and between the PD1 in the first region and the PD1 in the second region, and a contact structure on the dummy layer, electrically connected to a voltage source Vss.
    Type: Application
    Filed: August 13, 2018
    Publication date: January 23, 2020
    Inventors: Shu-Wei Yeh, Chang-Hung Chen
  • Patent number: 10529723
    Abstract: A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device and a second pass gate device disposed on a substrate. A plurality of fin structures are disposed on the substrate, and the fin structures include at least one first fin structure and at least one second fin structure. A J-shaped gate structure is disposed on the substrate, including a long part, a short part and a bridge part. At least one first extending contact structure crosses over the at least one first fin structure and the at least one second fin structure, wherein the at least one first extending contact structure does not overlap with the bridge part of the J-shaped gate structure.
    Type: Grant
    Filed: June 20, 2016
    Date of Patent: January 7, 2020
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Wei Yeh, Tsung-Hsun Wu, Chih-Ming Su, Yu-Tse Kuo
  • Patent number: 10141319
    Abstract: A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device, a second pass gate device, a third pass gate device and a fourth pass gate device disposed on a substrate. A plurality of fin structures is disposed on the substrate, the fin structures including at least one first fin structure and at least one second fin structure. A step-shaped structure is disposed on the substrate, including a first part, a second part and a bridge part. A first extending contact feature crosses over the at least one first fin structure and the at least one second fin structure.
    Type: Grant
    Filed: August 22, 2017
    Date of Patent: November 27, 2018
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Wei Yeh, Tsung-Hsun Wu, Chih-Ming Su, Zhi-Xian Chou
  • Publication number: 20180006038
    Abstract: A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device, a second pass gate device, a third pass gate device and a fourth pass gate device disposed on a substrate. A plurality of fin structures is disposed on the substrate, the fin structures including at least one first fin structure and at least one second fin structure. A step-shaped structure is disposed on the substrate, including a first part, a second part and a bridge part. A first extending contact feature crosses over the at least one first fin structure and the at least one second fin structure.
    Type: Application
    Filed: August 22, 2017
    Publication date: January 4, 2018
    Inventors: Shu-Wei Yeh, Tsung-Hsun Wu, Chih-Ming Su, Zhi-Xian Chou
  • Publication number: 20170323894
    Abstract: A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device and a second pass gate device disposed on a substrate. A plurality of fin structures are disposed on the substrate, and the fin structures include at least one first fin structure and at least one second fin structure. A J-shaped gate structure is disposed on the substrate, including a long part, a short part and a bridge part. At least one first extending contact structure crosses over the at least one first fin structure and the at least one second fin structure, wherein the at least one first extending contact structure does not overlap with the bridge part of the J-shaped gate structure.
    Type: Application
    Filed: June 20, 2016
    Publication date: November 9, 2017
    Inventors: Shu-Wei Yeh, Tsung-Hsun Wu, Chih-Ming Su, Yu-Tse Kuo
  • Patent number: 9780099
    Abstract: A layout pattern of a static random access memory includes a pull-up device, a first pull-down device, a second pull-up device, a second pull-down device, a first pass gate device, a second pass gate device, a third pass gate device and a fourth pass gate device disposed on a substrate. A plurality of fin structures is disposed on the substrate, the fin structures including at least one first fin structure and at least one second fin structure. A step-shaped structure is disposed on the substrate, including a first part, a second part and a bridge part. A first extending contact feature crosses over the at least one first fin structure and the at least one second fin structure.
    Type: Grant
    Filed: August 11, 2016
    Date of Patent: October 3, 2017
    Assignee: UNITED MICROELECTRONICS CORP.
    Inventors: Shu-Wei Yeh, Tsung-Hsun Wu, Chih-Ming Su, Zhi-Xian Chou
  • Publication number: 20110221558
    Abstract: A coil of a transformer has two side conducting brackets and at least one middle conducting bracket. The middle conducting bracket is elongated or spiral-shaped and has two terminals respectively connected to the side conducting brackets. The side conducting brackets and the at least one middle conducting bracket of some specific type are connected to form different numbers of loops or different types of circuits (series circuits or parallel circuits). Therefore, design and fabrication of the coil is flexible and materials and manufacturing costs are saved. Moreover, the side conducting brackets and the at least one middle conducting bracket require only two or four soldered joints so number of soldered joints required is limited and efficiency of the transformer is improved.
    Type: Application
    Filed: February 25, 2011
    Publication date: September 15, 2011
    Applicant: ACBEL POLYTECH INC.
    Inventors: Kuo-Chu YEH, Shu-Wei Yeh, Chun-Chieh Chu, Wei-Liang Lin