Patents by Inventor Shuhei Matsuda
Shuhei Matsuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20240042836Abstract: A vehicle display apparatus includes: a transparent display that is installed on a window glass of a vehicle and displays an image of content which is a display target; a mask layer that is disposed to overlap the transparent display and is capable of changing a visibility of a display region of the image from outside the vehicle; and a mask setting unit that sets a visibility of the mask layer depending on details of the content.Type: ApplicationFiled: July 21, 2023Publication date: February 8, 2024Applicant: Alps Alpine Co., Ltd.Inventors: Taro Iwamoto, Manabu Fujiwara, Shuhei Matsuda, Masatada Muramoto
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Patent number: 11890719Abstract: In a method of polishing a silicon wafer, a final polishing step includes an upstream polishing step and a subsequent finish polishing step. In the upstream polishing step, as a polishing agent, a first alkaline aqueous solution containing abrasive grains with a density of 1×1014/cm3 or more is first supplied, and the supply is then switched to a supply of a second alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×1013/cm3 or less. In the finish polishing step, as a polishing agent, a third alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×10?13/cm3 or less is supplied. Thus, the formation of not only PIDs but also scratches with small depth can be suppressed.Type: GrantFiled: October 17, 2017Date of Patent: February 6, 2024Assignee: SUMCO CORPORATIONInventor: Shuhei Matsuda
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Patent number: 11626331Abstract: Provided is a method of evaluating a silicon wafer manufacturing process for mass-producing multiple silicon wafers. Lifetime measurement to silicon wafers mass-produced in the silicon wafer manufacturing process is performed in different locations within a surface of each of the silicon wafers and multiple measurement values are obtained. The representative value is determined for each of the silicon wafers from the multiple measurement values. The determination threshold is obtained for each wafer group including multiple silicon wafers using the representative value for each of the silicon wafers included in the wafer group. Whether the wafer group includes a silicon wafer having a lifetime outlier determined on the basis of the determination threshold among the multiple measurement values obtained for each of the silicon wafers is determined, and whether the manufacturing process may cause a defective product to be produced is determined.Type: GrantFiled: July 2, 2018Date of Patent: April 11, 2023Assignee: SUMCO CORPORATIONInventors: Shigeru Daigo, Shuhei Matsuda
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Publication number: 20210171801Abstract: A polishing composition is provided that is capable of quickly removing oxide film even with lower abrasive concentration. A polishing composition includes: silica with a silanol group density of 2.0 OH/nm2 or higher; and an organic silicon compound having, at a terminal, an amino group, methylamino group, dimethylamino group or quaternary ammonium group, the organic silicon compound having two or more alkoxyl groups or hydroxyl groups bonded to an Si atom thereof. However, the quaternary ammonium group of the organic silicon compound does not have an alkyl group with a carbon number of two or more.Type: ApplicationFiled: August 1, 2019Publication date: June 10, 2021Inventor: Shuhei MATSUDA
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Publication number: 20200365472Abstract: Provided is a method of evaluating a silicon wafer manufacturing process for mass-producing multiple silicon wafers. Lifetime measurement to silicon wafers mass-produced in the silicon wafer manufacturing process is performed in different locations within a surface of each of the silicon wafers and multiple measurement values are obtained. The representative value is determined for each of the silicon wafers from the multiple measurement values. The determination threshold is obtained for each wafer group including multiple silicon wafers using the representative value for each of the silicon wafers included in the wafer group. Whether the wafer group includes a silicon wafer having a lifetime outlier determined on the basis of the determination threshold among the multiple measurement values obtained for each of the silicon wafers is determined, and whether the manufacturing process may cause a defective product to be produced is determined.Type: ApplicationFiled: July 2, 2018Publication date: November 19, 2020Applicant: SUMCO CORPORATIONInventors: Shigeru DAIGO, Shuhei MATSUDA
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Publication number: 20200306922Abstract: In a method of polishing a silicon wafer, a final polishing step includes an upstream polishing step and a subsequent finish polishing step. In the upstream polishing step, as a polishing agent, a first alkaline aqueous solution containing abrasive grains with a density of 1×1014/cm3 or more is first supplied, and the supply is then switched to a supply of a second alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×1013/cm3 or less. In the finish polishing step, as a polishing agent, a third alkaline aqueous solution containing a water-soluble polymer and abrasive grains with a density of 5×10?13/cm3 or less is supplied. Thus, the formation of not only PIDs but also scratches with small depth can be suppressed.Type: ApplicationFiled: October 17, 2017Publication date: October 1, 2020Applicant: SUMCO CORPORATIONInventor: Shuhei MATSUDA
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Patent number: 10696869Abstract: A polishing composition capable of suppressing surface defects and reducing haze is provided. The polishing composition includes: abrasives; at least one water-soluble polymer selected from vinyl alcohol-based resins having a 1,2-diol structural unit; a polyalcohol; and an alkali compound. Preferably, the polishing composition further includes a non-ionic surfactant.Type: GrantFiled: October 21, 2016Date of Patent: June 30, 2020Assignee: NITTA HAAS INCORPORATEDInventors: Noriaki Sugita, Shuhei Matsuda, Takayuki Matsushita, Mika Tazuru
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Patent number: 10526728Abstract: A manufacturing method of this invention includes: a step of slicing a silicon single crystal containing boron as an acceptor and obtaining a non-heat-treated silicon wafer, a step of determining a boron concentration with respect to the non-heat-treated silicon wafer, and a step of determining an oxygen donor concentration with respect to the non-heat-treated silicon wafer, in which a determination as to whether or not to perform a heat treatment at a temperature of 300° C. or more on the non-heat-treated silicon wafer is made based on a boron concentration determined in the step of determining a boron concentration, and an oxygen donor concentration determined in the step of determining an oxygen donor concentration. By this means, a wafer in which unevenly distributed LPDs that are present on the wafer are reduced is obtained.Type: GrantFiled: April 10, 2015Date of Patent: January 7, 2020Assignee: SUMCO CORPORATIONInventors: Satoshi Kudo, Kouzou Nakamura, Toshiyuki Muranaka, Shuhei Matsuda, Tegi Kim, Keiichiro Hiraki
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Patent number: 10435588Abstract: A polishing composition that can suppress surface defects and reduce haze is provided. A polishing composition includes: abrasives; at least one water-soluble polymer selected from vinyl alcohol-based resins having a 1,2-diol structural unit; and an alkali compound, where an average particle size of particles in the polishing composition measured by dynamic light scattering is not more than 55 nm. Preferably, the polishing composition further includes a non-ionic surfactant. Preferably, the polishing composition further includes a polyalcohol.Type: GrantFiled: October 20, 2016Date of Patent: October 8, 2019Assignee: NITTA HAAS INCORPORATEDInventors: Noriaki Sugita, Mika Tazuru, Takayuki Matsushita, Shuhei Matsuda
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Patent number: 10297716Abstract: A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.Type: GrantFiled: July 1, 2016Date of Patent: May 21, 2019Assignee: LG INNOTEK CO., LTD.Inventor: Shuhei Matsuda
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Patent number: 10270006Abstract: A light emitting device disclosed in an embodiment includes: a light emitting chip including a light emitting part, including a plurality of semiconductor layers, and a first electrode and a second electrode under the light emitting part; a first support member under the light emitting chip; a second support member under the first support member; a first lead electrode connected to the first electrode and a second lead electrode connected to the second electrode, in the second support member, the first lead electrode being separated from the second lead electrode; a protection chip disposed between the first and second lead electrodes; and a reflective member disposed on a periphery of the light emitting chip, wherein the first support member includes a ceramic material between the second support member and the light emitting chip.Type: GrantFiled: July 1, 2016Date of Patent: April 23, 2019Assignee: LG INNOTEK CO., LTD.Inventor: Shuhei Matsuda
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Publication number: 20180312725Abstract: A polishing composition capable of suppressing surface defects and reducing haze is provided. The polishing composition includes: abrasives; at least one water-soluble polymer selected from vinyl alcohol-based resins having a 1,2-diol structural unit; a polyalcohol; and an alkali compound. Preferably, the polishing composition further includes a non-ionic surfactant.Type: ApplicationFiled: October 21, 2016Publication date: November 1, 2018Inventors: Noriaki SUGITA, Shuhei MATSUDA, Takayuki MATSUSHITA, Mika TAZURU
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Publication number: 20180305580Abstract: A polishing composition that can suppress surface defects and reduce haze is provided. A polishing composition includes: abrasives; at least one water-soluble polymer selected from vinyl alcohol-based resins having a 1,2-diol structural unit; and an alkali compound, where an average particle size of particles in the polishing composition measured by dynamic light scattering is not more than 55 nm. Preferably, the polishing composition further includes a non-ionic surfactant. Preferably, the polishing composition further includes a polyalcohol.Type: ApplicationFiled: October 20, 2016Publication date: October 25, 2018Applicant: NITTA HAAS INCORPORATEDInventors: Noriaki SUGITA, Mika TAZURU, Takayuki MATSUSHITA, Shuhei MATSUDA
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Publication number: 20180190869Abstract: A light emitting device disclosed in an embodiment includes: a light emitting chip including a plurality of semiconductor layers and first and second electrodes under the plurality of semiconductor layers; a first lead frame disposed under a first electrode of the light emitting chip; a second lead frame disposed under a second electrode of the light emitting chip; a protective chip disposed between the first and second lead frames and electrically connected to the first and second electrodes; and a reflective member disposed on a periphery of the light emitting chip and the first and second lead frames.Type: ApplicationFiled: July 1, 2016Publication date: July 5, 2018Inventor: Shuhei MATSUDA
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Publication number: 20180190868Abstract: A light emitting device disclosed in an embodiment includes: a light emitting chip including a light emitting part, including a plurality of semiconductor layers, and a first electrode and a second electrode under the light emitting part; a first support member under the light emitting chip; a second support member under the first support member; a first lead electrode connected to the first electrode and a second lead electrode connected to the second electrode, in the second support member, the first lead electrode being separated from the second lead electrode; a protection chip disposed between the first and second lead electrodes; and a reflective member disposed on a periphery of the light emitting chip, wherein the first support member includes a ceramic material between the second support member and the light emitting chip.Type: ApplicationFiled: July 1, 2016Publication date: July 5, 2018Inventor: Shuhei MATSUDA
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Patent number: 9893246Abstract: A lighting may include a substrate, a light emitting device disposed on the substrate, a wavelength conversion layer which is disposed on the light emitting device and converts a part of first light emitted from the light emitting device into second light having a wavelength different from that of the first light, and a resin which is disposed on the substrate and buries the light emitting device and at least a portion of the wavelength conversion layer. An area of the top surface of the wavelength conversion layer is greater than that of the bottom surface of the wavelength conversion layer. The side surface of the wavelength conversion layer is inclined at a predetermined angle with respect to the top surface or the bottom surface.Type: GrantFiled: May 11, 2015Date of Patent: February 13, 2018Assignee: LG INNOTEK CO., LTD.Inventors: Shuhei Matsuda, Tomohiro Sampei
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Publication number: 20170044688Abstract: A manufacturing method of this invention includes: a step of slicing a silicon single crystal containing boron as an acceptor and obtaining a non-heat-treated silicon wafer, a step of determining a boron concentration with respect to the non-heat-treated silicon wafer, and a step of determining an oxygen donor concentration with respect to the non-heat-treated silicon wafer, in which a determination as to whether or not to perform a heat treatment at a temperature of 300° C. or more on the non-heat-treated silicon wafer is made based on a boron concentration determined in the step of determining a boron concentration, and an oxygen donor concentration determined in the step of determining an oxygen donor concentration. By this means, a wafer in which unevenly distributed LPDs that are present on the wafer are reduced is obtained.Type: ApplicationFiled: April 10, 2015Publication date: February 16, 2017Applicant: SUMCO CORPORATIONInventors: Satoshi KUDO, Kouzou NAKAMURA, Toshiyuki MURANAKA, Shuhei MATSUDA, Tegi KIM, Keiichiro HIRAKI
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Patent number: 8998457Abstract: A self-ballasted lamp includes: a base body; a light-emitting module and a globe which are provided at one end side of the base body; a cap provided at the other end side of the base body; and a lighting circuit housed between the base body and the cap. The light-emitting module has light-emitting portions each using a semiconductor light-emitting element, and a support portion projected at one end side of the base body, and the light-emitting portions are disposed at least on a circumferential surface of the support portion. A light-transmissive member is interposed between the light-emitting module and an inner face of the globe.Type: GrantFiled: January 31, 2014Date of Patent: April 7, 2015Assignee: Toshiba Lighting & Technology CorporationInventors: Makoto Sakai, Masao Segawa, Nobuo Shibano, Kiyoshi Nishimura, Kozo Ogawa, Masahiko Kamata, Toshiya Tanaka, Miho Watanabe, Shuhei Matsuda
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Patent number: 8877643Abstract: This invention is to provide a method of polishing a silicon wafer wherein a high flatness can be attained likewise the conventional polishing method and further the occurrence of defects due to the remaining of substances included in the polishing solution on the surface of the wafer can be suppressed as well as a polished silicon wafer. The method of polishing a silicon wafer by supplying a polishing solution containing abrasive grains onto a surface of a polishing pad and then relatively sliding the polishing pad to a silicon wafer to polish the surface of the silicon wafer, is characterized in that the number of abrasive grains included in the polishing solution is controlled to not more than 5×1013 grains/cm3.Type: GrantFiled: May 28, 2010Date of Patent: November 4, 2014Assignee: Sumco CorporationInventors: Shuhei Matsuda, Tetsuro Iwashita, Ryuichi Tanimoto, Takeru Takushima, Takeo Katoh
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Patent number: 8872198Abstract: According to one embodiment, the light-emitting apparatus is provided with a substrate, a plurality of light-emitting devices, and a phosphor layer. The plurality of light-emitting devices are mounted on the substrate. The phosphor layer is formed of a translucent resin containing a phosphor and includes a phosphor portion that is formed in a convex shape and covers a predetermined number of the light-emitting device. Bases of the adjacent phosphor portions are formed by being linked with one another.Type: GrantFiled: April 20, 2011Date of Patent: October 28, 2014Assignee: Toshiba Lighting & Technology CorporationInventors: Soichi Shibusawa, Kiyoshi Nishimura, Kozo Ogawa, Nobuhiko Betsuda, Shuhei Matsuda, Masatoshi Kumagai