Patents by Inventor Shuichi Takayama

Shuichi Takayama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8019971
    Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
    Type: Grant
    Filed: April 6, 2009
    Date of Patent: September 13, 2011
    Assignee: Panasonic Corporation
    Inventors: Shuichi Takayama, Nobuo Higaki
  • Publication number: 20110205443
    Abstract: A broadcast receiving apparatus in the present invention includes: a first audio data characteristics extracting unit extracting a first soundless period and first interval information from first audio data included in the first service; a second audio data characteristics extracting unit extracting a second soundless period and second interval information from second audio data included in the second service; a simulcast determining unit determining whether or not the broadcast waves are simulcast by comparing the first interval information with the second interval information; and a broadcasting switching control unit switching between (i) the output of the audio data and the video data included in the first service and (ii) the output of the audio data and the video data included in the second service based on a result of the determination by the simulcast determining unit.
    Type: Application
    Filed: May 3, 2011
    Publication date: August 25, 2011
    Applicant: PANASONIC CORPORATION
    Inventors: Hiroki Kawai, Keiichi Kuroda, Shuichi Takayama
  • Publication number: 20110183868
    Abstract: The present invention relates to solution microarrays. In particular, the present invention relates to an aqueous 2-phase system for solution microarrays and uses thereof. Additional embodiments are described herein.
    Type: Application
    Filed: August 4, 2009
    Publication date: July 28, 2011
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Shuichi Takayama, Hossein Tavana, Andreja Jovic, Bobak Mosadegh
  • Publication number: 20110054552
    Abstract: The purpose is to provide an electrode layout method of a heart treatment apparatus, which is capable of improving the heart treatment efficiency by setting electrodes in the heart as well as reducing the invasion into the patient so as to effectively stimulate a site which needs to be stimulated. There is provided an electrode layout method of a heart treatment apparatus comprising: inserting at least two lines of leads which are provided to the heart treatment apparatus and which have electrodes on their distal ends, into a vein communicated to the interior of a right atrium and extending along a cardiac wall; and placing the electrodes provided on the respective leads in the vein located at approximately opposite positions across a heart.
    Type: Application
    Filed: August 31, 2009
    Publication date: March 3, 2011
    Applicant: OLYMPUS CORPORATION
    Inventors: Shuichi Takayama, Toshiki Terayama, Hiroki Hibino
  • Publication number: 20100323447
    Abstract: Microfluidic devices for cell culturing and methods for using the same are disclosed. One device includes a substrate and membrane. The substrate includes a reservoir in fluid communication with a passage. A bio-compatible fluid may be added to the reservoir and passage. The reservoir is configured to receive and retain at least a portion of a cell mass. The membrane acts as a barrier to evaporation of the bio-compatible fluid from the passage. A cover fluid may be added to cover the bio-compatible fluid to prevent evaporation of the bio-compatible fluid.
    Type: Application
    Filed: August 11, 2010
    Publication date: December 23, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Shuichi Takayama, Lourdes Marcella Cabrera, Nobuyuki Futai, Yun Seok Heo, Gary Daniel Smith, Xiaoyue Zhu
  • Publication number: 20100323439
    Abstract: Microfluidic devices for cell culturing and methods for using the same are disclosed. One device includes a substrate and membrane. The substrate includes a reservoir in fluid communication with a passage. A bio-compatible fluid may be added to the reservoir and passage. The reservoir is configured to receive and retain at least a portion of a cell mass. The membrane acts as a barrier to evaporation of the bio-compatible fluid from the passage. A cover fluid may be added to cover the bio-compatible fluid to prevent evaporation of the bio-compatible fluid.
    Type: Application
    Filed: August 11, 2010
    Publication date: December 23, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Shuichi Takayama, Lourdes Marcella Cabrera, Yun Seok Heo, Gary Daniel Smith
  • Patent number: 7823142
    Abstract: When a branch instruction is decoded by the instruction decoders 409a˜409c, the upper 29 bits of the PC relative value included in the branch instruction are sent to the upper PC calculator 411 and the lower 3 bits are sent to the lower PC calculator 405. The lower PC calculator 405 adds the lower 3 bits of the PC relative value and the lower 3 bits of the present lower PC 404 and sends the result to the lower PC 404 as the updated lower PC. The upper PC calculator 411 adds the upper 29 bits of the PC relative value, the upper 29 bits of the present upper PC 403, and a carry that may be received from the lower PC calculator 405, and sends the result to the upper PC 403 as the updated upper PC.
    Type: Grant
    Filed: October 7, 2005
    Date of Patent: October 26, 2010
    Assignee: Panasonic Corporation
    Inventors: Shuichi Takayama, Hajime Ogawa, Kenichi Kawaguchi, Nobuo Higaki, Kensuke Odani, Tetsuya Tanaka, Shinya Miyaji, Taketo Heishi
  • Publication number: 20100247384
    Abstract: Microfluidic devices for cell culturing and methods for using the same are disclosed. One device includes a substrate and membrane. The substrate includes a reservoir in fluid communication with a passage. A bio-compatible fluid may be added to the reservoir and passage. The reservoir is configured to receive and retain at least a portion of a cell mass. The membrane acts as a barrier to evaporation of the bio-compatible fluid from the passage. A cover fluid may be added to cover the bio-compatible fluid to prevent evaporation of the bio-compatible fluid.
    Type: Application
    Filed: October 17, 2006
    Publication date: September 30, 2010
    Inventors: Shuichi Takayama, Lourdes Marcella Cabrera, Nobuyuki Futai, Yun Seok Heo, Gary Daniel Smith, Xiaoyue Zhu
  • Publication number: 20100233799
    Abstract: Microfluidic devices having active features such as valves, peristaltic pumps, and mixing portions are fabricated to have a thin elastomeric membrane over the active features. The active features are activated by a tactile actuator external to the membrane, for example, a commercial Braille display. The display may be computer controlled, for example by simple text editor software, to activate individual Braille protrusions or a plurality of protrusions to actuate the active portions of the microfluidic device. Integral devices can incorporate the tactile actuators in a single device, but still external to the membrane.
    Type: Application
    Filed: May 20, 2010
    Publication date: September 16, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Shuichi Takayama, Xiaoyue Zhu, Wei Gu, Gary Daniel Smith, Yunseok Heo, Brenda S. Cho, Nobuyuki Futai
  • Patent number: 7761692
    Abstract: In order to overcome the problem that conditionally executed instructions are executed as no-operation instructions if their condition is not fulfilled, leading to poor utilization efficiency of the hardware and lowering the effective performance, the processor decodes a number of instructions that is greater than the number of provided computing units and judges their execution conditions with an instruction issue control portion before the execution stage, Instructions for which the condition is false are invalidated, and subsequent valid instructions are assigned so that the computing units (hardware) is used efficiently. A compiler performs scheduling such that the number of instructions whose execution condition is true does not exceed the upper limit of the degree of parallelism of the hardware. The number of instructions arranged in parallel at each cycle may exceed the degree of parallelism of the hardware.
    Type: Grant
    Filed: June 14, 2006
    Date of Patent: July 20, 2010
    Assignee: Panasonic Corporation
    Inventors: Taketo Heishi, Shuichi Takayama, Tetsuya Tanaka, Hajime Ogawa, Nobuo Higaki
  • Publication number: 20100175056
    Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.
    Type: Application
    Filed: February 16, 2010
    Publication date: July 8, 2010
    Inventors: Hajime OGAWA, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
  • Publication number: 20100169614
    Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
    Type: Application
    Filed: February 12, 2010
    Publication date: July 1, 2010
    Applicant: Panasonic Corporation
    Inventors: Shuichi TAKAYAMA, Nobuo Higaki
  • Patent number: 7745211
    Abstract: Microfluidic devices having active features such as valves, peristaltic pumps, and mixing portions are fabricated to have a thin elastomeric membrane over the active features. The active features are activated by a tactile actuator external to the membrane, for example, a commercial Braille display. The display may be computer controlled, for example by simple text editor software, to activate individual Braille protrusions or a plurality of protrusions to actuate the active portions of the microfluidic device. Integral devices can incorporate the tactile actuators in a single device, but still external to the membrane.
    Type: Grant
    Filed: March 10, 2004
    Date of Patent: June 29, 2010
    Assignee: The Regents of the University of Michigan
    Inventors: Shuichi Takayama, Xiaoyue Zhu, Wei Gu, Gary Daniel Smith, Yunseok Heo, Brenda S. Cho, Nobuyuki Futai
  • Publication number: 20100159462
    Abstract: The invention relates to tunable elastomeric nanochannels for nanofluidic manipulation. In particular, the present invention relates to nanochannels for performing biological assays.
    Type: Application
    Filed: April 23, 2008
    Publication date: June 24, 2010
    Applicant: THE REGENTS OF THE UNIVERSITY OF MICHIGAN
    Inventors: Shuichi Takayama, Michael Thouless, Dongeun Huh, Kristen L. Mills, Nicholas Joseph Douville
  • Patent number: 7704728
    Abstract: A microfluidic system employs a microchannel and a gravity driven pump comprising horizontally oriented fluid supply reservoirs which supplies fluid to the microchannel at a substantially constant rate. The device is useful for numerous microfluidic applications, for example in the culture and/or treatment of biological systems under constant flow-induced stress, cell-size sorting, motile sperm sorting, or embryo culture.
    Type: Grant
    Filed: July 18, 2002
    Date of Patent: April 27, 2010
    Assignee: The University of Michigan
    Inventors: Shuichi Takayama, Joseph Chang, Dongeun Huh, Xiaoyue Zhu, Brenda Cho, Gary D. Smith
  • Patent number: 7698696
    Abstract: A compiler comprises an analysis unit that detects directives (options and pragmas) from a user to the compiler, an optimization unit that is made up of a processing unit (a global region allocation unit, a software pipelining unit, a loop unrolling unit, a “if” conversion unit, and a pair instruction generation unit) that performs individual optimization processing designated by options and pragmas from a user, following the directives and the like from the analysis unit, etc. The global region allocation unit performs optimization processing, following designation of the maximum data size of variables to be allocated to a global region, designation of variables to be allocated to the global region, and options and pragmas regarding designation of variables not to be allocated in the global region.
    Type: Grant
    Filed: June 30, 2003
    Date of Patent: April 13, 2010
    Assignee: Panasonic Corporation
    Inventors: Hajime Ogawa, Taketo Heishi, Toshiyuki Sakata, Shuichi Takayama, Shohei Michimoto, Tomoo Hamada, Ryoko Miyachi
  • Publication number: 20090193226
    Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
    Type: Application
    Filed: April 6, 2009
    Publication date: July 30, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Shuichi TAKAYAMA, Nobuo Higaki
  • Publication number: 20090141182
    Abstract: The digital broadcast receiving apparatus according to the present invention includes: a first decoding unit which decodes video data of a first digital broadcast and outputs first video data that is decoded; a second decoding unit which decodes video data of a second digital broadcast and outputs second video data that is decoded; and a selection unit which selects one of the first video data and the second video data, and the first decoding unit outputs the first video data synchronous with a referential clock when the first video data is selected by the selection unit, and the first decoding unit outputs the first video data with timing delayed or accelerated by as much as an offset value with respect to timing of predetermined periodicity when the first video data is not selected by the selection unit.
    Type: Application
    Filed: November 14, 2008
    Publication date: June 4, 2009
    Applicant: PANASONIC CORPORATION
    Inventors: Takanori MIYASHITA, Shuichi TAKAYAMA, Hiroki TATSUMOTO
  • Patent number: 7533243
    Abstract: A 32-bit instruction 50 is composed of a 4-bit format field 51, a 4-bit operation field 52, and two 12-bit operation fields 59 and 60. The 4-bit operation field 52 can only include (1) an operation code “cc” that indicates a branch operation which uses a stored value of the implicitly indicated constant register 36 as the branch address, or (2) a constant “const”. The content of the 4-bit operation field 52 is specified by a format code provided in the format field 51.
    Type: Grant
    Filed: May 22, 2002
    Date of Patent: May 12, 2009
    Assignee: Panasonic Corporation
    Inventors: Shuichi Takayama, Nobuo Higaki
  • Patent number: RE41751
    Abstract: A processor can decode short instructions with a word length equal to one unit field and long instructions with a word length equal to two unit fields. An opcode of each kind of instruction is arranged into the first unit field assigned to the instruction. The number of instructions to be executed by the processor in parallel is s. When the ratio of short to long instructions is s-1:1, the s-1 short instructions are assigned to the first unit field to the s-1tA unit field in the parallel execution code, and the long instruction is assigned to the sth unit field to the (s+k?1)th unit field in the same parallel execution code.
    Type: Grant
    Filed: November 24, 2003
    Date of Patent: September 21, 2010
    Assignee: Panasonic Corporation
    Inventors: Taketo Heishi, Tetsuya Tanaka, Nobuo Higaki, Shuichi Takayama, Kensuke Odani