Patents by Inventor Shuichiro Yasuda

Shuichiro Yasuda has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 8816313
    Abstract: Provided are a memory element and a memory device. A memory layer is provided with an ion source layer. The ion source layer includes Zr (zirconium), Cu (copper), and Al (aluminum) as a metal element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogen element). The amount of Al in the ion source layer is 30 to 50 atomic percent. The amount of Zr is preferably 7.5 to 25 atomic percent, and more preferably, the composition ratio of Zr to the chalcogen element in total included in the ion source layer (=Zr (atomic percent)/chalcogen element in total (atomic percent)) falls within a range from 0.2 to 0.74.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: August 26, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda
  • Patent number: 8796657
    Abstract: There are provided a memory element and a memory device with improved repetition characteristics during operations at a low voltage and current. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer disposed on the first electrode side, and an ion source layer disposed on the second electrode side, and having a resistivity of 2.8 m?cm or higher but lower than 1 ?cm.
    Type: Grant
    Filed: February 10, 2012
    Date of Patent: August 5, 2014
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Tetsuya Mizuguchi, Masayuki Shimuta, Katsuhisa Aratani, Kazuhiro Ohba
  • Publication number: 20140191182
    Abstract: Some embodiments include a method of forming a memory cell. A first portion of a switching region is formed over a first electrode. A second portion of the switching region is formed over the first portion using atomic layer deposition. The second portion is a different composition than the first portion. An ion source region is formed over the switching region. A second electrode is formed over the ion source region. Some embodiments include a memory cell having a switching region between a pair of electrodes. The switching region is configured to be reversibly transitioned between a low resistive state and a high resistive state. The switching region includes two or more discrete portions, with one of the portions not having a non-oxygen component in common with any composition directly against it in the high resistive state.
    Type: Application
    Filed: January 10, 2013
    Publication date: July 10, 2014
    Applicant: Micron Technology, Inc.
    Inventors: Shuichiro Yasuda, Noel Rocklein, Scott E. Sills, D.V. Nirmal Ramaswamy, Qian Tao
  • Publication number: 20140183438
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 7, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Publication number: 20140183437
    Abstract: A memory element with a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, an ion source layer provided on the second electrode side, an intermediate layer provided between the resistance change layer and the ion source layer, and a barrier layer provided at least either between the ion source layer and the intermediate layer, or between the intermediate layer and the resistance change layer.
    Type: Application
    Filed: March 4, 2014
    Publication date: July 3, 2014
    Applicant: Sony Corporation
    Inventors: Kazuhiro Ohba, Takeyuki Sone, Masayuki Shimuta, Shuichiro Yasuda
  • Patent number: 8730709
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Grant
    Filed: March 18, 2013
    Date of Patent: May 20, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Shuichiro Yasuda, Tetsuya Mizuguchi, Katsuhisa Aratani, Masayuki Shimuta, Akira Kouchiyama, Mayumi Ogasawara
  • Patent number: 8710482
    Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode in this order, wherein the memory layer includes a high resistance layer which includes tellurium (Te) as the chief component among anion components and is formed on the first electrode side; and an ion source layer which includes at least one kind of metal element and at least one kind of chalcogen element among tellurium (Te), sulfur (S) and selenium (Se) and is formed on the second electrode side.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: April 29, 2014
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Kazuhiro Ohba, Hiroaki Sei
  • Patent number: 8699260
    Abstract: There are provided a memory element and a memory device with improved writing and erasing characteristics during operations at a low voltage and a low current. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, an ion source layer provided on the second electrode side, an intermediate layer provided between the resistance change layer and the ion source layer, and a barrier layer provided at least either between the ion source layer and the intermediate layer, or between the intermediate layer and the resistance change layer, and the barrier layer containing a transition metal or a nitride thereof.
    Type: Grant
    Filed: March 9, 2012
    Date of Patent: April 15, 2014
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Takeyuki Sone, Masayuki Shimuta, Shuichiro Yasuda
  • Patent number: 8687404
    Abstract: A memory element capable of increasing capacity with an improvement of distribution of resistance in the high-resistance state, a drive method therefor, and a memory device are provided. The memory element includes first and second electrodes, and a plurality of resistance change elements electrically connected in series between the first and second electrodes, whose resistance values are reversibly changeable in response to application of a voltage to the first and second electrodes, and changeable to the same resistance state relative to the voltage application.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: April 1, 2014
    Assignee: Sony Corporation
    Inventors: Masayuki Shimuta, Jun Sumino, Shuichiro Yasuda
  • Publication number: 20140084235
    Abstract: A memory component having a first electrode; a second electrode; and a memory layer between the first and second electrodes. The memory layer includes (a) on a first electrode side thereof, a high resistance layer that is composed of a plurality of layers, at least one of the plurality of layers including tellurium (Te) as the chief component among anion components, and (b) on a second electrode side thereof, an ion source layer with at least one kind of metal element and at least one kind of chalcogen element selected from the group consisting of tellurium (Te), sulfur (S) and selenium (Se). The memory component is configured to change a resistance of the high resistance layer in accordance with a voltage or current pulse stress applied between the first and second electrodes.
    Type: Application
    Filed: November 26, 2013
    Publication date: March 27, 2014
    Applicant: Sony Corporation
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Kazuhiro Ohba, Hiroaki Sei
  • Patent number: 8674335
    Abstract: A memory component includes: a first electrode; a memory layer; and a second electrode in this order, wherein the memory layer includes a high resistance layer which includes tellurium (Te) as the chief component among anion components and is formed on the first electrode side; and an ion source layer which includes at least one kind of metal element and at least one kind of chalcogen element among tellurium (Te), sulfur (S) and selenium (Se) and is formed on the second electrode side.
    Type: Grant
    Filed: January 12, 2011
    Date of Patent: March 18, 2014
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Katsuhisa Aratani, Kazuhiro Ohba, Hiroaki Sei
  • Publication number: 20140021434
    Abstract: A memory element and a memory device, the memory element including a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer.
    Type: Application
    Filed: September 16, 2013
    Publication date: January 23, 2014
    Applicant: SONY CORPORATION
    Inventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
  • Publication number: 20140008600
    Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al ?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.
    Type: Application
    Filed: September 9, 2013
    Publication date: January 9, 2014
    Applicant: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
  • Patent number: 8618527
    Abstract: There are provided a memory element and a memory device with a smaller range of element-to-element variation of electrical characteristics. The memory element includes a first electrode, a memory layer, and a second layer in this order. The memory layer includes a resistance change layer including a plurality of layers varying in diffusion coefficient of mobile atoms, and an ion source layer disposed between the resistance change layer and the second electrode.
    Type: Grant
    Filed: September 8, 2011
    Date of Patent: December 31, 2013
    Assignee: Sony Corporation
    Inventors: Shinnosuke Hattori, Toshiyuki Kunikiyo, Mitsunori Nakamoto, Shuichiro Yasuda
  • Publication number: 20130299765
    Abstract: A resistive-change memory element-containing memory device including: a first memory element that includes a first resistive-change layer and a first electrode connected to the first resistive-change layer; and a second memory element that includes a second resistive-change layer and a second electrode connected to the second resistive-change layer, wherein at least one of the thickness and the material of the second resistive-change layer and the area of the second electrode in contact with the second resistive-change layer is different from the corresponding one of the thickness and the material of the first resistive-change layer and the area of the first electrode in contact with the first resistive-change layer.
    Type: Application
    Filed: June 3, 2013
    Publication date: November 14, 2013
    Applicant: Sony Corporation
    Inventors: Jun Sumino, Shuichiro Yasuda
  • Patent number: 8569732
    Abstract: A memory device of a resistance variation type, in which data retaining characteristic at the time of writing is improved, is provided. The memory device includes: a plurality of memory elements in which a memory layer is provided between a first electrode and a second electrode so that data is written or erased in accordance with a variation in electrical characteristics of the memory layer; and pulse applying means applying a voltage pulse or a current pulse selectively to the plurality of memory elements. The memory layer includes an ion source layer including an ionic-conduction material and at least one kind of metallic element, and the ion source layer further contains oxygen.
    Type: Grant
    Filed: November 23, 2011
    Date of Patent: October 29, 2013
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Tomohito Tsushima, Satoshi Sasaki, Katsuhisa Aratani
  • Patent number: 8546782
    Abstract: A memory element and a memory device with improved controllability over resistance change by applied voltage are provided. The memory element includes a first electrode, a memory layer, and a second electrode in this order. The memory layer includes a resistance change layer provided on the first electrode side, and an ion source layer provided on the second electrode side and is higher in resistance value than the resistance change layer. A resistance value of the resistance change layer is changeable in response to a composition change by applied voltage to the first and second electrodes.
    Type: Grant
    Filed: June 21, 2011
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Shuichiro Yasuda, Hiroaki Sei, Akira Kouchiyama, Masayuki Shimuta, Naomi Yamada
  • Patent number: 8547735
    Abstract: A memory element capable of simultaneously satisfying the number of repeating operation times and a low-voltage operation characteristic which are in a tradeoff relation is provided. The memory element has a high-resistivity layer and an ion source layer between a bottom electrode and a top electrode. The high-resistivity layer is made of an oxide containing Te. Any of elements other than Te such as Al, Zr, Ta, Hf, Si, Ge, Ni, Co, Cu, and Au may be added. In the case of adding Al to Te and also adding Cu and Zr, the composition ratio of the high-resistivity layer is preferably adjusted in the ranges of 30?Te?100 atomic %, 0?Al?70 atomic %, and 0?Cu+Zr?36 atomic % except for oxygen. The ion source layer is made of at least one kind of metal elements and at least one kind of chalcogen elements of Te, S, and Se.
    Type: Grant
    Filed: August 28, 2009
    Date of Patent: October 1, 2013
    Assignee: Sony Corporation
    Inventors: Tetsuya Mizuguchi, Shuichiro Yasuda, Satoshi Sasaki, Naomi Yamada
  • Publication number: 20130240818
    Abstract: A memory component including first and second electrodes with a memory layer therebetween, the memory layer having first and second memory layers, the first memory layer containing aluminum and a chalcogen element of tellurium, the second memory layer between the first memory layer and the first electrode and containing an aluminum oxide and at least one of a transition metal oxide and a transition metal oxynitride having a lower resistance than the aluminum oxide.
    Type: Application
    Filed: March 18, 2013
    Publication date: September 19, 2013
    Applicant: SONY CORPORATION
    Inventors: KAZUHIRO OHBA, SHUICHIRO YASUDA, TETSUYA MIZUGUCHI, KATSUHISA ARATANI, MASAYUKI SHIMUTA, AKIRA KOUCHIYAMA, MAYUMI OGASAWARA
  • Patent number: 8492740
    Abstract: The capability of retaining a resistance value of a stored state and an erased state is improved in a resistance variation-type memory device. A memory layer 5 including a high-resistance layer 2 and an ion source layer 3 is provided between a lower electrode 1 and an upper electrode 4. The ion source layer 3 contains Al (aluminum) as an additive element together with an ion conductive material such as S (sulfur), Se (selenium), and Te (tellurium) (chalcogenide element) and a metal element to be ionized such as Zr (zirconium). Since Al is included in the ion source layer 3, the high-resistance layer which includes Al (Al oxide) is formed on an anode in erasing operation. Thus, a retaining property in a high-resistance state improves, and at the same time, an operating speed is improved.
    Type: Grant
    Filed: July 31, 2008
    Date of Patent: July 23, 2013
    Assignee: Sony Corporation
    Inventors: Kazuhiro Ohba, Tetsuya Mizuguchi, Shuichiro Yasuda