Patents by Inventor Shuji Eguchi

Shuji Eguchi has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6888230
    Abstract: Semiconductor devices, semiconductor wafers, and semiconductor modules are provided, wherein: the semiconductor device has a small warp; damage at the chip edge and cracks occurring in a dropping test are scarcely generated; and the semiconductor device is superior in mounting reliability and mass producibility. The semiconductor includes a semiconductor chip 64; a porous stress relaxing layer 3 provided on the plane, whereon circuits and electrodes are formed, of the semiconductor chip; a circuit layer 2 provided on the stress relaxing layer and connected to the electrodes; and external terminals 10 provided on the circuit layer; wherein an organic protecting film 7 is formed on the plane, opposite to the stress relaxing layer, of the semiconductor chip, and respective side planes of the stress relaxing layer, the semiconductor chip 6, and the protecting film 7 are exposed outside on the same plane.
    Type: Grant
    Filed: October 28, 1999
    Date of Patent: May 3, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Masahiko Ogino, Takumi Ueno, Shuji Eguchi, Akira Nagai, Toshiya Satoh, Toshiaki Ishii, Hiroyoshi Kokaku, Tadanori Segawa, Nobutake Tsuyuno, Asao Nishimura, Ichiro Anjoh
  • Publication number: 20050069277
    Abstract: An antenna unit for sending out electromagnetic waves of a millimetric-wave band to outside and receiving the wave reflected from a target, and circuits for signal-processing the reflected wave are equipped as a vehicular millimetric-wave radar device. Antenna patterns are formed on a surface of a multilayer base plate formed of plural stacked layers of dielectric plates and an electroconductive layer interposed between each layer. Circuit wiring patterns and electronic components for signal processing of millimetric waves are disposed on the reverse side. Among all the above-mentioned electronic components, only a millimetric-wave signal oscillator, amplifier, and frequency converter are haused in a hermetically sealed section formed in a localized space on a face of the multilayer base plate. The other electronic components are arranged in a non-hermetically structured condition on a periphery of the hermetically sealed section.
    Type: Application
    Filed: November 9, 2001
    Publication date: March 31, 2005
    Inventors: Terumi Nakazawa, Kenji Tabuchi, Shuji Eguchi, Tsuyoshi Fujita, Hidetaka Shigi
  • Patent number: 6861294
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: March 1, 2005
    Assignee: Renesas Technology Corp.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Publication number: 20040251540
    Abstract: In a multi chip module of a structure wherein a plurality of bare or packaged semiconductor chips are mounted on a single wiring board and upper surfaces of the semiconductor chips are covered with a single heat spread plate, the whole space around the semiconductor chips thus sandwiched between the wiring board and the heat spread plate is filled with resin.
    Type: Application
    Filed: May 7, 2004
    Publication date: December 16, 2004
    Inventors: Shuji Eguchi, Akira Nagai, Haruo Akahoshi, Takumi Ueno, Toshiya Satoh, Masahiko Ogino, Asao Nishimura, Ichiro Anjo, Hideki Tanaka
  • Publication number: 20040224149
    Abstract: The object of the present invention is provide a semiconductor device in semiconductor package configuration, characterized by excellent connection reliability ensured by incorporating a buffer for absorbing differences in thermal expansion rate between a mounting substrate and a semiconductor element even when an organic material is used for a mounting substrate.
    Type: Application
    Filed: December 1, 2003
    Publication date: November 11, 2004
    Inventors: Akira Nagai, Shuji Eguchi, Masahiko Ogino, Masanori Segawa, Toshiak Ishii, Nobutake Tsuyuno, Hiroyoshi Kokaku, Rie Hattori, Makoto Morishima, Ichiro Anjoh, Kunihiro Tsubosaki, Chuichi Miyazaki, Makoto Kitano, Mamoru Mita, Norio Okabe
  • Publication number: 20040217453
    Abstract: Semiconductor devices,-semiconductor wafers, and semiconductor modules are provided: wherein the semiconductor device has a small warp; damages at chip edge and cracks in a dropping test are scarcely generated; and the semiconductor device is superior in mounting reliability and mass producibility.
    Type: Application
    Filed: June 7, 2004
    Publication date: November 4, 2004
    Inventors: Masahiko Ogino, Takumi Ueno, Shuji Eguchi, Akira Nagai, Toshiya Satoh, Toshiaki Ishii, Hiroyoshi Kokaku, Tadanori Segawa, Nobutake Tsuyuno, Asao Nishimura, Ichiro Anjoh
  • Publication number: 20040195702
    Abstract: In a semiconductor device having a three-layered buffer layer comprising core layer 1 having interconnected foams such as a three-dimensional reticular structure and adhesive layers 2 provided on both sides of the core layer as a stress buffer layer between semiconductor chip 5 and wiring 4 to lessen a thermal stress generated between the semiconductor device and the package substrate, where a thickness ratio of the core layer 1 to total buffer layer is at least 0.2, the production process can be simplified by using such a buffer layer, thereby improving the mass production capacity and enhancing the package reliability.
    Type: Application
    Filed: April 23, 2004
    Publication date: October 7, 2004
    Inventors: Masahiko Ogino, Shuji Eguchi, Akira Nagai, Takumi Ueno, Masanori Segawa, Hiroyoshi Kokaku, Toshiaki Ishii, Ichiro Anjoh, Asao Nishimura, Chuichi Miyazaki, Mamoru Mita, Norio Okabe
  • Patent number: 6791194
    Abstract: A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200-250° C.).
    Type: Grant
    Filed: January 28, 2000
    Date of Patent: September 14, 2004
    Assignees: Hitachi, Ltd., Hitachi Cable, Ltd.
    Inventors: Akira Nagai, Shuji Eguchi, Masahiko Ogino, Masanori Segawa, Toshiak Ishii, Nobutake Tsuyuno, Hiroyoshi Kokaku, Rie Hattori, Makoto Morishima, Ichiro Anjoh, Kunihiro Tsubosaki, Chuichi Miyazaki, Makoto Kitano, Mamoru Mita, Norio Okabe
  • Patent number: 6784541
    Abstract: In a multi-chip module, a plurality of semiconductor chips are mounted on a single wiring board. Upper surfaces of the chips are covered with a single heat spread plate, and the whole space around the chips sandwiched between the wiring board and the heat spread plate is filled with resin. The semiconductor chips are interconnected through the resin so that any stress exerted on any chips is dispersed. This diminishes the occurrence of cracks caused by stress concentration. Since the chips and the heat spread plate are bonded together with resin, even if there are variations in size of the chips, both can be bonded easily. Further, the bonding of all the chips and the heat spread plate can be done in a single process.
    Type: Grant
    Filed: November 25, 2002
    Date of Patent: August 31, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Eguchi, Akira Nagai, Haruo Akahoshi, Takumi Ueno, Toshiya Satoh, Masahiko Ogino, Asao Nishimura, Ichiro Anjo, Hideki Tanaka
  • Publication number: 20040125582
    Abstract: A device for controlling a vehicle 8 comprising a housing 3, a rectangular printed circuit board 4 which is fixed to the inside of the housing and has a control circuit thereon, and plugs 1a and 1b provided along one side of the rectangular printed circuit board 4 to transfer signals between the inside and the outside of said housing 3; wherein the plugs 1a and 1b respectively contain plug pins and the plug pins 2 are electrically connected to the printed circuit board 4 via bonding wires 5 inside the housing 3.
    Type: Application
    Filed: July 29, 2003
    Publication date: July 1, 2004
    Applicants: HITACHI, LTD., HITACHI CAR ENGINEERING CO., LTD.
    Inventors: Masahiko Asano, Yasuo Akutsu, Shuji Eguchi, Kunito Nakatsuru, Kaoru Uchiyama
  • Publication number: 20040063272
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 1, 2004
    Applicant: HITACHI, LTD.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Publication number: 20040061220
    Abstract: A semiconductor device includes a semiconductor chip formed with connection terminals, an elastic structure interposed between a main surface of the chip and a wiring substrate formed with wirings connected at first ends thereof to the connection terminals, and bump electrodes connected to the other ends of the wirings. The connection terminals may be at a center part or in peripheral part(s) of the chip main surface and both the elastic structure and wiring substrate are not provided at locations of connection terminals. A resin body seals at least the connection terminals and the exposed first ends of wirings (leads). In a scheme in which the connection terminals are located in a peripheral part of the chip main surface, the wiring substrate protrudes beyond the chip boundary where the connection terminals are arranged, and the resin body shape is restricted by the protruding part of the wiring substrate.
    Type: Application
    Filed: February 28, 2003
    Publication date: April 1, 2004
    Inventors: Chuichi Miyazaki, Yukiharu Akiyama, Masnori Shibamoto, Tomoaki Kudaishi, Ichiro Anjoh, Kunihiko Nishi, Asao Nishimura, Hideki Tanaka, Ryosuke Kimoto, Kunihiro Tsubosaki, Akio Hasebe, Takehiro Ohnishi, Noriou Shimada, Shuji Eguchi, Hiroshi Koyama, Akira Nagai, Masahiko Ogino
  • Patent number: 6686226
    Abstract: A semiconductor plastic package, more particularly a preferred package structure and method for making a BGA package. A resin sealed BGA package where a supporting frame which fixedly supports semiconductor parts; i.e., an IC chip, a circuit board, or a circuit film, is sealed with resin, using a mold, which is composed of an upper mold half and a lower mold half with the lower mold half having a plurality of projections, one at a position corresponding to each of the external terminals. The mold has a divisional structure which has an air vent between the divisional elements thereof.
    Type: Grant
    Filed: May 2, 2000
    Date of Patent: February 3, 2004
    Assignee: Hitachi, Ltd.
    Inventors: Shigeharu Tsunoda, Junichi Saeki, Isamu Yoshida, Kazuya Ooji, Michiharu Honda, Makoto Kitano, Nae Yoneda, Shuji Eguchi, Kunihiko Nishi, Ichiro Anjoh, Kenichi Otsuka
  • Publication number: 20030207557
    Abstract: A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.
    Type: Application
    Filed: October 23, 2001
    Publication date: November 6, 2003
    Inventors: Yukiharu Akiyama, Tomoaki Kudaishi, Takehiro Ohnishi, Noriou Shimada, Shuji Eguchi, Asao Nishimura, Ichiro Anjo, Kunihiro Tsubosaki, Chuichi Miyazaki, Hiroshi Koyama, Masanori Shibamoto, Akira Nagai, Masahiko Ogino
  • Patent number: 6639323
    Abstract: A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: October 28, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Akita ELectronics Co., Ltd.
    Inventors: Yukiharu Akiyama, Tomoaki Kudaishi, Takehiro Ohnishi, Noriou Shimada, Shuji Eguchi, Asao Nishimura, Ichiro Anjo, Kunihiro Tsubosaki, Chuichi Miyazaki, Hiroshi Koyama, Masanori Shibamoto, Akira Nagai, Masahiko Ogino
  • Patent number: 6627997
    Abstract: In a multi-chip module, a plurality of semiconductor chips are mounted on a single wiring board. Upper surfaces of the semiconductor chips are covered with a single heat spread plate, and the whole space around the semiconductor chips, sandwiched between the wiring board and the heat spread plate, is filled with resin. The semiconductor chips are interconnected through the resin so that any stress exerted on any chips is dispersed. This diminishes the occurrence of cracks caused by stress concentration. Since the semiconductor chips and the heat spread plate are bonded together with resin, even if there are variations in size of the chips, both can be bonded easily. Further, the bonding of all the chips and the heat spread plate can be done in a single process.
    Type: Grant
    Filed: January 27, 2000
    Date of Patent: September 30, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Eguchi, Akira Nagai, Haruo Akahoshi, Takumi Ueno, Toshiya Satoh, Masahiko Ogino, Asao Nishimura, Ichiro Anjo, Hideki Tanaka
  • Patent number: 6586105
    Abstract: The invention provides a packaging structure applied to an automotive component having semiconductors and electronic parts mounted on a ceramic base, characterized in that the semiconductors and electronic parts are partly or entirely sealed with a thixotropic silicone gel which has a thixotropy index of about 1.5-3.6 and a penetration depth of about 6-10 mm and a rate of change in viscosity of less than 10% of the initial value.
    Type: Grant
    Filed: April 3, 2001
    Date of Patent: July 1, 2003
    Assignee: Hitachi, Ltd.
    Inventors: Shuji Eguchi, Masahiko Asano, Mutsumi Watanabe, Kunito Nakatsuru, Hiroatsu Tokuda
  • Publication number: 20030071348
    Abstract: In a multi-chip module, a plurality of semiconductor chips are mounted on a single wiring board. Upper surfaces of the chips are covered with a single heat spread plate, and the whole space around the chips sandwiched between the wiring board and the heat spread plate is filled with resin. The semiconductor chips are interconnected through the resin so that any stress exerted on any chips is dispersed. This diminishes the occurrence of cracks caused by stress concentration. Since the chips and the heat spread plate are bonded together with resin, even if there are variations in size of the chips, both can be bonded easily. Further, the bonding of all the chips and the heat spread plate can be done in a single process.
    Type: Application
    Filed: November 25, 2002
    Publication date: April 17, 2003
    Inventors: Shuji Eguchi, Akira Nagai, Haruo Akahoshi, Takumi Ueno, Toshiya Satoh, Masahiko Ogino, Asao Nishimura, Ichiro Anjo, Hideki Tanaka
  • Patent number: 6515371
    Abstract: A semiconductor device including a semiconductor chip having connection terminals in a peripheral part of a main surface thereof; an elastic body disposed on the main surface leaving the connection terminals exposed; an insulating tape formed on the elastic body and having openings in areas where the connection terminals are situated; plural leads formed on the top surface of the insulating tape, one end of each lead being connected to one of the connection terminals and the other end being disposed on the elastic body; plural bump electrodes formed on the other ends of the plural leads; and a resin body for sealing the connection terminals and one end of each of the leads, wherein the insulating tape protrudes beyond the chip where the plural connection terminals are arranged, and wherein the shape of the resin body is restricted by the protruding part of the insulating tape.
    Type: Grant
    Filed: October 23, 2001
    Date of Patent: February 4, 2003
    Assignees: Hitachi, Ltd., Hitachi ULSI Systems Co., Ltd., Akita Electronics Co., Ltd.
    Inventors: Yukiharu Akiyama, Tomoaki Kudaishi, Takehiro Ohnishi, Noriou Shimada, Shuji Eguchi, Asao Nishimura, Ichiro Anjo, Kunihiro Tsubosaki, Chuichi Miyazaki, Hiroshi Koyama, Masanori Shibamoto, Akira Nagai, Masahiko Ogino
  • Publication number: 20020160185
    Abstract: A semiconductor device having a superior connection reliability is obtained by providing a buffer body for absorbing the difference of thermal expansion between the mounting substrate and the semiconductor element in a semiconductor package structure, even if an organic material is used for the mounting substrate. A film material is used as the body for buffering the thermal stress generated by the difference in thermal expansion between the mounting substrate and the semiconductor element. The film material has modulus of elasticity of at least 1 MPa in the reflow temperature range (200-250° C.).
    Type: Application
    Filed: May 6, 2002
    Publication date: October 31, 2002
    Inventors: Akira Nagai, Shuji Eguchi, Masahiko Ogino, Masanori Segawa, Toshiak Ishii, Nobutake Tsuyuno, Hiroyoshi Kokaku, Rie Hattori, Makoto Morishima, Ichiro Anjoh, Kunihiro Tsubosaki, Chuichi Miyazaki, Makoto Kitano, Mamoru Mita, Norio Okabe