Patents by Inventor Shun-ichi Fukuyama

Shun-ichi Fukuyama has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6960833
    Abstract: To provide a semiconductor device having copper wiring layers and organic insulating resin layers with less separation and its manufacture method. A semiconductor device has: a semiconductor substrate formed with a number of semiconductor elements; a first interlayer insulating film formed above the semiconductor substrate and having a first wiring recess; a first copper wiring embedded in the first wiring recess; a second interlayer insulating film having a second wiring recess, the second interlayer insulating film including a copper diffusion preventing layer formed on the first copper wiring and the first interlayer insulating film, an oxide film formed on the copper diffusion preventing layer, and an organic insulating resin layer formed on the oxide film; and a second copper wiring embedded in the second wiring recess.
    Type: Grant
    Filed: January 24, 2003
    Date of Patent: November 1, 2005
    Assignee: Fujitsu Limited
    Inventors: Satoshi Otsuka, Shun-ichi Fukuyama
  • Patent number: 6958525
    Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.
    Type: Grant
    Filed: May 30, 2003
    Date of Patent: October 25, 2005
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shun-ichi Fukuyama, Katsumi Suzuki, Ei Yano, Tamotsu Owada, Iwao Sugiura
  • Patent number: 6949830
    Abstract: A semiconductor device including an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.
    Type: Grant
    Filed: October 29, 2003
    Date of Patent: September 27, 2005
    Assignee: Fujitsu Limited
    Inventors: Tamotsu Owada, Shun-ichi Fukuyama, Hirofumi Watatani, Kengo Inoue, Atsuo Shimizu
  • Patent number: 6943431
    Abstract: A semiconductor element is formed over a surface of a semiconductor substrate. A first insulating film is formed over the surface of the semiconductor substrate, the first insulating film covering the semiconductor element. A second insulating film is formed over the first insulating film, the second insulating film having a dielectric constant lower than that of the first insulating film. A first wiring pattern is formed over the second insulating film. A conductive connection member buried in the second and first insulating films electrically interconnects the first wiring pattern and semiconductor element.
    Type: Grant
    Filed: July 31, 2003
    Date of Patent: September 13, 2005
    Assignee: Fujitsu Limited
    Inventors: Shun-ichi Fukuyama, Tamotsu Owada, Hiroko Inoue, Ken Sugimoto
  • Publication number: 20040155340
    Abstract: A method of manufacturing a semiconductor device includes the steps of: preparing an underlying structure having a silicon carbide layer covering a copper wiring, and growing silicon oxycarbide on the underlying structure by vapor deposition using, as source gas, tetramethylcyclotetrasiloxane, carbon dioxide gas and oxygen gas, a flow rate of said oxygen gas being at most 3% of a flow rate of the carbon dioxide gas. The surface of the silicon carbide layer of the underlying structure may be treated with a plasma of weak oxidizing gas which contains oxygen and has a molecular weight larger than that of O2 to bring the surface more hydrophilic. Film peel-off and cracks in the interlayer insulating layer decrease.
    Type: Application
    Filed: October 29, 2003
    Publication date: August 12, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Tamotsu Owada, Shun-ichi Fukuyama, Hirofumi Watatani, Kengo Inoue, Atsuo Shimizu
  • Patent number: 6737744
    Abstract: On a substrate, a first insulating film, a first interlayer insulating film, a second and third insulating films, and a second interlayer insulating film are formed. Wire trenches are formed reaching the upper surface of the third insulating film, and via holes are formed from the bottom of the wire trench to the upper surface of the first insulating film. Formation of the wire trench is performed by etching the second interlayer insulating film under a condition in which the second interlayer insulating film is selectively etched. The third insulating film exposed at the bottoms of the wire trenches and the first insulating film exposed at the bottoms of the via holes are removed by etching under a condition in which the third insulating film is selectively etched. Wires are filled in the via holes and the wire trenches.
    Type: Grant
    Filed: March 11, 2002
    Date of Patent: May 18, 2004
    Assignee: Fujitsu Limited
    Inventor: Shun-ichi Fukuyama
  • Patent number: 6707156
    Abstract: A semiconductor device has: a semiconductor substrate; a number of semiconductor elements formed on the semiconductor substrate; a plurality of lower level wiring layers electrically connected to the semiconductor elements; a plurality of first insulating layers electrically separating the lower level wiring layers and having a first dielectric constant; a plurality of middle level wiring layers electrically connected to the lower level wiring layers; a plurality of second insulating layers electrically separating the middle level wiring layers and having a second dielectric constant larger than the first dielectric constant; a plurality of upper level wiring layers electrically connected to the middle level wiring layers; a plurality of third insulating layers electrically separating the upper level wiring layers and having a third dielectric constant larger than the second dielectric constant. A multilevel wiring structure is provided which has a high performance and a high reliability.
    Type: Grant
    Filed: January 28, 2003
    Date of Patent: March 16, 2004
    Assignee: Fujitsu Limited
    Inventors: Takashi Suzuki, Satoshi Otsuka, Tsutomu Hosoda, Hirofumi Watatani, Shun-ichi Fukuyama
  • Patent number: 6693046
    Abstract: A method of manufacturing a semiconductor device includes the steps of: (X) forming a first hydrophobic insulating layer above a semiconductor substrate; (Y) hydrophilizing a surface of the first hydrophobic insulating layer; and (Z) forming a low dielectric constant insulating layer having a specific dielectric constant lower than the specific dielectric constant of silicon oxide on the first hydrophobic insulating layer having a bydrophilized surface. A semiconductor device manufacturing method which can suppress peel-off of a low dielectric constant insulating layer from an underlying hydrophobic layer is provided.
    Type: Grant
    Filed: April 10, 2003
    Date of Patent: February 17, 2004
    Assignee: Fujitsu Limited
    Inventors: Yukio Takigawa, Shun-ichi Fukuyama
  • Publication number: 20040021224
    Abstract: A semiconductor element is formed over a surface of a semiconductor substrate. A first insulating film is formed over the surface of the semiconductor substrate, the first insulating film covering the semiconductor element. A second insulating film is formed over the first insulating film, the second insulating film having a dielectric constant lower than that of the first insulating film. A first wiring pattern is formed over the second insulating film. A conductive connection member buried in the second and first insulating films electrically interconnects the first wiring pattern and semiconductor element.
    Type: Application
    Filed: July 31, 2003
    Publication date: February 5, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Shun-ichi Fukuyama, Tamotsu Owada, Hiroko Inoue, Ken Sugimoto
  • Publication number: 20040002208
    Abstract: A method of manufacturing a semiconductor device includes the steps of: (X) forming a first hydrophobic insulating layer above a semiconductor substrate; (Y) hydrophilizing a surface of the first hydrophobic insulating layer; and (Z) forming a low dielectric constant insulating layer having a specific dielectric constant lower than the specific dielectric constant of silicon oxide on the first hydrophobic insulating layer having a bydrophilized surface. A semiconductor device manufacturing method which can suppress peel-off of a low dielectric constant insulating layer from an underlying hydrophobic layer is provided.
    Type: Application
    Filed: April 10, 2003
    Publication date: January 1, 2004
    Applicant: FUJITSU LIMITED
    Inventors: Yukio Takigawa, Shun-ichi Fukuyama
  • Publication number: 20030227086
    Abstract: A semiconductor device has: a semiconductor substrate formed with a number of semiconductor elements; a first interlayer insulating film formed above the semiconductor substrate and having a first wiring recess; a first copper wiring embedded in the first wiring recess; a second interlayer insulating film having a second wiring recess, the second interlayer insulating film including a copper diffusion preventing layer formed on the first copper wiring and the first interlayer insulating film, an oxide film formed on the copper diffusion preventing layer, and an organic insulating resin layer formed on the oxide film; and a second copper wiring embedded in the second wiring recess. A semiconductor device having copper wiring layers and organic insulating resin layers with less separation and its manufacture method are provided.
    Type: Application
    Filed: January 24, 2003
    Publication date: December 11, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Satoshi Otsuka, Shun-Ichi Fukuyama
  • Publication number: 20030214041
    Abstract: A semiconductor device has: a semiconductor substrate; a number of semiconductor elements formed on the semiconductor substrate; a plurality of lower level wiring layers electrically connected to the semiconductor elements; a plurality of first insulating layers electrically separating the lower level wiring layers and having a first dielectric constant; a plurality of middle level wiring layers electrically connected to the lower level wiring layers; a plurality of second insulating layers electrically separating the middle level wiring layers and having a second dielectric constant larger than the first dielectric constant; a plurality of upper level wiring layers electrically connected to the middle level wiring layers; a plurality of third insulating layers electrically separating the upper level wiring layers and having a third dielectric constant larger than the second dielectric constant. A multilevel wiring structure is provided which has a high performance and a high reliability.
    Type: Application
    Filed: January 28, 2003
    Publication date: November 20, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Takashi Suzuki, Satoshi Otsuka, Tsutomu Hosoda, Hirofumi Watatani, Shun-ichi Fukuyama
  • Publication number: 20030207131
    Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.
    Type: Application
    Filed: May 30, 2003
    Publication date: November 6, 2003
    Applicant: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shun-Ichi Fukuyama, Katsumi Suzuki, Ei Yano, Tamotsu Owada, Iwao Sugiura
  • Patent number: 6613834
    Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.
    Type: Grant
    Filed: March 5, 2001
    Date of Patent: September 2, 2003
    Assignee: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shun-ichi Fukuyama, Katsumi Suzuki, Ei Yano, Tamotsu Owada, Iwao Sugiura
  • Publication number: 20030057561
    Abstract: On a substrate, a first insulating film, a first interlayer insulating film, a second and third insulating films, and a second interlayer insulating film are formed. Wire trenches are formed reaching the upper surface of the third insulating film, and via holes are formed from the bottom of the wire trench to the upper surface of the first insulating film. Formation of the wire trench is performed by etching the second interlayer insulating film under a condition in which the second interlayer insulating film is selectively etched. The third insulating film exposed at the bottoms of the wire trenches and the first insulating film exposed at the bottoms of the via holes are removed by etching under a condition in which the third insulating film is selectively etched. Wires are filled in the via holes and the wire trenches.
    Type: Application
    Filed: March 11, 2002
    Publication date: March 27, 2003
    Applicant: Fujitsu Limited
    Inventors: Shun-Ichi Fukuyama, Tamotsu Owada, Hiroko Inoue
  • Publication number: 20030010961
    Abstract: A composition for the formation of an insulating film comprising a low dielectric constant polymeric material and a sublimating material, which are dissolved in a solvent. Preferred low dielectric constant polymeric materials include polyaryl ethers. Preferred sublimating materials include silicone compounds having a closed stereostructure having atoms at its vertexes, such as those known as Si-T8 and Si-T12. A method of forming a low dielectric constant insulating film and electronic parts or components using an insulating film formed thereby are also disclosed.
    Type: Application
    Filed: July 15, 2002
    Publication date: January 16, 2003
    Applicant: FUJITSU LIMITED
    Inventors: Shun-Ichi Fukuyama, Tamotsu Owada, Hiroko Inoue
  • Publication number: 20020038910
    Abstract: The fact is utilized that a threshold at which the degassing amount will steeply change upon variations in SiH content exists in the relation between the hydrophobic SiH content of an HSQ (Hydrogen SilsesQuioxane) film and the degassing amount from the HSQ film. An HSQ film having a relative SiH content or absolute H content so as to correspond to the threshold or more is used as one insulating layer in an insulating interlayer. The hygroscopicity of the HSQ film is reduced to suppress any line defects that are considered to be generated in an upper insulating layer owing to elimination of a hygroscopic component. Satisfied are both the demand for improving the reliability of a small contact hole and the demand for suppressing any interconnection delay. The integration degree of a semiconductor device can easily and reliably be increased.
    Type: Application
    Filed: December 29, 1999
    Publication date: April 4, 2002
    Inventors: TOSHIKAZU INOUE, TADASHI KINOSHITA, KAZUTOSHI MOCHIZUKI, SHUN-ICHI FUKUYAMA, MORIO SHIOHARA
  • Publication number: 20010033026
    Abstract: A low dielectric film forming material contains siloxane resin and polycarbosilane dissolved in solvent. By using this solution, a low dielectric film is formed which contains siloxane resin and polycarbosilane bonded to the siloxane resin. Material of a low dielectric film is provided which is suitable for inter-level insulating film material. A semiconductor device is also provided which has a low dielectric constant film and high reliability.
    Type: Application
    Filed: March 5, 2001
    Publication date: October 25, 2001
    Applicant: Fujitsu Limited
    Inventors: Yoshihiro Nakata, Shun-ichi Fukuyama, Katsumi Suzuki, Ei Yano, Tamotsu Owada, Iwao Sugiura
  • Patent number: 5976618
    Abstract: A process capable of forming an inorganic film which can be used at a relatively large thickness equivalent to, or greater than, the thickness of an organic SOG, without being subjected to oxidation by O.sub.2 plasma treatment used in a fabrication process of a semiconductor device. Polysilazane is first coated on a base, and the resulting polysilazane film is converted to a silicon dioxide film.
    Type: Grant
    Filed: September 29, 1997
    Date of Patent: November 2, 1999
    Assignees: Fujitsu Limited, Kyushu Fujitsu Electronics Limited
    Inventors: Shun-ichi Fukuyama, Daitei Shin, Yuki Komatsu, Hideki Harada
  • Patent number: 5949130
    Abstract: A plurality of lines are formed on the principal face of a substrate. An insulating film is formed on the principal surface of this substrate so as to cover the lines. This insulating film consists of a material which contains a low-dielectric constant composition having caged molecular structural units. Spaces of thin electron clouds delineate the centers of the caged molecular structural units. The dielectric constant is accordingly lower than that of denser materials.
    Type: Grant
    Filed: February 18, 1998
    Date of Patent: September 7, 1999
    Assignee: Fujitsu Limited
    Inventors: Shun-ichi Fukuyama, Yoshihiro Nakata, Azuma Matsuura, Tomoaki Hayano