Patents by Inventor Shun Lo

Shun Lo has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20240113091
    Abstract: The present disclosure provides a package with a semiconductor structure and a method for manufacturing the semiconductor structure. In some embodiments, a photonic semiconductor structure includes a substrate having a first side and a second side opposite to each other, a first redistribution layer disposed on the first side, an interconnect structure disposed on the second side of the substrate, a metal reflector disposed in the interconnect structure, a dielectric layer disposed over the interconnect structure, and a grating coupler disposed in the dielectric layer and overlapping the metal reflector.
    Type: Application
    Filed: January 17, 2023
    Publication date: April 4, 2024
    Inventors: WEN-SHUN LO, JING-HWANG YANG, YINGKIT FELIX TSUI
  • Publication number: 20230387241
    Abstract: A semiconductor device includes a substrate having a P-well region, an N-well region disposed on either side of and abutting the P-well region, and a deep N-well region disposed beneath and abutting both the P-well region and at least part of the N-well region on either side of the P-well region. The semiconductor device further includes a first conductive layer formed over a cathode region of the P-well region, where a Schottky barrier is formed at a junction of the first conductive layer and the P-well region. The semiconductor device further includes a second conductive layer formed over anode regions of the P-well region, where the anode regions are disposed on either side of the cathode region.
    Type: Application
    Filed: May 26, 2022
    Publication date: November 30, 2023
    Inventors: Wen-Shun LO, Yu-Chi CHANG, Yingkit Felix TSUI
  • Patent number: 11830888
    Abstract: In some embodiments, a photodetector is provided. The photodetector includes a first well having a first doping type disposed in a semiconductor substrate. A second well having a second doping type opposite the first doping type is disposed in the semiconductor substrate on a side of the first well. A first doped buried region having the second doping type is disposed in the semiconductor substrate, where the first doped buried region extends laterally through the semiconductor substrate beneath the first well and the second well. A second doped buried region having the second doping type is disposed in the semiconductor substrate and vertically between the first doped buried region and the first well, where the second doped buried region contacts the first well such that a photodetector p-n junction exists along the second doped buried region and the first well.
    Type: Grant
    Filed: May 19, 2021
    Date of Patent: November 28, 2023
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Wen-Shun Lo, Felix Ying-Kit Tsui
  • Publication number: 20230378203
    Abstract: In some embodiments, a photodetector is provided. The photodetector includes a first well having a first doping type disposed in a semiconductor substrate. A second well having a second doping type opposite the first doping type is disposed in the semiconductor substrate on a side of the first well. A first doped buried region having the second doping type is disposed in the semiconductor substrate, where the first doped buried region extends laterally through the semiconductor substrate beneath the first well and the second well. A second doped buried region having the second doping type is disposed in the semiconductor substrate and vertically between the first doped buried region and the first well, where the second doped buried region contacts the first well such that a photodetector p-n junction exists along the second doped buried region and the first well.
    Type: Application
    Filed: August 7, 2023
    Publication date: November 23, 2023
    Inventors: Wen-Shun Lo, Felix Ying-Kit Tsui
  • Patent number: 11772004
    Abstract: A bubble blowing apparatus comprising a main body, a plurality of legs connecting the main body to a base, a motor, a fan operably coupled to the motor to blow an upward stream of air, a liquid fountain unit operably coupled to the motor to blow a bubble solution upward, a gear shaft operably coupled to the motor to rotate about a rotational axis, and a plurality of bubble wands rigidly affixed to an upper portion of the gear shaft. Further, the gear shaft is configured to continuously rotate about the rotational axis, such that each of the plurality of bubble wands repetitively cycle between the two positions of (1) passing over the liquid fountain unit so as to amass upwardly blown bubble solution, and (2) passing over the fan such that the amassed bubble solution contacts the upwardly blown air and forms a bubble.
    Type: Grant
    Filed: January 20, 2023
    Date of Patent: October 3, 2023
    Assignee: Sunny Days Entertainment, LLC
    Inventors: Jim Ruggiero, Ka Shun Lo
  • Publication number: 20230296928
    Abstract: A semiconductor device and a method of manufacturing the same are provided. The semiconductor device includes a semiconductor substrate, a first dielectric layer, a second dielectric layer, a light modulator, a heater, and a first conductive contact. The first dielectric layer is disposed on the semiconductor substrate. The second dielectric layer is disposed on the first dielectric layer. The light modulator is disposed in the first dielectric layer. The heater is disposed in the second dielectric layer and above the light modulator. The first conductive contact is electrically connected to the light modulator. A top surface of the heater is coplanar with a top surface of the first conductive contact.
    Type: Application
    Filed: March 16, 2022
    Publication date: September 21, 2023
    Inventors: WEN-SHUN LO, YINGKIT FELIX TSUI
  • Publication number: 20230158419
    Abstract: A bubble blowing apparatus comprising a main body, a plurality of legs connecting the main body to a base, a motor, a fan operably coupled to the motor to blow an upward stream of air, a liquid fountain unit operably coupled to the motor to blow a bubble solution upward, a gear shaft operably coupled to the motor to rotate about a rotational axis, and a plurality of bubble wands rigidly affixed to an upper portion of the gear shaft. Further, the gear shaft is configured to continuously rotate about the rotational axis, such that each of the plurality of bubble wands repetitively cycle between the two positions of (1) passing over the liquid fountain unit so as to amass upwardly blown bubble solution, and (2) passing over the fan such that the amassed bubble solution contacts the upwardly blown air and forms a bubble.
    Type: Application
    Filed: January 20, 2023
    Publication date: May 25, 2023
    Inventors: Jim Ruggiero, Ka Shun Lo
  • Patent number: 11610907
    Abstract: A memory device includes a substrate, a first transistor, a second transistor, and a capacitor. The first transistor is over the substrate and includes a select gate. The second transistor is over the substrate and connected to the first transistor in series, in which the second transistor includes a floating gate. The capacitor is over the substrate and connected to the second transistor, wherein the capacitor includes a top electrode, a bottom electrode in the substrate, and an insulating layer between the top electrode and the bottom electrode. The insulating layer includes nitrogen. A nitrogen concentration of the insulating layer increases in a direction from the top electrode to the bottom electrode.
    Type: Grant
    Filed: May 27, 2021
    Date of Patent: March 21, 2023
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Shun Lo, Tai-Yi Wu, YingKit Felix Tsui
  • Publication number: 20230033098
    Abstract: A memory device includes a substrate, a first transistor, a second transistor, and a capacitor. The first transistor is over the substrate and includes a select gate. The second transistor is over the substrate and connected to the first transistor in series, in which the second transistor includes a floating gate. The capacitor is over the substrate and connected to the second transistor, wherein the capacitor includes a top electrode, a bottom electrode in the substrate, and an insulating layer between the top electrode and the bottom electrode. The insulating layer includes nitrogen. A nitrogen concentration of the insulating layer increases in a direction from the top electrode to the bottom electrode.
    Type: Application
    Filed: October 13, 2022
    Publication date: February 2, 2023
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Shun LO, Tai-Yi WU, YingKit Felix TSUI
  • Publication number: 20220415914
    Abstract: In some embodiments, the present disclosure relates to an integrated chip (IC), including a substrate, a floating gate electrode disposed over the substrate, a contact etch stop layer (CESL) structure disposed over the floating gate electrode, an insulating stack separating the floating gate electrode from the CESL structure, the insulating stack including a first resist protective layer disposed over the floating gate electrode, a second resist protective layer disposed over the first resist protective layer, and an insulating layer separating the first resist protective layer from the second resist protective layer.
    Type: Application
    Filed: August 23, 2021
    Publication date: December 29, 2022
    Inventors: Wen-Shun Lo, Tai-Yi Wu, Shih-Hsien Chen, Ying Kit Felix Tsui
  • Publication number: 20220384465
    Abstract: A memory device includes a substrate, a first transistor, a second transistor, and a capacitor. The first transistor is over the substrate and includes a select gate. The second transistor is over the substrate and connected to the first transistor in series, in which the second transistor includes a floating gate. The capacitor is over the substrate and connected to the second transistor, wherein the capacitor includes a top electrode, a bottom electrode in the substrate, and an insulating layer between the top electrode and the bottom electrode. The insulating layer includes nitrogen. A nitrogen concentration of the insulating layer increases in a direction from the top electrode to the bottom electrode.
    Type: Application
    Filed: May 27, 2021
    Publication date: December 1, 2022
    Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.
    Inventors: Wen-Shun LO, Tai-Yi WU, YingKit Felix Tsui
  • Publication number: 20210272990
    Abstract: In some embodiments, a photodetector is provided. The photodetector includes a first well having a first doping type disposed in a semiconductor substrate. A second well having a second doping type opposite the first doping type is disposed in the semiconductor substrate on a side of the first well. A first doped buried region having the second doping type is disposed in the semiconductor substrate, where the first doped buried region extends laterally through the semiconductor substrate beneath the first well and the second well. A second doped buried region having the second doping type is disposed in the semiconductor substrate and vertically between the first doped buried region and the first well, where the second doped buried region contacts the first well such that a photodetector p-n junction exists along the second doped buried region and the first well.
    Type: Application
    Filed: May 19, 2021
    Publication date: September 2, 2021
    Inventors: Wen-Shun Lo, Felix Ying-Kit Tsui
  • Patent number: 11018168
    Abstract: In some embodiments, a photodetector is provided. The photodetector includes a first well having a first doping type disposed in a semiconductor substrate. A second well having a second doping type opposite the first doping type is disposed in the semiconductor substrate on a side of the first well. A first doped buried region having the second doping type is disposed in the semiconductor substrate, where the first doped buried region extends laterally through the semiconductor substrate beneath the first well and the second well. A second doped buried region having the second doping type is disposed in the semiconductor substrate and vertically between the first doped buried region and the first well, where the second doped buried region contacts the first well such that a photodetector p-n junction exists along the second doped buried region and the first well.
    Type: Grant
    Filed: May 10, 2019
    Date of Patent: May 25, 2021
    Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.
    Inventors: Wen-Shun Lo, Felix Ying-Kit Tsui
  • Patent number: 10985240
    Abstract: A Schottky diode device includes a substrate having a first conductivity type, a first well region having a second conductivity type disposed in the substrate, and a first doped region having the second conductivity type in the first well region, wherein the first doped region includes a first portion and a second portion, and the first portion and the second portion have different doping concentrations. The first portion includes a region having at least four sides, from a top-view perspective, abutting the second portion.
    Type: Grant
    Filed: May 12, 2020
    Date of Patent: April 20, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Shun Lo, Yu-Chi Chang, Felix Ying-Kit Tsui
  • Patent number: 10964586
    Abstract: A semiconductor structure includes a substrate having a first region and a second region defined thereon, a first isolation in the first region, a second isolation in the second region, and a region surrounding the first isolation in the substrate. The substrate includes a first material, and the region includes the first material and a second material. The first isolation has a first width, the second isolation has a second width, and the first width is greater than the second width. A bottom and sidewalls of the first isolation are in contact with the region, and a bottom and sidewalls of the second isolation are in contact with the substrate.
    Type: Grant
    Filed: December 20, 2019
    Date of Patent: March 30, 2021
    Assignee: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.
    Inventors: Wen-Shun Lo, Yu-Chi Chang, Felix Ying-Kit Tsui
  • Publication number: 20200349714
    Abstract: The present invention provides a projection apparatus and an operation method thereof. The projection apparatus comprises a projector and an image capturing device electrically connected to the projector. The projector provides a projection space, and the image capturing device provides an image capturing space. The projection space is located in the image capturing space. The image capturing device is configured to identify a boundary of the projection space in the image capturing space and is configured to detect a biological part located in the projection space. The image capturing device is configured to calculate a position of the biological part in the projection space, and the projector projects a mask block corresponding to the position of the biological part in the projection space. The present invention may prevent the light beam from interfering with a user.
    Type: Application
    Filed: April 29, 2020
    Publication date: November 5, 2020
    Applicant: Coretronic Corporation
    Inventors: Chuang-Yuan Cheng, An-Ching Tung, Chung-Kuang Lin, Jih-Shun Lo
  • Patent number: D1000527
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: October 3, 2023
    Assignee: WING HING MANUFACTURING COMPANY LIMITED
    Inventor: Lap Shun Lo
  • Patent number: D1005400
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: November 21, 2023
    Assignee: WING HING MANUFACTURING COMPANY LIMITED
    Inventor: Lap Shun Lo
  • Patent number: D1006889
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: December 5, 2023
    Assignee: WING HING MANUFACTURING COMPANY LIMITED
    Inventor: Lap Shun Lo
  • Patent number: D1008363
    Type: Grant
    Filed: December 7, 2021
    Date of Patent: December 19, 2023
    Assignee: WING HING MANUFACTURING COMPANY LIMITED
    Inventor: Lap Shun Lo