Abstract: A multi-mode bandpass filter is described. The bandpass filter includes a first multi-directional vibrating microelectromechanical systems resonator. The bandpass filter also includes a second multi-directional vibrating microelectromechanical systems resonator. The first multi-directional vibrating microelectromechanical systems resonator is in a parallel configuration. The second multi-directional vibrating microelectromechanical systems resonator is in a series configuration.

Abstract: This disclosure provides implementations of filters and filter topologies, circuits, structures, devices, apparatus, systems, and related processes. In one aspect, a device includes one or more LC resonant circuit stages. In some implementations, each LC stage includes an inductor and a capacitor. Each LC stage also has a corresponding resonant frequency. The one or more LC stages are arranged to produce an unmodified passband over a range of frequencies having a corresponding bandwidth. One or more microelectromechanical systems (MEMS) resonators are arranged with the one or more LC stages. The one or more MEMS resonators are arranged with the one or more LC stages so as to modify characteristics of the unmodified passband such that the hybrid filter produces a modified passband having a modified bandwidth and one or more other modified band characteristics.

Abstract: This disclosure provides systems, methods and apparatus for glass via bars that can be used in compact three-dimensional packages, including embedded wafer level packages. The glass via bars can provide high density electrical interconnections in a package. In some implementations, the glass via bars can include integrated passive components. Methods of fabricating glass via bars are provided. In some implementations, the methods can include patterning and etching photo-patternable glass substrates. Packaging methods employing glass via bars are also provided.

Abstract: This disclosure provides systems, methods and apparatus for vias in an integrated circuit structure such as a passive device. In one aspect, an integrated passive device includes a first conductive trace and a second conductive trace over the first conductive trace with an interlayer dielectric between a portion of the first conductive trace and the second conductive trace. One or more vias are provided within the interlayer dielectric to provide electrical connection between the first conductive trace and the second conductive trace. A width of the vias is greater than a width of at least one of the conductive traces.

Abstract: This disclosure provides implementations of inductors, transformers, and related processes. In one aspect, a device includes a substrate having first and second surfaces. A first inducting arrangement includes a first set of vias, a second set of vias, a first set of traces arranged over the first surface connecting the first and second vias, and a second set of traces arranged over the second surface connecting the first and second vias. A second inducting arrangement is inductively-coupled and interleaved with the first inducting arrangement and includes a third set of vias, a fourth set of vias, a third set of traces arranged over the first surface connecting the third and fourth vias, and a fourth set of traces arranged over the second surface connecting the third and fourth vias. One or more sets of dielectric layers insulate portions of the traces from one another.

Abstract: A diversity receiver switch includes at least one second stage switch configured to communicate with a transceiver. The diversity receiver switch may also include at least one first stage switch coupled between a diversity receiver antenna and the second stage switch(es). The first stage switch(es) may be configured to handle a different amount of power than the second stage switch(es). The diversity receiver switch may include a bank of second stage switches configured to communicate with a transceiver. A first stage switch may be configured to handle more power than each switch in the bank of second stage switches. Alternatively, the diversity receiver switch include a bank of first stage switches coupled between the diversity receiver antenna and a second stage switch. The second stage switch may be configured to handle more power than each of the first stage switches.

Abstract: This disclosure provides systems, methods, and apparatus related to inductors. In one aspect, a planar inductor may include a substrate with a spacer in the shape of a planar spiral coil on a surface of the substrate. Disposed on the spacer may be a line of metal formed as a planar inductor in the shape of the planar spiral coil. The spacer may be between the line of metal and the surface of the substrate. The spacer may elevate the line of metal above the surface of the substrate.

Abstract: This disclosure provides implementations of electromechanical systems (EMS) piezoelectric resonator structures, transformers, devices, apparatus, systems, and related processes. In one aspect, a piezoelectric resonator structure includes a first conductive electrode layer, a second conductive electrode layer, and a piezoelectric layer arranged between the first and second conductive layers. In some implementations, the surface of the piezoelectric layer adjacent to the first conductive layer is separated from the first conductive layer by a first gap, and the surface of the piezoelectric layer adjacent to the second conductive layer is separated from the second conductive layer by a second gap. In some implementations, the resonator structure further includes an encapsulation layer arranged over the second conductive layer and providing physical support to the second conductive layer.

Abstract: An impedance matching circuit is disclosed. The impedance matching circuit includes two or more mutually coupled inductors. A total self inductance of the impedance matching circuit is less than a corresponding impedance matching circuit that includes inductors that are not mutually coupled. The two or more mutually coupled inductors may have known current ratios that match current ratios in the corresponding impedance matching circuit.

Abstract: Three-dimensional (3D) Radio Frequency (RF) inductor-capacitor (LC) band pass filters having through-glass-vias (TGVs). One such L-C filter circuit includes a glass substrate, a first portion of a first inductor formed on a first surface of the glass substrate, a second portion of the first inductor formed on a second surface of the glass substrate, and a first set of TGVs configured to connect the first and second portions of the first inductor. Additionally the L-C filter circuit can include a second inductor similar to the first inductor, and a metal-insulator-metal (MIM) capacitor formed between the first and second inductor, such that the first and second inductor are coupled through the MIM capacitor.

Abstract: Electromechanical systems resonator structures, devices, circuits, and systems are disclosed. In one aspect, an oscillator includes an active component and a passive component connected in a feedback configuration. The passive component includes one or more contour mode resonators (CMR). A CMR includes a piezoelectric layer disposed between a first conductive layer and a second conductive layer. The conductive layers include an input electrode and an output electrode. The passive component is configured to output a first resonant frequency and a second resonant frequency, which is an odd integer harmonic of the first resonant frequency. The active component is configured to output a signal including the first resonant frequency and the second resonant frequency. This output signal can be a substantially square wave signal, which can serve as a clock in various applications.

Abstract: This disclosure provides implementations of electromechanical systems piezoelectric resonator transformers, devices, apparatus, systems, and related processes. In one aspect, a transformer includes a piezoelectric layer; a first conductive layer arranged over a first surface of the piezoelectric layer including a first set of electrodes and a second set of electrodes interdigitated with the first set. The transformer includes a second conductive layer arranged over a second surface including at least a third set of electrodes. In some implementations, the transformer includes a first port capable of receiving an input signal and to which the first set of electrodes are coupled, and a second port capable of being coupled to a load and of outputting an output signal, the second set of electrodes being coupled to the second port. Generally, a ratio of the number of electrodes of the second set to the first set characterizes a transformation ratio.

Abstract: This disclosure provides implementations of electromechanical systems combined resonator and passive circuit components. In one aspect, passband flattened filter apparatus includes a resonator structure and input and output passband flattening components. The resonator structure has a first input, a second input coupled to a ground terminal, a first output, and a second output coupled to the ground terminal. The input passband flattening component includes a first inductor having an output coupled to the first input of the resonator structure, and a second inductor having an input coupled to the first input of the resonator structure and an output coupled to the ground terminal. The output passband flattening component includes a first inductor having an input coupled to the first output of the resonator structure, and a second inductor having an input coupled to the first output of the resonator structure and an output coupled to the ground terminal.

Abstract: Systems and method for wideband filter designs comprising two-port piezoelectric resonators electrically coupled in parallel. A resonating circuit comprises a first piezoelectric resonator formed of a first configuration, and a second piezoelectric resonator formed of a second configuration such that outputs of the first and second piezoelectric resonators have a 180-degree phase difference for a same input. The first piezoelectric resonator and the second piezoelectric resonator are coupled electrically in parallel. The first and second piezoelectric resonators have different resonating frequencies respectively controlled by lateral dimensions of the piezoelectric resonators.

Abstract: A multiple frequency reconfigurable voltage controlled oscillator (VCO) (136) includes a variable capacitance device (112), an inductor (116) coupled in parallel with the variable capacitance device (112), and at least two circuit paths (118, 120, 122) coupled in parallel with the variable capacitance device (112) and the inductor (116). The circuit paths (118, 120, 122) each include a piezoelectric laterally vibrating resonator (126, 130, 134) and a switch (124, 128, 132) for selectably coupling each piezoelectric laterally vibrating resonator (126, 130, 134) in parallel with the inductor (116) and variable capacitance device (112).

Abstract: This disclosure provides implementations of electromechanical systems combined resonator and passive circuit component structures, devices, apparatus, systems, and related processes. In one aspect, the device includes a piezoelectric resonator structure formed over an insulating substrate. A portion of the piezoelectric resonator structure is spaced apart from the substrate by a first gap. A passive circuit component structure such as an inductor or a capacitor is formed over the insulating substrate. A portion of the passive circuit component structure is spaced apart from the substrate by a second gap. The first gap and the second gap are defined by removal of a sacrificial (SAC) layer.

Abstract: A chipset includes a sheet of glass, quartz or sapphire and a first wafer having at least one first circuit layer on a first side of a first substrate layer. The first wafer is connected to the sheet such that the at least one first circuit layer is located between the first substrate layer and the sheet. A second wafer having at least one second circuit layer on a first side of a second substrate layer is connected to the first substrate layer such that the at least one second circuit layer is located between the second substrate layer and the first substrate layer. Also a method of forming a chipset.