Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.

Abstract: A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot electrons and are alternately arranged with other auxiliary gates functioning to prevent write errors in the non-selected memory cells.

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.

Abstract: A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot electrons and are alternately arranged with other auxiliary gates functioning to prevent write errors in the non-selected memory cells.

Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.

Abstract: A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot electrons and are alternately arranged with other auxiliary gates functioning to prevent write errors in the non-selected memory cells.

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.

Abstract: A semiconductor integrated device having a plurality of memory cells, each including a floating gate, a control gate and an auxiliary gate formed over a side surface of the floating gate through an insulator film. Auxiliary gates coupled to selected memory cells function to generate hot electrons and are alternately arranged with other auxiliary gates functioning to prevent write errors in the non-selected memory cells.

Abstract: A nonvolatile memory device of the present invention performs a programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.

Abstract: A nonvolatile semiconductor memory device includes a memory cell, formed in a well in a substrate and having a source, a drain, a first gate and a second gate. A word line control circuit drives a word line connected to the second gate, a program data holding circuit holds program data, a programming voltage generator circuit applies a programming voltage onto a bit line connected to the drain, and a discrimination circuit verifies the program data. Programming is conducted by applying positive voltages to the second gate and drain, while injecting hot electrons generated in a channel portion in a vicinity of the drain when 0V is applied to the well and source to increase a threshold voltage. Verification is conducted by applying a verify voltage to the second gate, while applying a positive voltage to the drain and 0V to the well and source, thereby verifying whether the positive voltage applied is maintained or comes down to 0V, depending upon the threshold voltage, by means of the discrimination circuit.

Abstract: In a semiconductor integrated circuit device including a third gate, the present invention improves miniaturization and operation speed and reduces a defect density of an insulator film. In a semiconductor integrated circuit device including a well of a first conductivity type formed in a semiconductor substrate, a source/drain diffusion layer of a second conductivity type inside the well, a floating gate formed over the semiconductor substrate through an insulator film, a control gate formed and isolated from the floating gate through an insulator film, word lines formed by connecting the control gates and a third gate formed and isolated from the semiconductor substrate, the floating gate and the control gate through an insulator film and different from the floating gate and the control gate, the third gate is buried into a space of the floating gates existing in a direction vertical to the word line and a channel.

Abstract: In a nonvolatile semiconductor memory device capable of the storage of multivalued data, fast writing can be realized with high reliability. In such a nonvolatile semiconductor memory device for storing multivalued information in one memory cell by setting a plurality of threshold voltages of data, writing of data having one threshold voltage that is the remotest to an erased state is performed prior to writing of the data having the other threshold voltages (write #1). Writing of the data having the other threshold voltages is then sequentially performed starting from the data having the nearer threshold voltage to the erased state. When writing each of the data having the other threshold voltages, writing of the data is simultaneously performed to a memory cell to which the data having the remoter threshold voltage from the erased state (write #2 and write #3).

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A non-volatile memory device is provided which includes a flash memory having a plurality of banks and a bank selection register which can take on states at least equal in number to the number of banks. The bank selection register outputs a signal to point to one of the banks based upon one of the states of the bank selection register. A controller is also provided having a plurality of data buffers corresponding, respectively, to the banks. In addition to word lines, bit lines and memory cells, each bank includes a data register to temporarily hold data to be written to the memory cells. The controller transmits data in the data buffer to the data register of the pointed to bank, while the flash memory writes data held in the data register to the memory cells of another one of the banks.

Abstract: A nonvolatile semiconductor memory device includes a memory cell, formed in a well in a substrate and having a source, a drain, a first gate and a second gate. A word line control circuit drives a word line connected to the second gate, a program data holding circuit holds program data, a programming voltage generator circuit applies a programming voltage onto a bit line connected to the drain, and a discrimination circuit verifies the program data. Programming is conducted by applying positive voltages to the second gate and drain, while injecting hot electrons generated in a channel portion in a vicinity of the drain when 0V is applied to the well and source to increase a threshold voltage. Verification is conducted by applying a verify voltage to the second gate, while applying a positive voltage to the drain and 0V to the well and source, thereby verifying whether the positive voltage applied is maintained or comes down to 0V, depending upon the threshold voltage, by means of the discrimination circuit.

Abstract: A nonvolatile memory device of the present invention performs programming operation by accumulating a charge in certain capacitance which is provided for each programming memory cell and injecting hot electrons generated when the charge is discharged via the memory cell into a floating gate. Thus, a variation in a programming characteristic of the nonvolatile semiconductor memory device is reduced, thereby realizing high-speed programming operation.