Patents by Inventor Shunpei Yamazaki
Shunpei Yamazaki has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Publication number: 20140131700Abstract: Provided is a transistor including an oxide semiconductor in a channel formation region in which the threshold voltage is controlled, which is a so-called normally-off switching element. The switching element includes a first insulating film, an oxide semiconductor layer over the first insulating film and includes a channel formation region, a second insulating film covering the oxide semiconductor layer, a source electrode layer and a drain electrode layer electrically connected to the oxide semiconductor layer. The semiconductor device further includes a first gate electrode layer overlapping the channel formation region with the first insulating film therebetween, a second gate electrode layer overlapping the channel formation region with the second insulating film therebetween, and a third gate electrode layer overlapping a side surface of the oxide semiconductor layer in a channel width direction with the second insulating film therebetween.Type: ApplicationFiled: November 7, 2013Publication date: May 15, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 8723176Abstract: A semiconductor device in which release of oxygen from side surfaces of an oxide semiconductor film including c-axis aligned crystal parts can be prevented is provided. The semiconductor device includes a first oxide semiconductor film, a second oxide semiconductor film including c-axis aligned crystal parts, and an oxide film including c-axis aligned crystal parts. In the semiconductor device, the first oxide semiconductor film, the second oxide semiconductor film, and the oxide film are each formed using a IGZO film, where the second oxide semiconductor film has a higher indium content than the first oxide semiconductor film, the first oxide semiconductor film has a higher indium content than the oxide film, the oxide film has a higher gallium content than the first oxide semiconductor film, and the first oxide semiconductor film has a higher gallium content than the second oxide semiconductor film.Type: GrantFiled: January 28, 2013Date of Patent: May 13, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 8723173Abstract: The semiconductor device includes a first conductive layer over a substrate; an oxide semiconductor layer which covers the first conductive layer; a second conductive layer in a region which is not overlapped with the first conductive layer over the oxide semiconductor layer; an insulating layer which covers the oxide semiconductor layer and the second conductive layer; and a third conductive layer in a region including at least a region which is not overlapped with the first conductive layer or the second conductive layer over the insulating layer.Type: GrantFiled: September 22, 2010Date of Patent: May 13, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kei Takahashi, Yoshiaki Ito
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Patent number: 8723182Abstract: A semiconductor device includes TFTs designed in accordance with characteristics of circuits. In a first structure of the invention, the TFT is formed by using a crystalline silicon film made of a unique crystal structure body. The crystal structure body has a structure in which rod-like or flattened rod-like crystals grow in a direction parallel to each other. In a second structure of the invention, growth distances of lateral growth regions are made different from each other in accordance with channel lengths, of the TFTs. By this, characteristics of TFTs formed in one lateral growth region can be made as uniform as possible.Type: GrantFiled: May 2, 2012Date of Patent: May 13, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hisashi Ohtani
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Patent number: 8723760Abstract: A-light-emitting device which realizes a high aperture ratio and in which the quality of image is little affected by the variation in the characteristics of TFTs. A large holding capacitor Cs is not provided in the pixel portion but, instead, the channel length and the channel width of the driving TFTs are increased, and the channel capacitance is utilized as Cs. The channel length is selected to be very larger than the channel width to improve current characteristics in the saturated region, and a high VGS is applied to the driving TFTs to obtain a desired drain current. Therefore, the drain currents of the driving TFTs are little affected by the variation in the threshold voltage. In laying out the pixels, further, wiring is arranged under the partitioning wall and the driving TFTs are arranged under the wiring in order to avoid a decrease in the aperture ratio despite of an increase in the size of the driving TFT.Type: GrantFiled: August 1, 2007Date of Patent: May 13, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Mitsuaki Osame, Aya Anzai, Jun Koyama, Makoto Udagawa, Masahiko Hayakawa, Shunpei Yamazaki
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Publication number: 20140125936Abstract: A display device of the present invention includes a thin film transistor in a pixel region formed over a substrate, the thin film transistor including an active layer and a gate electrode with a gate insulating film interposed between the active layer and the gate electrode, a silicon nitride film formed over the thin film transistor, a resin film formed over the silicon nitride film, an inorganic insulating film formed over the resin film; a metal layer formed over the substrate; and a sealing material formed over the metal layer, wherein the sealing material covers a region where the resin film is not formed over the silicon nitride film.Type: ApplicationFiled: January 13, 2014Publication date: May 8, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Hongyong ZHANG, Shunpei YAMAZAKI, Satoshi TERAMOTO, Yoshiharu HIRAKATA
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Publication number: 20140124773Abstract: The present invention is intended to suppress power consumption of an EL display. In accordance with the brightness of an image to be displayed in a pixel portion, the contrast of the image is determined whether to be inverted or not, and the number of bits of the digital video signal to be input into the pixel portion is reduced, and the magnitude of a current to flow through the EL element is allowed to be maintained at a constant level even when a temperature of an EL layer changes by providing the EL display with another EL element to be used for monitoring a temperature.Type: ApplicationFiled: January 15, 2014Publication date: May 8, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun Koyama, Mitsuaki Osame, Mai Osada
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Publication number: 20140124771Abstract: A light emitting device having a high definition, a high aperture ratio and a high reliability is provided. The present invention realizes a high definition and a high aperture ratio for a flat panel display of full colors using luminescent colors of red, green and blue without being dependent upon the film formation method and deposition precision of an organic compound layer by forming the laminated sections 21, 22 by means of intentionally and partially overlapping different organic compound layers of adjacent light emitting elements. Moreover, the protective film 32a containing hydrogen is formed and the drawback in the organic compound layer is terminated with hydrogen, thereby realizing the enhancement of the brightness and the reliability.Type: ApplicationFiled: January 13, 2014Publication date: May 8, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masaaki Hiroki, Masakazu Hiroki, Hideaki Kuwabara
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Publication number: 20140127874Abstract: A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where ?r/d is greater than or equal to 0.08 (nm?1) and less than or equal to 7.9 (nm?1) when the relative permittivity of a material used for the gate insulating layer is ?r and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 ?m.Type: ApplicationFiled: January 9, 2014Publication date: May 8, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei YAMAZAKI, Hiromichi GODO, Daisuke KAWAE
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Publication number: 20140124780Abstract: One object is to provide a transistor including an oxide semiconductor film which is used for the pixel portion of a display device and has high reliability. A display device has a first gate electrode; a first gate insulating film over the first gate electrode; an oxide semiconductor film over the first gate insulating film; a source electrode and a drain electrode over the oxide semiconductor film; a second gate insulating film over the source electrode, the drain electrode and the oxide semiconductor film; a second gate electrode over the second gate insulating film; an organic resin film having flatness over the second gate insulating film; a pixel electrode over the organic resin film having flatness, wherein the concentration of hydrogen atoms contained in the oxide semiconductor film and measured by secondary ion mass spectrometry is less than 1×1016 cm?3.Type: ApplicationFiled: January 14, 2014Publication date: May 8, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventor: Shunpei Yamazaki
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Patent number: 8716814Abstract: The invention provides a processor obtained by forming a high functional integrated circuit using a polycrystalline semiconductor over a substrate which is sensitive to heat, such as a plastic substrate or a plastic film substrate. Moreover, the invention provides a wireless processor, a wireless memory, and an information processing system thereof which transmit and receive power or signals wirelessly. According to the invention, an information processing system includes an element forming region including a transistor which has at least a channel forming region formed of a semiconductor film separated into islands with a thickness of 10 to 200 nm, and an antenna. The transistor is fixed on a flexible substrate. The wireless processor in which a high functional integrated circuit including the element forming region is formed and the semiconductor device transmit and receive data through the antenna.Type: GrantFiled: July 7, 2005Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Kiyoshi Kato, Jun Koyama, Yutaka Shionoiri
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Patent number: 8716061Abstract: In a thin film transistor which uses an oxide semiconductor, buffer layers containing indium, gallium, zinc, oxygen, and nitrogen are provided between the oxide semiconductor layer and the source and drain electrode layers.Type: GrantFiled: December 18, 2012Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Junichiro Sakata, Tetsunori Maruyama, Yuki Imoto, Yuji Asano, Junichi Koezuka
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Patent number: 8716073Abstract: To provide an oxide semiconductor film including a low-resistance region, which can be applied to a transistor. To provide a transistor including the oxide semiconductor film, which can perform at high speed. To provide a high-performance semiconductor device including the transistor including the oxide semiconductor film, which can perform at high speed, with high yield. A film having a reducing property is formed over the oxide semiconductor film. Next, part of oxygen atoms are transferred from the oxide semiconductor film to the film having a reducing property. Next, an impurity is added to the oxide semiconductor film through the film having a reducing property and then, the film having a reducing property is removed, so that a low-resistance region is formed in the oxide semiconductor film.Type: GrantFiled: July 12, 2012Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Shinji Ohno, Yuichi Sato, Junichi Koezuka, Sachiaki Tezuka
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Patent number: 8716933Abstract: A light-emitting device having the quality of an image high in homogeneity is provided. A printed wiring board (second substrate) (107) is provided facing a substrate (first substrate) (101) that has a luminous element (102) formed thereon. A PWB side wiring (second group of wirings) (110) on the printed wiring board (107) is electrically connected to element side wirings (first group of wirings) (103, 104) by anisotropic conductive films (105a, 105b). At this point, because a low resistant copper foil is used to form the PWB side wiring (110), a voltage-drop of the element side wirings (103, 104) and a delay of a signal can be reduced. Accordingly, the homogeneity of the quality of an image is improved, and the operating speed of a driver circuit portion is enhanced.Type: GrantFiled: November 21, 2012Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Takeshi Fukunaga
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Patent number: 8716708Abstract: Provided is a bottom-gate transistor including an oxide semiconductor, in which electric-field concentration which might occur in the vicinity of an end portion of a drain electrode layer (and the vicinity of an end portion of a source electrode layer) when a high gate voltage is applied to a gate electrode layer is reduced and degradation of switching characteristics is suppressed, so that the reliability is improved. The cross-sectional shape of an insulating layer which overlaps over a channel formation region is a tapered shape. The thickness of the insulating layer which overlaps over the channel formation region is 0.3 ?m or less, preferably 5 nm or more and 0.1 ?m or less. The taper angle ? of a lower end portion of the cross-sectional shape of the insulating layer which overlaps over the channel formation region is 60° or smaller, preferably 45° or smaller, further preferably 30° or smaller.Type: GrantFiled: September 25, 2012Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Masahiko Hayakawa, Satoshi Shinohara
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Patent number: 8717269Abstract: The invention provides an active matrix EL display device which can perform a clear multi-gray scale color display. In particular, the invention provides a large active matrix EL display device at low cost by a manufacturing method which can selectively form a pattern. Power supply lines in a pixel portion are arranged in matrix by the manufacturing method which can selectively form a pattern. Further, capacitance between wirings is reduced by providing a longer distance between adjacent wirings by the manufacturing method which can selectively form a pattern.Type: GrantFiled: August 20, 2013Date of Patent: May 6, 2014Assignee: Semiconductor Energy Laboratory Co., Ltd.Inventors: Yasunori Yoshida, Hajime Kimura, Shinji Maekawa, Osamu Nakamura, Shunpei Yamazaki
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Publication number: 20140117932Abstract: An object is to provide a moving object structure capable of reducing power loss caused when power is supplied from a power feeding device to a moving object by wireless communication. Another object is to provide a moving object structure capable of reducing the strength of a radio wave radiated to the surroundings. Before power is supplied to a moving object, a radio wave for alignment of antennas is output from a power feeding device. That is, radio waves are output from a power feeding device in two stages. In a first stage, a radio wave is output to align positions of antennas of the power feeding device and the moving object. In a second stage, a radio wave is output to supply power from the power feeding device to the moving object.Type: ApplicationFiled: January 3, 2014Publication date: May 1, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Jun KOYAMA, Yutaka SHIONOIRI
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Publication number: 20140121787Abstract: Provided is a structure which is capable of central control of an electric device and a sensor device and a structure which can reduce power consumption of an electric device and a sensor device. A central control system includes at least a central control device, an output unit, and an electric device or a sensor device. The central control device performs arithmetic processing on information transmitted from the electric device or the sensor device and makes the output unit output information obtained by the arithmetic processing. It is possible to know the state of the electric device or the sensor device even apart from the electric device or the sensor device. The electric device or the sensor device includes a transistor which includes an activation layer using a semiconductor with the band gap wider than that of single crystal silicon.Type: ApplicationFiled: October 24, 2013Publication date: May 1, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Tatsuji Nishijima, Hidetomo Kobayashi, Tomoaki Atsumi, Kiyoshi Kato
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Publication number: 20140117369Abstract: An active matrix display device having a pixel structure in which pixel electrodes, gate wirings and source wirings are suitably arranged in the pixel portions to realize a high numerical aperture without increasing the number of masks or the number of steps. The device comprises a gate electrode and a source wiring on an insulating surface, a first insulating layer on the gate electrode and on the source wiring, a semiconductor layer on the first insulating film, a second insulating layer on the semiconductor film, a gate wiring connected to the gate electrode on the second insulating layer, a connection electrode for connecting the source wiring and the semiconductor layer together, and a pixel electrode connected to the semiconductor layer.Type: ApplicationFiled: January 7, 2014Publication date: May 1, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Yasuyuki Arai
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Publication number: 20140117364Abstract: By providing appropriate TFT structures arranged in various circuits of the semiconductor device in response to the functions required by the circuits, it is made possible to improve the operating performances and the reliability of a semiconductor device, reduce power consumption as well as realizing reduced manufacturing cost and increase in yield by lessening the number of processing steps. An LDD region of a TFT is formed to have a concentration gradient of an impurity element for controlling conductivity which becomes higher as the distance from a drain region decreases. In order to form such an LDD region having a concentration gradient of an impurity element, the present invention uses a method in which a gate electrode having a taper portion is provided to thereby dope an ionized impurity element for controlling conductivity accelerated in the electric field so that it penetrates through the gate electrode and a gate insulating film into a semiconductor layer.Type: ApplicationFiled: January 6, 2014Publication date: May 1, 2014Applicant: Semiconductor Energy Laboratory Co., Ltd.Inventors: Shunpei Yamazaki, Hideomi Suzawa, Koji Ono, Yasuyuki Arai