Abstract: A semiconductor device of embodiments includes: a first silicon carbide region of first conductive type including a first region in contact with a first face of a silicon carbide layer having first and second faces; a second silicon carbide region of second conductive type above the first silicon carbide region; a third silicon carbide region of second conductive type above the second silicon carbide region; a fourth silicon carbide region of first conductive type above the second silicon carbide region; a first gate electrode and a second gate electrode extending in the first direction; a first electrode on the first face and including a first portion and a second portion between the first and the second gate electrode. The first portion contacts the third and the fourth silicon carbide region. The second portion provided in the first direction of the first portion and contacts with the first region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a third semiconductor member, and a fourth semiconductor member. The first semiconductor member is of a first conductivity type, and includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The fifth partial region is in Schottky contact with the second electrode. The second semiconductor member is of a second conductivity type, and includes a first portion and a second portion. The third semiconductor member is of the second conductivity type, and includes a first semiconductor portion, a second semiconductor portion, and a third semiconductor portion. The fourth semiconductor member is of the first conductivity type, and includes a first semiconductor region and a second semiconductor region.

Abstract: According to one embodiment, a semiconductor device includes first to third electrodes, a first semiconductor portion provided between the first and second electrodes, a second semiconductor portion, and a fourth semiconductor portion. The first semiconductor portion includes first to sixth partial regions. The second partial region is aligned with the first partial region in a second direction crossing a first direction from the first electrode to the second electrode. The third partial region is aligned with the first partial region in the first direction. The fourth partial region is aligned with the second partial region in a third direction crossing a plane including the first and second directions. The fifth partial region is aligned with the fourth partial region in the first direction. The sixth partial region is aligned with the second partial region in the first direction and with the fourth partial region in the third direction.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor member, a second semiconductor member, a third semiconductor member, a fourth semiconductor member, and a first insulating member. The first semiconductor member is provided between the first and second electrodes, and is of a first conductivity type. The first semiconductor member includes a first partial region, a second partial region, a third partial region, a fourth partial region, and a fifth partial region. The second semiconductor member is of a second conductivity type. The second semiconductor member includes a first semiconductor region, a second semiconductor region, a third semiconductor region, a fourth semiconductor region, and a fifth semiconductor region. The third semiconductor member is of the second conductivity type. The fourth semiconductor member is of the first conductivity type. The first insulating member includes a first insulating region.

Abstract: According to one embodiment, a semiconductor device includes a first electrode, a second electrode, a third electrode, a first semiconductor portion, a second semiconductor portion, a third semiconductor portion, and a fourth semiconductor portion. The first semiconductor portion is of a first conductivity type. The first semiconductor portion includes a first semiconductor region, a second semiconductor region, and a third semiconductor region. The second semiconductor portion is of a second conductivity type. The second semiconductor portion includes a first portion, a second portion, a third portion, and a fourth portion. The first portion has a first depth, the second portion has a second depth shallower than the first depth, and the third portion has the first depth. The third semiconductor portion is of the second conductivity type, and includes a first region portion and a second region portion. The fourth semiconductor portion is of the first conductivity type.

Abstract: A semiconductor device of an embodiment includes a transistor region and a diode region. The transistor region includes an n-type first silicon carbide region having a first portion in contact with a first plane, a p-type second silicon carbide region, an n-type third silicon carbide region, a first electrode in contact with the first portion, the second silicon carbide region, and the third silicon carbide region, a second electrode in contact with a second plane, and a gate electrode. The diode region includes an n-type first silicon carbide region having a second portion in contact with the first plane, a p-type fourth silicon carbide region, a first electrode in contact with the second portion and the fourth silicon carbide region, and a second electrode. An occupied area per unit area of the fourth silicon carbide region is larger than an occupied area per unit area of the second silicon carbide region. The first diode region is provided between a first transistor region and a second transistor region.

Abstract: A semiconductor device includes a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type on the first region, and a third silicon carbide region of a second conductivity type on the second region. Fourth and fifth silicon carbide region of the first conductivity type are on the third region. A first electrode has a first portion between the fourth region and fifth region in a first direction. A metal silicide layer is between the first portion and the third region, between the first portion and the fourth region in the first direction, and between the first portion and the fifth silicon carbide region in the first direction.

Abstract: A semiconductor device includes a silicon carbide layer having a first silicon carbide region of a first conductivity type, a second silicon carbide region of a second conductivity type, a third silicon carbide region of the second conductivity type, and a fourth silicon carbide region of the first conductivity type, first and second gate electrodes extending in a first direction and provided on a first surface of the silicon carbide layer, a first electrode on the first surface and including a first portion in contact with the third and fourth silicon carbide regions and a second portion in contact with the first silicon carbide region, and a second electrode on a second surface of the silicon carbide layer. The depth of the second silicon carbide region facing the fourth silicon carbide region is shallower than the depth of the second silicon carbide region facing the first gate electrode.

Abstract: A semiconductor device according to an embodiment includes: a silicon carbide layer having a first face and a second face; first and second gate electrodes; a first silicon carbide region; a second silicon carbide region between the first silicon carbide region and the first face; a third silicon carbide region between the second silicon carbide region and the first face; a fourth silicon carbide region between the third silicon carbide region and the first face; a first electrode; and a second electrode. The first electrode includes a first portion, and the first portion includes a first contact face in contact with the fourth silicon carbide region, a second contact face in contact with the fourth silicon carbide region, a third contact face in contact with the fourth silicon carbide region and the third silicon carbide region, and a fourth contact face in contact with the third silicon carbide region.

Abstract: A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode and being of a first conductivity type, second semiconductor layers located on a portion of the first semiconductor layer and being of a second conductivity type, a third semiconductor layer located on a portion of the second semiconductor layer and being of the first conductivity type, a fourth semiconductor layer located in a portion of the first semiconductor layer between the second semiconductor layers and being of the second conductivity type, a second electrode facing the second semiconductor layer via an insulating film, and a third electrode connected to the second and third semiconductor layers. The first, second, third, and fourth semiconductor layers include silicon and carbon.

Abstract: A semiconductor device includes a first electrode, a first semiconductor layer connected to the first electrode, a second semiconductor layer located on a portion of the first semiconductor layer, a third semiconductor layer located on a portion of the second semiconductor layer, a second electrode connected to the third semiconductor layer, and a third electrode located in a region directly above at least a portion of the second semiconductor layer between the first semiconductor layer and the third semiconductor layer. The third semiconductor layer faces the first semiconductor layer via the second semiconductor layer. A side surface of the third semiconductor layer facing the first semiconductor layer has a shape that approaches the first semiconductor layer upward. The third semiconductor layer is of a first conductivity type and includes silicon and carbon. The third electrode faces the portion via a first insulating film.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, and a conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The first electrode includes a first region in the transistor region and a second region in the diode region. A first contact area between the conductor and the first region is larger than a second contact area between the conductor and the second region.

Abstract: A semiconductor device according to an embodiment includes a semiconductor chip having a transistor region and a diode region, a first conductor, and a second conductor. The semiconductor chip includes a first electrode, a second electrode, a silicon carbide layer between the first electrode and the second electrode, and a gate electrode. The transistor region is provided with a third electrode spaced apart from the first electrode and close to the diode region. One end of the first conductor is in contact with the first electrode, and one end of the second conductor is in contact with the third electrode.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes a first silicon carbide region of n-type having a first portion in contact with a first plane, a second silicon carbide region of p-type, a third silicon carbide region of n-type, and a gate electrode. The diode region includes the first silicon carbide region of n-type having a second portion in contact with the first plane and a fourth silicon carbide region of p-type. The semiconductor device includes a gate wiring electrically connected to the gate electrode. A distance between a high-concentration portion included in the fourth silicon carbide region and the gate wiring is larger than a distance between a high-concentration portion included in the second silicon carbide region and the gate wiring.

Abstract: A semiconductor device according to an embodiment includes a transistor region and a diode region. The transistor region includes n-type first SiC region having a first portion contacting a first plane, p-type second SiC region, n-type third SiC region, and a gate electrode. The diode region includes the first SiC region having a second portion contacting the first plane and p-type fourth SiC region. The semiconductor device includes a first electrode contacting the first portion and the second portion and a second electrode contacting a second plane. An occupied area per unit area of the fourth SiC region is larger than an occupied area per unit area of the second SiC region. In addition, a first diode region is provided between a first transistor region and a second transistor region. An inorganic insulating layer is provided between the first electrode and a gate wiring adjacent to the first electrode.

Abstract: A semiconductor device includes: a first conductive type first silicon carbide region including a first region, a second region and a third region both on the first region, the second region having impurity concentration equal to or higher than the first region, and the third region having impurity concentration higher than the second region; a second conductive type second silicon carbide region on the first silicon carbide region, the second silicon carbide region including a fourth region in contact with the second region and a fifth region in contact with the third region, and the fifth region having impurity concentration higher than the fourth region; a third silicon carbide region of a first conductive type on the second silicon carbide region; a first gate electrode; a first electrode having a first portion in contact with the second silicon carbide region and the third silicon carbide region; and a second electrode.

Abstract: A semiconductor device includes a first semiconductor layer of a first conductivity type, second to fifth semiconductor layers of a second conductivity type, and first and second electrodes. The first semiconductor layer is provided between the first and second electrodes, and includes a termination region. The second semiconductor layer is provided between the first semiconductor layer and the second electrode, and has a first thickness in a first direction from the first electrode toward the second electrode. The third to fifth semiconductor layers are provided in the termination region. The third semiconductor layer surrounds the second semiconductor layer, and has a second thickness in the first direction. The fourth semiconductor layer surrounds the third semiconductor layer, and has a third thickness in the first direction. The second thickness is greater than the first and third thicknesses. The fifth semiconductor layer is connected to the second to fourth semiconductor layers.

Abstract: A semiconductor device of embodiments includes a first gate electrode, a second gate electrode, a third gate electrode extending in a first direction, and a gate wiring line extending in a second direction crossing the first direction and to which the first to the third gate electrodes are connected. Assuming distance between the first and the second gate electrode in the second direction in a first region is S1, distance between the first and the second gate electrode in the second direction in a second region closer to the gate wiring line than the first region is S2, distance between the second and the third gate electrode in the second direction in the first region is S3, and distance between the second and the third gate electrode in the second direction in the second region is S4, following Expressions are satisfied, S1<S3, S1<S2, S3>S4.

Abstract: A semiconductor device includes a semiconductor part including a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type. The second semiconductor layer is provided in the first semiconductor layer. The semiconductor part includes first and second interfaces of the first semiconductor layer and the second semiconductor layer. The first interface intersects the second interface. The second semiconductor layer includes a plurality of sub-layers stacked in a direction orthogonal to the first interface. The second interface includes interfaces of the sub-layers of the second semiconductor layer and the first semiconductor layer. The second interface extending in a second direction inclined with respect to a first direction orthogonal to the first interface.

Abstract: A semiconductor device includes first, second and control electrodes, and a semiconductor part between the first and second electrode. The semiconductor part includes first and third layers of a first conductive type, and second, fourth and fifth layers of a second conductive type. The first layer extends between the first and second electrodes. The second layer is provided between the first layer and the second electrode. The third layer is partially provided on the second layer between the second layer and the second electrode. A first fourth layer and a second fourth layer are provided in the first layer. The fifth layer is provided between the first layer and the second layer. The fifth layer is partially provided on the first layer between the first fourth layer and the second fourth layer. The control electrode is provided between the second electrode and each of the fourth layers.