Patents by Inventor Shusaku Kido

Shusaku Kido has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20030041971
    Abstract: A substrate processing system which sprays exposure process gas onto a substrate disposed within a chamber. The substrate processing system is used, for example, for performing an exposure process of an organic film formed on a substrate in a gas atmosphere obtained by vaporizing an organic solvent solution for dissolving and reflowing an organic film. The substrate processing system comprises: the chamber having at least one gas inlet and at least one gas outlets; a gas introducing means which introduces the exposure process gas into the chamber via the gas inlet; and a gas distributing means. The gas distributing means separates an inner space of the chamber into a first space into which the exposure process gas is introduced via the gas inlet and a second space in which the substrate is disposed.
    Type: Application
    Filed: August 23, 2002
    Publication date: March 6, 2003
    Applicant: NEC Corporation
    Inventors: Shusaku Kido, Yoshihide Iio, Masaki Ikeda
  • Publication number: 20030013221
    Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.
    Type: Application
    Filed: September 12, 2002
    Publication date: January 16, 2003
    Inventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi
  • Publication number: 20030012869
    Abstract: An organic film is coated on an insulating substrate and an organic solvent is infiltrated into the organic film to cause dissolution of the organic film to flatten the organic film. Thereafter, the flattened organic film is subjected to heat treatment at temperatures of 100 to 180° C. to evaporate the organic solvent included in the organic film. Evaporating the organic solvent included in the organic film at relatively low temperatures, i.e., temperatures of 100 to 180° C. makes it possible to reduce thermal stress on a wiring layer covered by the organic film and provide flatness of the surface of the insulating substrate.
    Type: Application
    Filed: July 8, 2002
    Publication date: January 16, 2003
    Applicant: NEC CORPORATION
    Inventor: Shusaku Kido
  • Publication number: 20020187573
    Abstract: A method of deforming a pattern comprising the steps of: forming, over a substrate, a layered-structure with an upper surface including at least one selected region and at least a re-flow stopper groove, wherein the re-flow stopper groove extends outside the selected region and separate from the selected region; selectively forming at least one pattern on the selected region; and causing a re-flow of the pattern, wherein a part of an outwardly re-flowed pattern is flowed into the re-flow stopper groove, and then an outward re-flow of the pattern is restricted by the re-flow stopper groove extending outside of the pattern, thereby to form a deformed pattern with at least an outside edge part defined by an outside edge of the re-flow stopper groove.
    Type: Application
    Filed: July 24, 2002
    Publication date: December 12, 2002
    Applicant: NEC CORPORATION
    Inventor: Shusaku Kido
  • Publication number: 20020123241
    Abstract: A photosensitive film pattern formed through only one photolithography step and having difference in film thickness is formed utilizing difference in amount of light emitted to the photosensitive film on a film to be etched, and the film to be etched is etched two times to form plural patterns therein by utilizing the difference in film thickness of the photosensitive film pattern, thereby reducing the number of whole manufacturing process steps. In this case, at the time of etching and removing thin photosensitive film out of the photosensitive film pattern, the upper layer of thick photosensitive film out of the photosensitive film pattern has already been modified to a silica film nearly free from being affected by dry-etching, and therefore, the thick photosensitive film can maintain its planar shape nearly equal to that of the thick photosensitive film before etching the thin photosensitive film.
    Type: Application
    Filed: February 25, 2002
    Publication date: September 5, 2002
    Applicant: NEC CORPORATION
    Inventor: Shusaku Kido
  • Publication number: 20020119586
    Abstract: A process for forming a pattern contains steps of: forming a first mask pattern on a film to be etched on a substrate; forming a first pattern of the film to be etched by using the first mask pattern as a mask; forming a second mask pattern having a plane shape different from that of the first mask pattern by deforming the first mask pattern; and forming a second pattern of the film to be etched different from the first pattern by using the second mask pattern. By applying the process for forming a pattern, for example, to the formation of a semiconductor layer and source and drain electrodes of a TFT substrate of a liquid crystal display apparatus, the above-stated formation requiring two photoresist process steps in a conventional manufacturing method of a liquid crystal display apparatus can be carried out by only one process step, thereby reducing manufacturing cost thereof.
    Type: Application
    Filed: February 15, 2002
    Publication date: August 29, 2002
    Applicant: NEC CORPORATION
    Inventor: Shusaku Kido
  • Patent number: 6380006
    Abstract: To obtain a reflowed resist mask 13, organic solvent is infiltrated into a resist mask 7 to reflow the resist mask 7 after first etching using the resist mask 7. As the volume of the resist mask is not reduced, heating is hardly required and in addition, the large viscosity is reduced, the area coated with the resist mask can be increased by a simple method before second etching, in addition, adhesion can be made satisfactory and as a result, wiring 11 having tapered structure can be easily formed.
    Type: Grant
    Filed: June 12, 2001
    Date of Patent: April 30, 2002
    Assignee: NEC Corporation
    Inventor: Shusaku Kido
  • Publication number: 20020009890
    Abstract: The photolithography processes for connecting the first conductive film pattern, which is a lower layer such as a gate electrode of a TFT, to a second conductive film pattern, which is an upper layer such as a source/drain electrode of a TFT are reduced by utilizing laminated films and a resist pattern formed thereon having different film thicknesses. Laminated films constituting the source/drain electrode are formed by depositing films on an insulating substrate on which the first conductive film pattern is formed, and the resist pattern is formed on the top layer of the laminated films, and then utilizing the film thickness difference of the resist pattern and the film composition of the laminated films, the short circuited wiring between the gate electrode and the source/drain electrode for an Electro-Static-Discharge protection circuit of the active matrix substrate can be formed by less photolithography processes than that in the manufacturing of the conventional active matrix substrate.
    Type: Application
    Filed: July 11, 2001
    Publication date: January 24, 2002
    Applicant: NEC Corporation
    Inventors: Takasuke Hayase, Hiroaki Tanaka, Shusaku Kido, Toshihiko Harano
  • Publication number: 20020001777
    Abstract: After films composing a TFT are laminated on an insulating substrate, a resist mask having a plurality of regions with different film thicknesses is formed by patterning on the uppermost layer of the above-stated films. Then, a conductor film is formed by patterning with a liftoff method using this resist mask. Alternatively, using other resist mask having a plurality of regions with different film thicknesses as an etching mask, a plurality of material films among the laminated material films are processed in succession. By the above-stated new pattern forming method and the processing method, the liquid crystal display device, which has been manufactured by five photolitho processes in a conventional art is manufactured by two or three photolitho processes.
    Type: Application
    Filed: June 28, 2001
    Publication date: January 3, 2002
    Applicant: NEC Corporation
    Inventor: Shusaku Kido
  • Publication number: 20020000557
    Abstract: A method of deforming a pattern comprising the steps of forming, over a substrate, a layered-structure with an upper surface including at least one selected region and at least a re-flow stopper groove, wherein the re-flow stopper groove extends outside the selected region and separate from the selected region; selectively forming at least one pattern on the selected region; and causing a re-flow of the pattern, wherein a part of an outwardly re-flowed pattern is flowed into the re-flow stopper groove, and then an outward re-flow of the pattern is restricted by the re-flow stopper groove extending outside of the pattern, thereby to form a deformed pattern with at least an outside edge part defined by an outside edge of the re-flow stopper groove.
    Type: Application
    Filed: June 26, 2001
    Publication date: January 3, 2002
    Applicant: NEC Corporation
    Inventor: Shusaku Kido
  • Publication number: 20010053570
    Abstract: To obtain a reflowed resist mask 13, organic solvent is infiltrated into a resist mask 7 to reflow the resist mask 7 after first etching using the resist mask 7. As the volume of the resist mask is not reduced, heating is hardly required and in addition, the large viscosity is reduced, the area coated with the resist mask can be increased by a simple method before second etching, in addition, adhesion can be made satisfactory and as a result, wiring 11 having tapered structure can be easily formed.
    Type: Application
    Filed: June 12, 2001
    Publication date: December 20, 2001
    Applicant: NEC Corporation
    Inventor: Shusaku Kido
  • Publication number: 20010010370
    Abstract: An active matrix substrate plate having superior properties is manufactured at high yield using four photolithographic fabrication steps. In step 1, the scanning line and the gate electrode extending from the scanning line are formed in the glass plate. In step 2, the gate insulation layer and the semiconductor layer comprised by amorphous silicon layer and n+ amorphous silicon layer is laminated to provide the semiconductor layer for the TFT section. In step 3, the transparent conductive layer and the metallic layer are laminated, and the signal line, the drain electrode extending from the signal line, the pixel electrode and the source electrode extending from the pixel electrode are formed, and the n+ amorphous silicon layer of the channel gap is removed by etching. In step 4, the protective insulation layer is formed, and the protective insulation layer and the metal layer above the pixel electrode are removed by etching.
    Type: Application
    Filed: December 20, 2000
    Publication date: August 2, 2001
    Applicant: NEC Corporation
    Inventors: Shigeru Kimura, Takahiko Watanabe, Tae Yoshikawa, Hiroyuki Uchida, Shusaku Kido, Shinichi Nakata, Tsutomu Hamada, Hisanobu Shimodouzono, Satoshi Doi, Toshihiko Harano, Akitoshi Maeda, Satoshi Ihida, Hiroaki Tanaka, Takasuke Hayase, Shouichi Kuroha, Hirofumi Ihara, Kazushige Takechi