Patents by Inventor Shyh-Wei Cheng
Shyh-Wei Cheng has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9884758Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.Type: GrantFiled: June 15, 2016Date of Patent: February 6, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shyh-Wei Cheng, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu, Yu-Jui Wu, Ching-Hsiang Hu, Ming-Tsung Chen
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Patent number: 9880192Abstract: A Micro-Electro-Mechanical System (MEMS) device includes a sensing element, and a proof mass over and overlapping at least a portion of the sensing element. The proof mass is configured to be movable toward the sensing element. A protection region is formed between the sensing element and the proof mass. The protection region overlaps a first portion of the sensing element, and does not overlap a second portion of the sensing element, wherein the first and the second portions overlap the proof mass.Type: GrantFiled: January 29, 2015Date of Patent: January 30, 2018Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shyh-Wei Cheng, Yu-Ting Hsu, Hsi-Cheng Hsu, Chih-Yu Wang, Jui-Chun Weng, Che-Jung Chu
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Patent number: 9865609Abstract: A one-time programmable (OTP) memory cell with floating gate shielding is provided. A pair of transistors is arranged on a semiconductor substrate and electrically coupled in series, where the transistors comprise a floating gate. An interconnect structure overlies the pair of transistors. A shield is arranged in the interconnect structure, directly over the floating gate. The shield is configured to block ions in the interconnect structure from moving to the floating gate. A method for manufacturing an OTP memory cell with floating gate shielding is also provided.Type: GrantFiled: January 28, 2016Date of Patent: January 9, 2018Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Hung-Lin Chen, Shyh-Wei Cheng, Che-Jung Chu
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Publication number: 20170330931Abstract: A method for manufacturing a metal-insulator-metal (MIM) capacitor with a top electrode that is free of sidewall damage is provided. A bottom electrode layer is formed with a first material. An inter-electrode dielectric layer is formed over the bottom electrode layer. A top electrode layer is formed over the inter-electrode dielectric layer and without the first material. A first etch is performed into the top electrode layer and the inter-electrode dielectric layer to form a top electrode. A second etch into the bottom electrode layer to form a bottom electrode. The present application is also directed towards a MIM capacitor resulting from performing the method.Type: ApplicationFiled: May 13, 2016Publication date: November 16, 2017Inventors: Shyh-Wei Cheng, Hung-Lin Chen, Jui-Chun Weng, Shiuan-Jeng Lin, Tian Sheng Lin, Yu-Jui Wu, Albion Pan, Bob Sun
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Publication number: 20170221910Abstract: A one-time programmable (OTP) memory cell with floating gate shielding is provided. A pair of transistors is arranged on a semiconductor substrate and electrically coupled in series, where the transistors comprise a floating gate. An interconnect structure overlies the pair of transistors. A shield is arranged in the interconnect structure, directly over the floating gate. The shield is configured to block ions in the interconnect structure from moving to the floating gate.Type: ApplicationFiled: January 28, 2016Publication date: August 3, 2017Inventors: Hung-Lin Chen, Shyh-Wei Cheng, Che-Jung Chu
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Publication number: 20170203962Abstract: The present disclosure relates to a MEMS package having an outgassing element configured to adjust a pressure within a hermetically sealed cavity by inducing outgassing of into the cavity, and an associated method. In some embodiments, the method is performed by forming an outgassing element within a passivation layer over a CMOS substrate and forming an outgassing resistive layer to cover the outgassing element. The outgassing resistive layer is removed from over the outgassing element, and the MEMS substrate is bonded to a front side of the CMOS substrate to enclose a first MEMS device within a first cavity and a second MEMS device within a second cavity. After removing the outgassing resistive layer, the outgassing element releases a gas into the second cavity to increase a second pressure of the second cavity to be greater than a first pressure of the first cavity.Type: ApplicationFiled: June 15, 2016Publication date: July 20, 2017Inventors: Shyh-Wei Cheng, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu, Yu-Jui Wu, Ching-Hsiang Hu, Ming-Tsung Chen
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Publication number: 20170107100Abstract: The present disclosure relates to a MEMs package having a heating element configured to adjust a pressure within a hermetically sealed chamber by inducing out-gassing of into the chamber, and an associated method. In some embodiments, the MEMs package has a CMOS substrate having one or more semiconductor devices arranged within a semiconductor body. A MEMs structure is connected to the CMOS substrate and has a micro-electromechanical (MEMs) device. The CMOS substrate and the MEMs structure form a hermetically sealed chamber abutting the MEMs device. A heating element is electrically coupled to the one or more semiconductor devices and is separated from the hermetically sealed chamber by an out-gassing layer arranged along an interior surface of the hermetically sealed chamber. By operating the heating element to cause the out-gassing layer to release a gas, the pressure of the hermetically sealed chamber can be adjusted after it is formed.Type: ApplicationFiled: June 8, 2016Publication date: April 20, 2017Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Hsin-Yu Chen, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
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Publication number: 20170107097Abstract: The present disclosure relates to micro-electromechanical system (MEMS) package that uses polysilicon inter-tier connections to provide for a low parasitic capacitance in MEM device signals, and a method of formation. In some embodiments, the MEMS package has a CMOS substrate with one or more semiconductor devices arranged within a semiconductor body. A MEMS substrate having an ambulatory element is connected to the CMOS substrate by a conductive bonding structure. The conductive bonding structure is arranged on a front-side of the MEMS substrate at a location laterally offset from the ambulatory element. One or more polysilicon vias extend through the conductive MEMS substrate to the bonding structure. The one or more polysilicon vias are configured to electrically couple the MEMS substrate to the CMOS substrate. By connecting the MEMS substrate to the CMOS substrate using the polysilicon vias, the parasitic capacitance and form factor of the MEMS package are reduced.Type: ApplicationFiled: December 28, 2015Publication date: April 20, 2017Inventors: Shyh-Wei Cheng, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Shiuan-Jeng Lin, Wei-Ding Wu, Ching-Hsiang Hu
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Patent number: 9561954Abstract: A method for forming an integrated circuit having Micro-electromechanical Systems (MEMS) includes forming at least two recesses into a first layer, forming at least two recesses into a second layer, the at least two recesses of the second layer being complementary to the recesses of the first layer. An intermediate layer is bonded onto the second layer, the intermediate layer includes through-holes corresponding to the recesses of the second layer. The first layer is bonded to the intermediate layer such that cavities are formed, the cavities to act as operating environments for MEMS devices. The two cavities have different pressures.Type: GrantFiled: December 19, 2014Date of Patent: February 7, 2017Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shyh-Wei Cheng, Jui-Chun Weng, Hsi-Cheng Hsu, Chih-Yu Wang, Jung-Kuo Tu, Che-Jung Chu, Yu-Ting Hsu
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Patent number: 9527721Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package with an anti-stiction layer, and an associated method of formation. In some embodiments, the MEMS package comprises a device substrate and a CMOS substrate. The device substrate comprises a MEMS device having a moveable or flexible part that is movable or flexible with respect to the device substrate. A surface of the moveable or flexible part is coated by a conformal anti-stiction layer made of polycrystalline silicon. A method for manufacturing the MEMS package is also provided.Type: GrantFiled: May 15, 2015Date of Patent: December 27, 2016Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shyh-Wei Cheng, Chao-Po Lu, Chung-Hsien Hun, Chih-Shan Chen, Chuan-Yi Ko, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
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Publication number: 20160332863Abstract: The present disclosure relates to a microelectromechanical systems (MEMS) package with an anti-stiction layer, and an associated method of formation. In some embodiments, the MEMS package comprises a device substrate and a CMOS substrate. The device substrate comprises a MEMS device having a moveable or flexible part that is movable or flexible with respect to the device substrate. A surface of the moveable or flexible part is coated by a conformal anti-stiction layer made of polycrystalline silicon. A method for manufacturing the MEMS package is also provided.Type: ApplicationFiled: May 15, 2015Publication date: November 17, 2016Inventors: Shyh-Wei Cheng, Chao-Po Lu, Chung-Hsien Hun, Chih-Shan Chen, Chuan-Yi Ko, Chih-Yu Wang, Hsi-Cheng Hsu, Ji-Hong Chiang, Jui-Chun Weng, Wei-Ding Wu
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Publication number: 20160079368Abstract: A metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a source and a drain in the substrate, a gate electrode disposed over the substrate between the source and drain, and a gate dielectric layer disposed between the substrate and the gate electrode. At least a portion of the gate dielectric layer is extended beyond the gate electrode toward at least one of the source or the drain.Type: ApplicationFiled: November 18, 2015Publication date: March 17, 2016Inventors: Shiuan-Jeng Lin, Shyh-Wei Cheng, Che-Jung Chu
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Patent number: 9209298Abstract: A metal-oxide-semiconductor field-effect transistor (MOSFET) includes a substrate, a source and a drain in the substrate, a gate electrode disposed over the substrate between the source and drain, and a gate dielectric layer disposed between the substrate and the gate electrode. At least a portion of the gate dielectric layer is extended beyond the gate electrode toward at least one of the source or the drain.Type: GrantFiled: March 8, 2013Date of Patent: December 8, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shiuan-Jeng Lin, Shyh-Wei Cheng, Che-Jung Chu
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Patent number: 9090452Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a substrate and a MEMS substrate disposed on the substrate. The MEMS substrate includes a movable element, a fixed element and at least a spring connected to the movable element and the fixed element. The MEMS device also includes a polysilicon layer on the movable element.Type: GrantFiled: December 6, 2013Date of Patent: July 28, 2015Assignee: Taiwan Semiconductor Manufacturing Co., Ltd.Inventors: Shyh-Wei Cheng, Jui-Chun Weng, Hsi-Cheng Hsu, Chih-Yu Wang, Chuan-Yi Ko, Ji-Hong Chiang, Chung-Hsien Hung, Hsin-Yu Chen, Chih-Hsien Chen, Yu-Mei Wu, Jong Chen
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Publication number: 20150177273Abstract: A Micro-Electro-Mechanical System (MEMS) device includes a sensing element, and a proof mass over and overlapping at least a portion of the sensing element. The proof mass is configured to be movable toward the sensing element. A protection region is formed between the sensing element and the proof mass. The protection region overlaps a first portion of the sensing element, and does not overlap a second portion of the sensing element, wherein the first and the second portions overlap the proof mass.Type: ApplicationFiled: January 29, 2015Publication date: June 25, 2015Inventors: Shyh-Wei Cheng, Yu-Ting Hsu, Hsi-Cheng Hsu, Chih-Yu Wang, Jui-Chun Weng, Che-Jung Chu
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Publication number: 20150158716Abstract: Embodiments of mechanisms for forming a micro-electro mechanical system (MEMS) device are provided. The MEMS device includes a substrate and a MEMS substrate disposed on the substrate. The MEMS substrate includes a movable element, a fixed element and at least a spring connected to the movable element and the fixed element. The MEMS device also includes a polysilicon layer on the movable element.Type: ApplicationFiled: December 6, 2013Publication date: June 11, 2015Applicant: Taiwan Semiconductor Manufacturing Co., LtdInventors: Shyh-Wei CHENG, Jui-Chun WENG, Hsi-Cheng HSU, Chih-Yu WANG, Chuan-Yi KO, Ji-Hong CHIANG, Chung-Hsien HUNG, Hsin-Yu CHEN, Chih-Hsien CHEN, Yu-Mei WU, Jong CHEN
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Publication number: 20150104895Abstract: A method for forming an integrated circuit having Micro-electromechanical Systems (MEMS) includes forming at least two recesses into a first layer, forming at least two recesses into a second layer, the at least two recesses of the second layer being complementary to the recesses of the first layer. An intermediate layer is bonded onto the second layer, the intermediate layer includes through-holes corresponding to the recesses of the second layer. The first layer is bonded to the intermediate layer such that cavities are formed, the cavities to act as operating environments for MEMS devices. The two cavities have different pressures.Type: ApplicationFiled: December 19, 2014Publication date: April 16, 2015Inventors: Shyh-Wei Cheng, Jui-Chun Jui-Chen, Hsi-Cheng Hsu, Chih-Yu Wang, Jung-Kuo Tu, Che-Jung Chu, Yu-Ting Hsu
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Patent number: 8960003Abstract: A Micro-Electro-Mechanical System (MEMS) device includes a sensing element, and a proof mass over and overlapping at least a portion of the sensing element. The proof mass is configured to be movable toward the sensing element. A protection region is formed between the sensing element and the proof mass. The protection region overlaps a first portion of the sensing element, and does not overlap a second portion of the sensing element, wherein the first and the second portions overlap the proof mass.Type: GrantFiled: January 18, 2012Date of Patent: February 24, 2015Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shyh-Wei Cheng, Yu-Ting Hsu, Hsi-Cheng Hsu, Chih-Yu Wang, Jui-Chun Weng, Che-Jung Chu
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Patent number: 8916943Abstract: An integrated circuit device includes a first layer comprising at least two partial cavities, an intermediate layer bonded to the first layer, the intermediate layer formed to support at least two Micro-electromechanical System (MEMS) devices, and a second layer bonded to the intermediate layer, the second layer comprising at least two partial cavities to complete the at least two partial cavities of the first layer through the intermediate layer to form at least two sealed full cavities. The at least two full cavities have different pressures within.Type: GrantFiled: March 1, 2013Date of Patent: December 23, 2014Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.Inventors: Shyh-Wei Cheng, Jui-Chun Weng, Hsi-Cheng Hsu, Chih-Yu Wang, Jung-Kuo Tu, Che-Jung Chu, Yu-Ting Hsu
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Publication number: 20140246708Abstract: An integrated circuit device includes a first layer comprising at least two partial cavities, an intermediate layer bonded to the first layer, the intermediate layer formed to support at least two Micro-electromechanical System (MEMS) devices, and a second layer bonded to the intermediate layer, the second layer comprising at least two partial cavities to complete the at least two partial cavities of the first layer through the intermediate layer to form at least two sealed full cavities. The at least two full cavities have different pressures within.Type: ApplicationFiled: March 1, 2013Publication date: September 4, 2014Inventors: Shyh-Wei Cheng, Jui-Chun Weng, Hsi-Cheng Hsu, Chih-Yu Wang, Jung-Kuo Tu, Che-Jung Chu, Yu-Ting Hsu