Abstract: An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include first circuitry having at least a first emitter and a first detector, second circuitry having at least a dual-purpose component, an isolation material configured to electrically isolate the first circuitry from the second circuitry, and switching circuitry adapted to connect the dual-purpose component to emit a first signal for detection by the first detector in a first configuration, and to receive a second signal from the first emitter in a second configuration.

Abstract: An isolation system and isolation device are disclosed. An illustrative isolation device is disclosed to include first circuitry having at least a first emitter and a first detector, second circuitry having at least a dual-purpose component, an isolation material configured to electrically isolate the first circuitry from the second circuitry, and switching circuitry adapted to connect the dual-purpose component to emit a first signal for detection by the first detector in a first configuration, and to receive a second signal from the first emitter in a second configuration.

Abstract: An optocoupler having optical lens layer is disclosed. The optocoupler may comprise an optical emitter, an optical receiver, an isolation layer, a lens layer and a substantially transparent encapsulant. The lens layer may be integrally formed within the optical receiver. Alternatively, the lens layer may be formed integrally with the isolation layer, or the lens layer may be an optical film attached on the optical receiver. The substantially transparent encapsulant may encapsulate at least partially the optical emitter, the optical receiver and the isolation layer. The isolation layer may be inserted to the substantially transparent encapsulant, making the substantially transparent encapsulant into two compartments. In another embodiment, an electronic system having optocoupler is disclosed.

Abstract: An opto-isolator with a correction circuit is disclosed. The correction circuit is configured to make adjustments for degradation of the light source of the opto-isolator. The correction circuit may comprise a photodetector for detecting degradation of the light source of the opto-isolator. When the light source degrades below a predetermined level, the correction circuit may be configured to make adjustments.

Abstract: An opto-isolator with a compensation circuit is disclosed. The compensation circuit may be configured to compensate degradation of the light source of the opto-isolator. The compensation circuit may comprise a circuit for counting an extended use of the isolator. When the count value exceeds a predetermined count value, the compensation circuit may be configured to compensate the degradation of the light source by adjusting the driver of the light source. In another embodiment, an electrical control system having such opto-isolator is illustrated.

Abstract: An opto-isolator with a compensation circuit is disclosed. The compensation circuit may be configured to compensate degradation of the light source of the opto-isolator. The compensation circuit may comprise a circuit for counting an extended use of the isolator. When the count value exceeds a predetermined count value, the compensation circuit may be configured to compensate the degradation of the light source by adjusting the driver of the light source. In another embodiment, an electrical control system having such opto-isolator is illustrated.

Abstract: An optocoupler having optical lens layer is disclosed. The optocoupler may comprise an optical emitter, an optical receiver, an isolation layer, a lens layer and a substantially transparent encapsulant. The lens layer may be integrally formed within the optical receiver. Alternatively, the lens layer may be formed integrally with the isolation layer, or the lens layer may be an optical film attached on the optical receiver. The substantially transparent encapsulant may encapsulate at least partially the optical emitter, the optical receiver and the isolation layer. The isolation layer may be inserted to the substantially transparent encapsulant, making the substantially transparent encapsulant into two compartments. In another embodiment, an electronic system having optocoupler is disclosed.

Abstract: An opto-isolator with a correction circuit is disclosed. The correction circuit is configured to make adjustments for degradation of the light source of the opto-isolator. The correction circuit may comprise a photodetector for detecting degradation of the light source of the opto-isolator. When the light source degrades below a predetermined level, the correction circuit may be configured to make adjustments.

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract: In one embodiment, a method is provided. The method comprises filling a microvia formed in a bond pad with solder paste comprising solder balls of the first size; and coating the bond pad with solder paste comprising solder balls of the second size, wherein the second size is greater than the first size.

Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.

Abstract: An apparatus and system, as well as fabrication methods therefor, may include a substrate coupled to a first material and a second material. The first and second materials may comprise adjacent metals, and may have different coefficients of thermal expansion sufficient to reduce the amount of substrate warp that can occur due to heating and cooling.

Abstract: In one embodiment, a method is provided. The method comprises filling a microvia formed in a bond pad with solder paste comprising solder balls of the first size; and coating the bond pad with solder paste comprising solder balls of the second size, wherein the second size is greater than the first size.

Abstract: A printed circuit board includes a group of pads suitable to be soldered to a respective group of solder-balls of a device. Each pad of the group has a crack initiation point on its perimeter at a location where cracks in a solder-ball are anticipated to start after that solder-ball is soldered to that pad. For a pad of that group having a microvia located therein, a center of that microvia is located farther than a center of that pad from its crack initiation point. For a pad of that group having a trace merging along a portion of its perimeter, that portion does not include a vicinity of that crack initiation point.

Abstract: Apparatuses and associated methods to improve integrated circuit packaging are generally described. More specifically, apparatuses and associated methods to improve solder joint reliability are described. In this regard, according to one example embodiment, one or more strengthening pin(s) are coupled to the periphery of a package substrate, the strengthening pin(s) capable of coupling to a circuit board.

Abstract: A method and apparatus is provided that pertains to resisting crack initiation and propagation in electrical interconnections between components and substrates in ball grid array microelectronic packages. A hybrid of dielectric defined and non-dielectric defined electrical interconnects reduces the potential for electrical interconnection failure without having to control the dielectric defined interconnect ratio of substrates. In addition selective orientation of the dielectric defined edge portion of the electrical interconnect away from the point where cracks initiate resists crack propagation and component failure.

Abstract: A method of manufacturing an opto-coupler includes disposing an insulating layer on a first die and disposing an isolation layer on the insulating layer. The method further includes disposing a securing layer on the isolation layer and disposing a second die on the securing layer.

Abstract: An apparatus for discovering computing services architecture and developing patterns of computing services and method therefor are disclosed. The apparatus, according to an embodiment of the invention, provides a graphical user interface for displaying a deployment plan of deployed computing services. Components in the deployment plan are interconnected by links indicating dependency relationships between the components. Each component and link is assigned a confidence value, which is based on a calculated weight of the properties of each component. The apparatus further provides editing tools for manipulating the components in the deployment plan as well as for creating and managing patterns.