Patents by Inventor Siew Yong Chui
Siew Yong Chui has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 9887543Abstract: Aspects of the disclosure provide a circuit that includes a switch, a current path circuit and a control circuit. The switch is turned on/off to direct a power supply with a periodic varying voltage to the current path circuit. The current path circuit is coupled with the switch in series to provide a discharge current path to the power supply. The control circuit is configured to detect a time duration during which the periodic varying voltage decreases, and turn on the switch during the time duration to provide the discharge current path to the power supply.Type: GrantFiled: September 2, 2015Date of Patent: February 6, 2018Assignee: Marvell International Ltd.Inventors: Siew Yong Chui, Pantas Sutardja
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Patent number: 9502957Abstract: A system including a switch and a control circuit. The switch is configured to receive a first voltage. The control circuit is configured to, during a rising portion of a half cycle of the first voltage, (i) turn on the switch in response to the first voltage reaching a first value, and (ii) turn off the switch in response to the first voltage reaching a second value, where the second value is greater than the first value. The control circuit is further configured to, during a falling portion of the half cycle of the first voltage, (i) turn on the switch in response to the first voltage reaching the second value, and (ii) turn off the switch in response to the first voltage reaching the first value.Type: GrantFiled: May 29, 2014Date of Patent: November 22, 2016Assignee: Marvell World Trade LTD.Inventors: Ravishanker Krishnamoorthy, Radu Pitigoi-Aron, Siew Yong Chui
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Patent number: 9362816Abstract: Aspects of the disclosure provide a circuit. The circuit includes a depletion mode transistor coupled to a power supply and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. The current path has a first resistance during a first stage, such as when the circuit initially receives power, and has a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level.Type: GrantFiled: July 25, 2014Date of Patent: June 7, 2016Assignee: Marvell World Trade Ltd.Inventors: Siew Yong Chui, Jun Li
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Patent number: 9357623Abstract: Aspects of the disclosure provide a circuit. The circuit includes a transistor configured to control energy entering the circuit from a power supply, a capacitor coupled with the transistor to store the energy that enters the circuit, and a protection circuit configured to counteract a voltage change of the transistor that is caused by a step voltage change in the power supply. In an embodiment, the protection circuit operates independent of the stored energy on the capacitor.Type: GrantFiled: July 25, 2012Date of Patent: May 31, 2016Assignee: Marvell World Trade Ltd.Inventor: Siew Yong Chui
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Multi-converter system including a power distribution balancing circuit and operating method thereof
Patent number: 9343957Abstract: A multi-converter system includes a first converter configured to receive an input voltage and output a first PWM switching signal based on the input voltage. A power distribution balancing circuit is configured to detect a frequency of the first PWM switching signal and generate a control signal based on the frequency of the first PWM switching signal. A second converter is configured to receive the input voltage and output a second PWM switching signal in response to the control signal. An output voltage node is configured to output an output voltage based on the first and second PWM switching signals.Type: GrantFiled: January 20, 2014Date of Patent: May 17, 2016Assignee: MARVELL INTERNATIONAL LTD.Inventors: Siew Yong Chui, Jun Li -
Patent number: 9258863Abstract: Aspects of the disclosure provide a circuit. The circuit includes a control circuit and a return path circuit. The control circuit is configured to operate in response to a first conduction angle of a dimmer coupled to the circuit. The first conduction angle is adjusted to control an output power to a first device. The dimmer has a second conduction angle that is independent of the control of the output power to the first device. The return path circuit is configured to provide a return path to enable providing power to a second device in response to the second conduction angle.Type: GrantFiled: July 25, 2012Date of Patent: February 9, 2016Assignee: Marvell World Trade Ltd.Inventors: Ravishanker Krishnamoorthy, Siew Yong Chui, Jun Li
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Patent number: 9246379Abstract: Aspects of the disclosure provide a circuit that can include a depletion mode transistor coupled to a power source and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. Further, a gate terminal of the depletion mode transistor is coupled to a clamping path that includes a diode and a switch that connected in series. The clamping path clamps the voltage at the gate terminal of the depletion mode transistor to the capacitor. The clamping and the current paths respectively have a first resistance during a first stage, such as when the circuit initially receives power, and have a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level.Type: GrantFiled: October 14, 2013Date of Patent: January 26, 2016Assignee: Marvell International Ltd.Inventors: Siew Yong Chui, Tong Wei Lian
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Publication number: 20150187754Abstract: An integrated circuit including a well region, a plurality of semiconductor regions implanted in the well region, and a plurality of polysilicon regions arranged on each of the plurality of semiconductor regions. The well region has a first doping level. Each of the plurality of semiconductor regions has a second doping level. The second doping level is greater than the first doping level. The polysilicon regions are respectively connected directly to the plurality of semiconductor regions.Type: ApplicationFiled: March 16, 2015Publication date: July 2, 2015Inventors: Sehat Sutardja, Ravishanker Krishnamoorthy, Siew Yong Chui
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Patent number: 8987949Abstract: A linear regulator includes a first drive voltage output to drive an analog load, a second drive voltage output to drive a digital load, and a third output to provide a clean source of current. Circuit elements that produce the respective drive voltages may be isolated from each other. In addition, local feedback may be included to compensate for wide swings in circuit loading conditions in the analog load and in the digital load.Type: GrantFiled: August 26, 2011Date of Patent: March 24, 2015Assignee: Marvell International Ltd.Inventor: Siew Yong Chui
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Patent number: 8981484Abstract: An integrated circuit (IC) including a well region of the IC having a first doping level and a plurality of semiconductor regions implanted in the well region. Each of the plurality of semiconductor regions has a second doping level. The second doping level is greater than the first doping level. A plurality of polysilicon regions are arranged on the plurality of semiconductor regions. The polysilicon regions are respectively connected to the semiconductor regions. The plurality of semiconductor regions is a drain of a metal-oxide semiconductor field-effect transistor (MOSFET).Type: GrantFiled: May 9, 2012Date of Patent: March 17, 2015Assignee: Marvell World Trade Ltd.Inventors: Sehat Sutardja, Ravishanker Krishnamoorthy, Siew Yong Chui
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Publication number: 20140334200Abstract: Aspects of the disclosure provide a circuit. The circuit includes a depletion mode transistor coupled to a power supply and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. The current path has a first resistance during a first stage, such as when the circuit initially receives power, and has a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level.Type: ApplicationFiled: July 25, 2014Publication date: November 13, 2014Applicant: Marvell World Trade Ltd.Inventors: Siew Yong Chui, Jun Li
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Publication number: 20140268937Abstract: A system including a switch and a control circuit. The switch is configured to receive a first voltage. The control circuit is configured to, during a rising portion of a half cycle of the first voltage, (i) turn on the switch in response to the first voltage reaching a first value, and (ii) turn off the switch in response to the first voltage reaching a second value, where the second value is greater than the first value. The control circuit is further configured to, during a falling portion of the half cycle of the first voltage, (i) turn on the switch in response to the first voltage reaching the second value, and (ii) turn off the switch in response to the first voltage reaching the first value.Type: ApplicationFiled: May 29, 2014Publication date: September 18, 2014Applicant: Marvell World Trade LTD.Inventors: Ravishanker Krishnamoorthy, Radu Pitigoi-Aron, Siew Yong Chui
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Patent number: 8797012Abstract: In one embodiment, an apparatus includes output voltage comparison circuitry that compares an output voltage of a regulator and a reference voltage and outputs an output voltage comparison signal based on the comparison. Slope detection circuitry detects a slope of the output voltage and outputs a slope comparison signal based on the slope detected. Duty cycle determination circuitry receives the output voltage comparison signal and the slope comparison signal and outputs a pre-driver signal having a duty cycle based on the output voltage comparison signal and the slope comparison signal. The pre-driver signal is used to regulate the output voltage of the voltage regulator.Type: GrantFiled: January 18, 2013Date of Patent: August 5, 2014Assignee: Marvell International Ltd.Inventors: Siew Yong Chui, Rudy Kurniawan, Jye Sheng Hong
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Patent number: 8791738Abstract: Aspects of the disclosure provide a circuit. The circuit includes a depletion mode transistor coupled to a power supply and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. The current path has a first resistance during a first stage, such as when the circuit initially receives power, and has a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level.Type: GrantFiled: July 25, 2012Date of Patent: July 29, 2014Assignee: Marvell World Trade Ltd.Inventors: Siew Yong Chui, Jun Li
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Patent number: 8773110Abstract: Aspects of the disclosure provide method and apparatus for detecting attributes of an input power supply. The method includes receiving a first signal generated based on a second signal that is predictive. The first signal includes a portion that substantially corresponds to the second signal. Further, the method includes detecting attributes of the portion of the first signal that substantially corresponds to the second signal, and determining attributes of the second signal based on the attributes of the portion of the first signal that substantially corresponds to the second signal.Type: GrantFiled: July 26, 2011Date of Patent: July 8, 2014Assignee: Marvell World Trade Ltd.Inventors: Siew Yong Chui, Rajesh Tiruvuru
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Patent number: 8742735Abstract: A system including a power transistor configured to receive an alternating current (AC) line voltage and a control circuit. During a rising portion of a half cycle of the AC line voltage, the control circuit is configured to turn on the power transistor when the AC line voltage reaches a first value and turn off the power transistor when the AC line voltage reaches a second value. The second value is greater than the first value. During a falling portion of the half cycle, the control circuit is configured to turn on the power transistor when the AC line voltage reaches the second value and turn off the power transistor when the AC line voltage reaches the first value.Type: GrantFiled: April 18, 2012Date of Patent: June 3, 2014Assignee: Marvell World Trade Ltd.Inventors: Ravishanker Krishnamoorthy, Radu Pitigoi-Aron, Siew Yong Chui
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Patent number: 8724255Abstract: The present disclosure includes systems and techniques relating to control of storage device, such as disk drives. A described technique includes controlling a motor to actuate a head within a storage device, the motor being associated with first and second states of electric current, where a duration of the first state is longer than a duration of the second state. Controlling the motor can include using both a first mode and a second mode to control current to the motor. The technique further includes detecting an instance of the first state, and initiating, when the instance of the first state is detected, a switch from the first mode to the second mode to control the motor. The switch can be based on a condition of operation with respect to the storage device. A start-up time of the second mode is shorter than the duration of the first state.Type: GrantFiled: December 21, 2012Date of Patent: May 13, 2014Assignee: Marvell International Ltd.Inventors: Jye Sheng Hong, Siew Yong Chui
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Patent number: 8593096Abstract: Analog control of the pulse width used to control the speed of a voice coil motor may be implemented using a “constant-current-charging-capacitor” configuration where the time needed to charge the capacitor is directly related to how far the actual motor speed is from the target speed. The BEMF voltage, indicative of motor speed, is sampled, and then stored in a storage capacitor, which is allowed to charge/discharge to a target voltage level. The time required to charge/discharge the capacitor to the target voltage is directly proportional to the difference between the BEMF voltage and the target voltage, and may be used directly as the pulse width (i.e., the charging time) in the PWM velocity control system. To avoid larger capacitors, a pulse multiplier circuit can be added, allowing charging/discharging the sampled voltage to the target voltage to be repeated by a number, N, of times.Type: GrantFiled: September 10, 2012Date of Patent: November 26, 2013Assignee: Marvell International Ltd.Inventors: Jye Sheng Hong, Siew Yong Chui
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Publication number: 20130043912Abstract: Aspects of the disclosure provide a circuit. The circuit includes a depletion mode transistor coupled to a power supply and a current path coupled with the depletion mode transistor in series to provide a current to charge a capacitor. The current path has a first resistance during a first stage, such as when the circuit initially receives power, and has a second resistance during a second stage when the capacitor is charged to have a predetermined voltage level.Type: ApplicationFiled: July 25, 2012Publication date: February 21, 2013Inventors: Siew Yong CHUI, Jun Li
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Publication number: 20130043726Abstract: Aspects of the disclosure provide a circuit. The circuit includes a control circuit and a return path circuit. The control circuit is configured to operate in response to a first conduction angle of a dimmer coupled to the circuit. The first conduction angle is adjusted to control an output power to a first device. The dimmer has a second conduction angle that is independent of the control of the output power to the first device. The return path circuit is configured to provide a return path to enable providing power to a second device in response to the second conduction angle.Type: ApplicationFiled: July 25, 2012Publication date: February 21, 2013Inventors: Ravishanker KRISHNAMOORTHY, Siew Yong Chui, Jun Li