Patents by Inventor Sih-Han Li

Sih-Han Li has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20180238822
    Abstract: A gas sensing apparatus including a gas sensor, a gas determining circuit and a gas database is provided. The gas sensor includes at least two nanowire sensors. The gas sensor is configured to sense multiple gases and output a plurality of sensing signals. The gas determining circuit is coupled to the gas sensor. The gas determining circuit is configured to receive the sensing signals and determine types of the gases according to reference data and the sensing signals. The gas database is coupled to the gas determining circuit. The gas database stores the reference data and outputs the reference data to the gas determining circuit. Each of the nanowire sensors includes at least one nanowire. Structural properties of the nanowires are different.
    Type: Application
    Filed: April 18, 2018
    Publication date: August 23, 2018
    Applicant: Industrial Technology Research Institute
    Inventors: Kuan-Wei Chen, Chih-Sheng Lin, Erh-Hao Chen, Sih-Han Li, Shyh-Shyuan Sheu
  • Publication number: 20180136010
    Abstract: A sensor interface circuit and sensor output adjusting method are provided. The sensor interface circuit includes a processor and a gain control circuit. The processor obtains information of a linear region of a sensor to set a configuration corresponding to the sensor. The gain control circuit is coupled to the processor, performs a return-to-zero operation for a maximum electronic value and a minimum electronic value corresponding to the linear region and performs a full-scale operation for a slope of the linear region according to the maximum input range of an analog-to-digital converter which is a subsequent-stage circuit of the sensor interface circuit.
    Type: Application
    Filed: May 26, 2017
    Publication date: May 17, 2018
    Inventors: Sih-Han Li, Shyh-Shyuan Sheu, Ya-Wen Yang, Chih-Ping Cheng, Chih-Sheng Lin
  • Publication number: 20170122892
    Abstract: A sensor device and a method of manufacturing the same are provided. The sensor device includes a substrate, a plurality of sensing electrodes, a humidity nanowire sensor, a temperature nanowire sensor, and a gas nanowire sensor. The sensing electrodes are formed on the substrate, and the humidity, the temperature and the gas nanowire sensors are also on the substrate. The humidity nanowire sensor includes an exposed first nanowire sensing region, the temperature nanowire sensor includes a second nanowire sensing region, and the gas nanowire sensor includes a third nanowire sensing region.
    Type: Application
    Filed: December 8, 2015
    Publication date: May 4, 2017
    Inventors: Sih-Han Li, Chih-Sheng Lin, Kuan-Wei Chen, Erh-Hao Chen, Shyh-Shyuan Sheu
  • Publication number: 20170115248
    Abstract: A gas sensing apparatus including a gas sensor, a gas determining circuit and a gas database is provided. The gas sensor includes at least two nanowire sensors. The gas sensor is configured to sense multiple gases and output a plurality of sensing signals. The gas determining circuit is coupled to the gas sensor. The gas determining circuit is configured to receive the sensing signals and determine types of the gases according to reference data and the sensing signals. The gas database is coupled to the gas determining circuit. The gas database stores the reference data and outputs the reference data to the gas determining circuit. Each of the nanowire sensors includes at least one nanowire. Structural properties of the nanowires are different.
    Type: Application
    Filed: December 3, 2015
    Publication date: April 27, 2017
    Inventors: Chih-Sheng Lin, Erh-Hao Chen, Sih-Han Li, Kuan-Wei Chen, Shyh-Shyuan Sheu
  • Patent number: 9378785
    Abstract: A resistive random-access memory device includes a memory array, a read circuit, a write-back logic circuit and a write-back circuit. The read circuit reads the data stored in a selected memory cell and accordingly generates a first control signal. The write-back logic circuit generates a write-back control signal according to the first control signal and a second control signal. The write-back circuit performs a write-back operation on the selected memory cell according to the write-back control signal and a write-back voltage, so as to change a resistance state of the selected memory cell from a low resistance state to a high resistance state, and generates the second control signal according to the resistance state of the selected memory cell.
    Type: Grant
    Filed: August 22, 2013
    Date of Patent: June 28, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Chih-He Lin, Sih-Han Li, Wen-Pin Lin, Shyh-Shyuan Sheu
  • Patent number: 9368271
    Abstract: First and second paths of the primary-coil of the transformer are located at different sides of the symmetry-line. First terminals of the first and second paths are first and second ports of the primary-coil. Second terminals of the first and second paths are connected to each other. Two partial paths of the first path are connected to each other by TSV. Two partial paths of the second path are connected to each other by TSV. Third and fourth paths of the secondary-coil of the transformer are located on different sides of the symmetry-line. First terminals of the third and fourth paths are first and second ports of the secondary-coil. Second terminals of the third and fourth paths are connected to each other. Two partial paths of the third path are connected to each other by TSV. Two partial paths of the fourth path are connected to each other by TSV.
    Type: Grant
    Filed: April 22, 2015
    Date of Patent: June 14, 2016
    Assignee: Industrial Technology Research Institute
    Inventors: Sih-Han Li, Chih-Sheng Lin
  • Publication number: 20160012958
    Abstract: First and second paths of the primary-coil of the transformer are located at different sides of the symmetry-line. First terminals of the first and second paths are first and second ports of the primary-coil. Second terminals of the first and second paths are connected to each other. Two partial paths of the first path are connected to each other by TSV. Two partial paths of the second path are connected to each other by TSV. Third and fourth paths of the secondary-coil of the transformer are located on different sides of the symmetry-line. First terminals of the third and fourth paths are first and second ports of the secondary-coil. Second terminals of the third and fourth paths are connected to each other. Two partial paths of the third path are connected to each other by TSV. Two partial paths of the fourth path are connected to each other by TSV.
    Type: Application
    Filed: April 22, 2015
    Publication date: January 14, 2016
    Inventors: Sih-Han Li, Chih-Sheng Lin
  • Patent number: 9076771
    Abstract: A varactor is provided. A substrate includes a first surface, a second surface and a first opening and a second opening in the substrate. A conductive material is filling the first and second openings, to form a first through-wafer via (TWV) and a second through-wafer via. A first capacitor is coupled between the first through-wafer via and a first terminal. A second capacitor is coupled between the second through-wafer via and a second terminal. A capacitance of a depletion-region capacitor between the first through-wafer via and the second through-wafer via is determined by a bias voltage applied to the first through-wafer via and the second through-wafer via.
    Type: Grant
    Filed: August 23, 2013
    Date of Patent: July 7, 2015
    Assignee: Industrial Technology Research Institute
    Inventors: Sih-Han Li, Pei-Ling Tseng, Zhe-Hui Lin, Chih-Sheng Lin
  • Publication number: 20140184346
    Abstract: A voltage-controlled oscillator (VCO) is provided. The VCO includes an oscillator unit disposed on a substrate, and a varactor unit. The varactor unit is coupled to the oscillator unit to form a VCO loop. The varactor unit includes a varactor and at least one control terminal. The varactor is disposed in the substrate, and includes at least two through-silicon via (TSV) structures. The at least one control terminal renders the varactor unit to be biased to change a capacitance value of the varactor.
    Type: Application
    Filed: June 11, 2013
    Publication date: July 3, 2014
    Inventors: Sih-Han LI, Chih-Sheng LIN, Hsin-Chi LAI, Keng-Li SU
  • Publication number: 20140175606
    Abstract: A varactor is provided. A substrate includes a first surface, a second surface and a first opening and a second opening in the substrate. A conductive material is filling the first and second openings, to form a first through-wafer via (TWV) and a second through-wafer via. A first capacitor is coupled between the first through-wafer via and a first terminal. A second capacitor is coupled between the second through-wafer via and a second terminal. A capacitance of a depletion-region capacitor between the first through-wafer via and the second through-wafer via is determined by a bias voltage applied to the first through-wafer via and the second through-wafer via.
    Type: Application
    Filed: August 23, 2013
    Publication date: June 26, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Sih-Han Li, Pei-Ling Tseng, Zhe-Hui Lin, Chih-Sheng Lin
  • Publication number: 20140115243
    Abstract: A resistive random-access memory device includes a memory array, a read circuit, a write-back logic circuit and a write-back circuit. The read circuit reads the data stored in a selected memory cell and accordingly generates a first control signal. The write-back logic circuit generates a write-back control signal according to the first control signal and a second control signal. The write-back circuit performs a write-back operation on the selected memory cell according to the write-back control signal and a write-back voltage, so as to change a resistance state of the selected memory cell from a low resistance state to a high resistance state, and generates the second control signal according to the resistance state of the selected memory cell.
    Type: Application
    Filed: August 22, 2013
    Publication date: April 24, 2014
    Applicant: INDUSTRIAL TECHNOLOGY RESEARCH INSTITUTE
    Inventors: Chih-He Lin, Sih-Han Li, Wen-Pin Lin, Shyh-Shyuan Sheu