Abstract: A shift register unit and a method of driving the same, a gate driving circuit and a display device are provided. The first pull-up circuit of the shift register is configured to output a signal of the first clock signal end to the first signal output end under a control of the pull-up node. The second pull-up circuit is configured to output the signal of the first clock signal end to the second signal output end under a control of the pull-up node. The first pull-down circuit is configured to pull down a potential of the pull-up node and a potential of the first signal output end to the potential of the second voltage end under a control of the pull-down node. The second pull-down circuit is configured to pull down a potential of the second signal output end to the potential of the second voltage end under a control of the pull-down node.

Abstract: According to one aspect of this disclosure, a scanning trigger unit includes a clock signal terminal, a first signal input terminal, a fixed level signal terminal, a first input sub-circuit, an output sub-circuit, a first holding sub-circuit, and a signal output terminal. The first input sub-circuit is connected to the first signal input terminal and a control node, and is configured to provide a first valid signal to the control node; the output sub-circuit is connected to the fixed level signal terminal, the clock signal terminal, and the control node, and is configured to provide a second valid signal to the signal output terminal; and the first holding sub-circuit is connected to the fixed level signal terminal and the signal output terminal, and is configured to hold the second valid signal at the signal output terminal for a predetermined time.

Abstract: A shift register, a gate driving circuit, and a display device are provided. The shift register includes an input unit, a first control unit, a second control unit, a voltage gating unit, an output unit, an energy storage unit and a reset unit. The shift register can output dual driving signals with fewer switching elements. When it is applied to the gate driving circuit, the total number of switching elements included in the gate driving circuit can be reduced, the wiring can be simplified, and the area occupied by the gate driving circuit can be decreased, thereby facilitating narrowing to the frame of the display device.

Abstract: A touch display substrate, a driving method of a touch display substrate, and a touch display device. The touch display substrate includes: a base substrate; a plurality of electrode patterns on the base substrate; signal lines in one-to-one correspondence with the electrode patterns; a compensation circuit on the base substrate, wherein the compensation circuit is configured to provide a common voltage signal to the electrode patterns in response to a touch control signal.

Abstract: A gate drive circuit unit includes an input sub-circuit for pulling a voltage at a first node as the same as a voltage at a first level terminal, a control sub-circuit for pulling a voltage at a second node as the same as a voltage of the first level terminal, or pulling a voltage at a second node as the same as a voltage of a second level terminal, an energy storage sub-circuit for storing a voltage at the first node, a reset sub-circuit for pulling the voltage at the first node as the same as the voltage at the second level terminal and pulling the voltage at the signal output terminal as the same as the voltage at the second level terminal, and an output sub-circuit for outputting a second clock signal of a second clock signal terminal at the signal output terminal.

Abstract: A shift register unit comprises an input subcircuit for a first node to be a first level when a scan pulse is of the first level, an output subcircuit for driving an output terminal to be a first clock signal level when the first node is at the first level, a second node control subcircuit for connecting the second node with a second level when either of the scan pulse and the output terminal is of the first level, and connecting the second node with the first level when each of the scan pulse and the output signal is of the second level, a first reset subcircuit for driving the first node to be the second level when the second node is at the first level, and a second reset subcircuit for driving the output signal to be the second level when the second node is at the first level.

Abstract: The embodiments of the present disclosure disclose a shift register, a method for driving the same, and a gate driving circuit. The shift register may include an inputting circuit, configured to apply a signal at a first signal terminal to a pulling up node; a resetting circuit, configured to apply a signal at a second signal terminal to the pulling up node; an outputting circuit, configured to apply a signal at a first clock terminal to an outputting terminal; a pulling down circuit, configured to apply a signal at a constant level terminal to the pulling up node and the outputting terminal according to the potential at a pulling down node, and to apply a signal at the constant level terminal to the pulling up node and the outputting terminal; a pull-down controlling circuit, configured to control the potential at the pulling down node; and a storage capacitor.

Abstract: A gate drive circuit unit includes an input sub-circuit for pulling a voltage at a first node as the same as a voltage at a first level terminal, a control sub-circuit for pulling a voltage at a second node as the same as a voltage of the first level terminal, or pulling a voltage at a second node as the same as a voltage of a second level terminal, an energy storage sub-circuit for storing a voltage at the first node, a reset sub-circuit for pulling the voltage at the first node as the same as the voltage at the second level terminal and pulling the voltage at the signal output terminal as the same as the voltage at the second level terminal, and an output sub-circuit for outputting a second clock signal of a second clock signal terminal at the signal output terminal.

Abstract: A shift register unit comprises an input subcircuit for driving a first node to be a first level when a scan pulse is of the first level, an output subcircuit for driving an output terminal to be a first clock signal level when the first node is at the first level, a second node control subcircuit for connecting the second node with a second level when either of the scan pulse and the output terminal is of the first level, and connecting the second node with the first level when each of the scan pulse and the output signal is of the second level, a first reset subcircuit for driving the first node to be the second level when the second node is at the first level, and a second reset subcircuit for driving the output signal to be the second level when the second node is at the first level.

Abstract: A shift register, a gate driving circuit, and a display device are provided. The shift register includes an input unit, a first control unit, a second control unit, a voltage gating unit, an output unit, an energy storage unit and a reset unit. The shift register can output dual driving signals with fewer switching elements. When it is applied to the gate driving circuit, the total number of switching elements included in the gate driving circuit can be reduced, the wiring can be simplified, and the area occupied by the gate driving circuit can be decreased, thereby facilitating narrowing to the frame of the display device.

Abstract: Provided are a shift register and driving method thereof, a gate driving circuit and a display apparatus. In the shift resister, an input circuit controls a potential at a first node according to an input signal, an output circuit output an output signal at an output terminal according to the potential of the first node and a first clock signal, a pull-down control circuit controls a potential of a second node according to the potential of the first node and the first clock signal, a pull-down circuit holds the output terminal at a reset status before receiving a next input signal, a reset control circuit enables the pull-down circuit to reset the first node and the output terminal according to a reset signal and the input signal, and a reset circuit resets the first node and the output terminal according to the reset signal and a second clock signal. The shift register has an enhanced ability of resetting and could avoid wasting resources due to idle elements.

Abstract: A shift register unit, a gate driving circuit, and a driving method thereof. By way of a configuration of a fourth reset circuit in the shift register unit, applying an active level of the fourth reset circuit on a first control terminal during an end phase of a duration in which a scan pulse is output at a scan pulse output terminal allows the fourth reset circuit to pull down an amplitude of a voltage of the scan pulse. In this way, angle-cutting of the scan pulse is realized.

Abstract: A shift register unit and a method of driving the same, a gate driving circuit and a display device are provided. The first pull-up circuit of the shift register is configured to output a signal of the first clock signal end to the first signal output end under a control of the pull-up node. The second pull-up circuit is configured to output the signal of the first clock signal end to the second signal output end under a control of the pull-up node. The first pull-down circuit is configured to pull down a potential of the pull-up node and a potential of the first signal output end to the potential of the second voltage end under a control of the pull-down node. The second pull-down circuit is configured to pull down a potential of the second signal output end to the potential of the second voltage end under a control of the pull-down node.

Abstract: A shift register unit includes input, output, restoration, reset, reset reinforce, reset reinforce control, and energy storage modules. The input, output, restoration and energy storage modules are connected to a first node. The output module is adapted to output a shift signal at a first electrical level when the voltage at the first node is at the first electrical level. The reset module is connected to the output module, and the reset module is adapted to set the voltage at the output module to a second electrical level. Both the reset reinforce and reset reinforce control modules are connected to a second node, and the reset reinforce control module includes a first and a second transistor. A channel width to length ratio of the first transistor is greater than that of the second transistor. Switch states of the first and second transistors control the voltage at the second node.

Abstract: A shift register and driving method thereof, a gate driving circuit and a display apparatus are provided. The shift register includes an input unit, a reset unit, a first control unit, a second control unit, a first output unit, a second output unit, a first signal output end and a second signal output end. Potential of the first signal output end is controlled by use of the input unit, the reset unit, the first control unit and the first output unit, and potential of the second signal output end is controlled by use of the input unit, the reset unit, the second control unit and the second output unit. The first control unit and the first output unit, the second control unit and the second output unit are utilized for controlling and sharing the input unit and the reset unit so that function of two shift register units are realized.

Abstract: A touch display panel and a driving method thereof, and a detection method of sensing signals are provided. A touch region of the touch display panel includes a plurality of touch driving electrodes and a plurality of touch sensing electrodes, and a drive unit is arranged on an edge of the touch region. The drive unit includes a first gate drive circuit to an N-th gate drive circuit coupled sequentially in a cascading manner.

Abstract: The present disclosure relates to the field of display technologies, and specifically to a shift register unit, a gate driving circuit comprising the shift register unit and a display device comprising the gate driving circuit. In accordance with an aspect of the present disclosure, a shift register unit is provided, which comprises a set module, a pull-down module, a pull-down control module, a reset module and an output module, wherein the pull-down module is only configured with two transistors to provide discharge channels via the first node and the output terminal, respectively.

Abstract: The present disclosure provides a shift register unit, a driving method, a gate driving circuit and a display device. The shift register unit includes a pull-up transistor; a storage capacitor; an output noise reduction transistor; a pull-down node control module, which controls a pull-down node to be at a first low level or a first high level under the control of the pull-up node; a pull-up node control module, which controls the pull-up node to be or not to be at a second high level under the control of an input signal and controls the pull-up node to be at or not to be at a second low level under the control of a reset signal; and a pull-up node noise reduction module, which controls the pull-up node to be or not to be at the first low level under the control of the pull-down node.

Abstract: The present disclosure provides a shift register unit, a shift register, a gate driving circuit and a display apparatus. The shift register unit comprises an input module, a pull-up module, a pull-down module, a pull-down control module and a storage module. With the above shift register unit according to the present disclosure, it is possible to reduce noise in an output signal, so as to improve the accuracy of the output signal. On the other hand, it is possible to provide a reduced number of TFTs, a simplified circuit structure, a decreased area to be occupied, and thus a narrowed width of a rim of a display apparatus.

Abstract: A shift register unit includes input, output, restoration, reset, reset reinforce, reset reinforce control, and energy storage modules. The input, output, restoration and energy storage modules are connected to a first node. The output module is adapted to output a shift signal at a first electrical level when the voltage at the first node is at the first electrical level. The reset module is connected to the output module, and the reset module is adapted to set the voltage at the output module to a second electrical level. Both the reset reinforce and reset reinforce control modules are connected to a second node, and the reset reinforce control module includes a first and a second transistor. A channel width to length ratio of the first transistor is greater than that of the second transistor. Switch states of the first and second transistors control the voltage at the second node.