Patents by Inventor Silvia Armini

Silvia Armini has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 11923198
    Abstract: In a first aspect, the present disclosure relates to a method for forming a patterning mask over a layer to be patterned, the method comprising: (a) providing a first layer over a substrate, the substrate comprising the layer to be patterned, the first layer being capable to bond with a monolayer comprising a compound comprising a functional group for bonding to the first layer and a removable organic group, (b) bonding the monolayer to the first layer, (c) exposing the monolayer to an energy beam, thereby forming a pattern comprising a first area comprising the compound with the removable organic group and a second area comprising the compound not having the removable organic group, and (d) selectively depositing an amorphous carbon layer on top of the first area.
    Type: Grant
    Filed: April 12, 2021
    Date of Patent: March 5, 2024
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Mikhail Krishtab, Silvia Armini
  • Publication number: 20210375615
    Abstract: In a first aspect, the present disclosure relates to a method for forming a patterning mask over a layer to be patterned, the method comprising: (a) providing a first layer over a substrate, the substrate comprising the layer to be patterned, the first layer being capable to bond with a monolayer comprising a compound comprising a functional group for bonding to the first layer and a removable organic group, (b) bonding the monolayer to the first layer, (c) exposing the monolayer to an energy beam, thereby forming a pattern comprising a first area comprising the compound with the removable organic group and a second area comprising the compound not having the removable organic group, and (d) selectively depositing an amorphous carbon layer on top of the first area.
    Type: Application
    Filed: April 12, 2021
    Publication date: December 2, 2021
    Inventors: Mikhail Krishtab, Silvia Armini
  • Patent number: 10790382
    Abstract: A method for forming horizontal nanowires, the method comprising providing a substrate comprising a dielectric layer and a fin structure comprising a portion protruding from the dielectric layer, the protruding portion being partially un-masked and comprising a multi-layer stack consisting of a layer of a first material stacked alternately and repeatedly with a layer of a second material and forming horizontal nanowires done by performing a cycle comprising removing selectively the first material up to the moment that a horizontal nanowire of the second material becomes suspended over a remaining portion of the partially un-masked protruding portion, forming a sacrificial layer on the remaining portion, while leaving the suspended horizontal nanowire uncovered, providing, selectively, a cladding layer on the suspended horizontal nanowire, and thereafter removing the sacrificial layer.
    Type: Grant
    Filed: December 18, 2017
    Date of Patent: September 29, 2020
    Assignee: IMEC VZW
    Inventors: Boon Teik Chan, Silvia Armini, Elisabeth Camerotto, Zheng Tao
  • Patent number: 10685833
    Abstract: Example embodiments relate to selective deposition of metal-organic frameworks. One embodiment includes a method of forming a low-k dielectric film selectively on exposed dielectric locations in a substrate. The method includes selectively depositing a metal-containing film, using an area-selective deposition process, on the exposed dielectric locations using one or more deposition cycles. The method also includes providing, at least once, a vapor of at least one organic ligand to the deposited metal-containing film resulting in a gas-phase chemical reaction thereby obtaining a metal-organic framework which is the low-k dielectric film. The low-k dielectric film has gaps on locations where no metal-containing film was deposited.
    Type: Grant
    Filed: November 14, 2018
    Date of Patent: June 16, 2020
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU LEUVEN R&D
    Inventors: Mikhail Krishtab, Silvia Armini, Ivo Stassen, Rob Ameloot
  • Patent number: 10553480
    Abstract: The present disclosure relates to a method for selectively forming a dielectric material on a first area of a top surface of a substrate. In an embodiment, the method involves providing the substrate including the top surface, the top surface including the first area and a second area, the first area having a hydrophilicity characterized by a water contact angle of at least 45° and the second area having a hydrophilicity characterized by a water contact angle of less than 40°. The method also involves providing a precursor aqueous solution on the substrate, the precursor aqueous solution including: a solvent, a dielectric material precursor, a catalyst for forming a dielectric material from the dielectric material precursor, and an ionic surfactant. Further, the method involves removing the solvent.
    Type: Grant
    Filed: May 3, 2018
    Date of Patent: February 4, 2020
    Assignee: IMEC VZW
    Inventors: Murad Redzheb, Silvia Armini
  • Publication number: 20190198391
    Abstract: Example embodiments relate to selective deposition of metal-organic frameworks. One embodiment includes a method of forming a low-k dielectric film selectively on exposed dielectric locations in a substrate. The method includes selectively depositing a metal-containing film, using an area-selective deposition process, on the exposed dielectric locations using one or more deposition cycles. The method also includes providing, at least once, a vapor of at least one organic ligand to the deposited metal-containing film resulting in a gas-phase chemical reaction thereby obtaining a metal-organic framework which is the low-k dielectric film. The low-k dielectric film has gaps on locations where no metal-containing film was deposited.
    Type: Application
    Filed: November 14, 2018
    Publication date: June 27, 2019
    Inventors: Mikhail Krishtab, Silvia Armini, Ivo Stassen, Rob Ameloot
  • Patent number: 10262896
    Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.
    Type: Grant
    Filed: July 25, 2017
    Date of Patent: April 16, 2019
    Assignee: IMEC VZW
    Inventor: Silvia Armini
  • Publication number: 20180323102
    Abstract: The present disclosure relates to a method for selectively forming a dielectric material on a first area of a top surface of a substrate. In an embodiment, the method involves providing the substrate including the top surface, the top surface including the first area and a second area, the first area having a hydrophilicity characterized by a water contact angle of at least 45° and the second area having a hydrophilicity characterized by a water contact angle of less than 40°. The method also involves providing a precursor aqueous solution on the substrate, the precursor aqueous solution including: a solvent, a dielectric material precursor, a catalyst for forming a dielectric material from the dielectric material precursor, and an ionic surfactant. Further, the method involves removing the solvent.
    Type: Application
    Filed: May 3, 2018
    Publication date: November 8, 2018
    Applicant: IMEC VZW
    Inventors: Murad Redzheb, Silvia Armini
  • Patent number: 10090393
    Abstract: A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.
    Type: Grant
    Filed: November 8, 2016
    Date of Patent: October 2, 2018
    Assignee: IMEC VZW
    Inventors: Steven Demuynck, Zheng Tao, Boon Teik Chan, Liesbeth Witters, Marc Schaekers, Antony Premkumar Peter, Silvia Armini
  • Patent number: 10056253
    Abstract: Embodiments described herein include a method for forming a vertical hetero-stack and a device including a vertical hetero-stack. An example method is used to form a vertical hetero-stack of a first nanostructure and a second nanostructure arranged on an upper surface of the first nanostructure. The first nanostructure is formed by a first transition metal dichalcogenide, TMDC, material and the second nanostructure is formed by a second TMDC material. The example method includes providing the first nanostructure on a substrate. The method also includes forming a reactive layer of molecules on the first nanostructure along a periphery of the upper surface. The method further includes forming the second nanostructure by a vapor deposition process. The second TMDC material nucleates on the reactive layer of molecules along the periphery and grows laterally therefrom to form the second nanostructure on the upper surface.
    Type: Grant
    Filed: June 7, 2017
    Date of Patent: August 21, 2018
    Assignee: IMEC VZW
    Inventors: Annelies Delabie, Silvia Armini
  • Publication number: 20180182868
    Abstract: A method for forming horizontal nanowires, the method comprising providing a substrate comprising a dielectric layer and a fin structure comprising a portion protruding from the dielectric layer, the protruding portion being partially un-masked and comprising a multi-layer stack consisting of a layer of a first material stacked alternately and repeatedly with a layer of a second material and forming horizontal nanowires done by performing a cycle comprising removing selectively the first material up to the moment that a horizontal nanowire of the second material becomes suspended over a remaining portion of the partially un-masked protruding portion, forming a sacrificial layer on the remaining portion, while leaving the suspended horizontal nanowire uncovered, providing, selectively, a cladding layer on the suspended horizontal nanowire, and thereafter removing the sacrificial layer.
    Type: Application
    Filed: December 18, 2017
    Publication date: June 28, 2018
    Applicant: IMEC VZW
    Inventors: Boon Teik Chan, Silvia Armini, Elisabeth Camerotto, Zheng Tao
  • Publication number: 20180047621
    Abstract: A use of an amine-containing silane for forming a transition metal nitride is provided. In this use, the amine of the amine-containing silane is the source of at least some, preferably most and most preferably all of the nitrogen present in the transition metal nitride.
    Type: Application
    Filed: July 25, 2017
    Publication date: February 15, 2018
    Inventor: Silvia Armini
  • Publication number: 20170352766
    Abstract: Embodiments described herein include a method for forming a vertical hetero-stack and a device including a vertical hetero-stack. An example method is used to form a vertical hetero-stack of a first nanostructure and a second nanostructure arranged on an upper surface of the first nanostructure. The first nanostructure is formed by a first transition metal dichalcogenide, TMDC, material and the second nanostructure is formed by a second TMDC material. The example method includes providing the first nanostructure on a substrate. The method also includes forming a reactive layer of molecules on the first nanostructure along a periphery of the upper surface. The method further includes forming the second nanostructure by a vapor deposition process. The second TMDC material nucleates on the reactive layer of molecules along the periphery and grows laterally therefrom to form the second nanostructure on the upper surface.
    Type: Application
    Filed: June 7, 2017
    Publication date: December 7, 2017
    Applicant: IMEC VZW
    Inventors: Annelies Delabie, Silvia Armini
  • Patent number: 9685322
    Abstract: The present disclosure relates to a method (100) for depositing a layer on a III-V semiconductor substrate, in which this method comprises providing (102) a passivated III-V semiconductor substrate comprising a III-V semiconductor surface which has a surface passivation layer provided thereon for preventing oxidation of said III-V semiconductor surface. The surface passivation layer comprises a self-assembled monolayer material obtainable by the reaction on the surface of an organic compound of formula R-A, wherein A is selected from SH, SeH, TeH and SiX3. X is selected from H, Cl, O—CH3, O—C2H5, and O—C3H2, and R is a hydrocarbyl, fluorocarbyl or hydrofluorocarbyl comprising from 5 to 20 carbon atoms. The method further comprises thermally annealing (107) the III-V semiconductor substrate in a non-oxidizing environment such as to decompose the self-assembled monolayer material, and depositing (108) a layer on the III-V semiconductor surface in the non-oxidizing environment.
    Type: Grant
    Filed: September 17, 2014
    Date of Patent: June 20, 2017
    Assignee: IMEC VZW
    Inventors: Christoph Adelmann, Silvia Armini
  • Publication number: 20170141199
    Abstract: A method for fabricating a semiconductor structure is provided. The method includes providing a patterned substrate comprising a semiconductor region and a dielectric region. A conformal layer of a first dielectric material is deposited directly on the patterned substrate. A layer of a sacrificial material is deposited overlying the conformal layer of the first dielectric material. The sacrificial material is patterned, whereby a part of the semiconductor region remains covered by the patterned sacrificial material. A layer of a second dielectric material is deposited on the patterned substrate, thereby completely covering the patterned sacrificial material. A recess is formed in the second dielectric material by completely removing the patterned sacrificial material. The exposed conformal layer of the first dielectric material is removed selectively to the semiconductor region.
    Type: Application
    Filed: November 8, 2016
    Publication date: May 18, 2017
    Applicant: IMEC VZW
    Inventors: Steven Demuynck, Zheng Tao, Boon Teik Chan, Liesbeth Witters, Marc Schaekers, Antony Premkumar Peter, Silvia Armini
  • Patent number: 9589896
    Abstract: An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or manganese nitride layer covering the side-walls, and a self-assembled monolayer, comprising an organic compound of formula Z-L-A, covering the manganese or manganese nitride layer, wherein Z is selected from the list consisting of a primary amino group, a carboxylic acid group, a thiol group, a selenol group and a heterocyclic group having an unsubstituted tertiary amine in the cycle, wherein L is an organic linker comprising from 1 to 12 carbon atoms and from 0 to 3 heteroatoms, and wherein A is a group attaching the linker to the manganese or manganese nitride layer.
    Type: Grant
    Filed: March 10, 2016
    Date of Patent: March 7, 2017
    Assignee: IMEC VZW
    Inventor: Silvia Armini
  • Publication number: 20160268208
    Abstract: An electronic circuit structure comprising a substrate, a dielectric layer on top of the substrate and comprising a cavity having side-walls, a manganese or manganese nitride layer covering the side-walls, and a self-assembled monolayer, comprising an organic compound of formula Z-L-A, covering the manganese or manganese nitride layer, wherein Z is selected from the list consisting of a primary amino group, a carboxylic acid group, a thiol group, a selenol group and a heterocyclic group having an unsubstituted tertiary amine in the cycle, wherein L is an organic linker comprising from 1 to 12 carbon atoms and from 0 to 3 heteroatoms, and wherein A is a group attaching the linker to the manganese or manganese nitride layer.
    Type: Application
    Filed: March 10, 2016
    Publication date: September 15, 2016
    Inventor: Silvia Armini
  • Patent number: 9437488
    Abstract: A method is provided for fabricating a semiconductor device that includes providing a structure with a sacrificial layer having at least one through-hole exposing a metal surface and, optionally, an oxide surface. In one example, the method may include applying a self-assembled monolayer selectively on the exposed metal surface and/or on the oxide surface. The method may also include growing a metal on the self-assembled monolayer and on the exposed metal surface if no self-assembled monolayer is present thereon, so as to fill the at least one through-hole, thereby forming at least one metal structure. The method may further include replacing the first sacrificial layer by a replacement dielectric layer having a dielectric constant of at most 3.9.
    Type: Grant
    Filed: November 12, 2015
    Date of Patent: September 6, 2016
    Assignee: IMEC VZW
    Inventors: Boon Teik Chan, Silvia Armini, Frederic Lazzarino
  • Publication number: 20160155664
    Abstract: A method is provided for fabricating a semiconductor device that includes providing a structure with a sacrificial layer having at least one through-hole exposing a metal surface and, optionally, an oxide surface. In one example, the method may include applying a self-assembled monolayer selectively on the exposed metal surface and/or on the oxide surface. The method may also include growing a metal on the self-assembled monolayer and on the exposed metal surface if no self-assembled monolayer is present thereon, so as to fill the at least one through-hole, thereby forming at least one metal structure. The method may further include replacing the first sacrificial layer by a replacement dielectric layer having a dielectric constant of at most 3.9.
    Type: Application
    Filed: November 12, 2015
    Publication date: June 2, 2016
    Applicant: IMEC VZW
    Inventors: Boon Teik Chan, Silvia Armini, Frederic Lazzarino
  • Patent number: 9117666
    Abstract: A method is provided for activating an exposed surface of a porous dielectric layer, the method comprising the steps of: filling with a first liquid at least the pores present in a part of the porous dielectric layer, the part comprising the exposed surface, removing the first liquid selectively from the surface, activating the exposed surface, and removing the first liquid from the bulk part of the porous dielectric layer.
    Type: Grant
    Filed: November 26, 2014
    Date of Patent: August 25, 2015
    Assignees: IMEC VZW, Katholieke Universiteit Leuven, KU Leuven R&D
    Inventors: Quoc Toan Le, Mikhail Baklanov, Yiting Sun, Silvia Armini