Patents by Inventor Sim Lee

Sim Lee has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20150270208
    Abstract: A power semiconductor device is provided. The power semiconductor device includes a leadframe, which includes a first chip carrier part and at least one second chip carrier part, which are fitted at a distance from one another and are in each case electrically conductive, at least one first power semiconductor component applied on the first chip carrier part, at least one second power semiconductor component applied on the second chip carrier part, external contacts in the form of external leads, and a capacitor. The capacitor is mounted on two adjacent external leads.
    Type: Application
    Filed: March 18, 2015
    Publication date: September 24, 2015
    Inventors: Ralf OTREMBA, Fabio BRUCCHI, Teck Sim LEE, Xaver SCHLOEGEL, Franz STUECKLER
  • Publication number: 20150214133
    Abstract: An electronic device includes a semiconductor chip including an electrode, a substrate element and a contact element connecting the electrode to the substrate element. The electronic device further includes an encapsulant configured to leave the contact element at least partially exposed such that a heatsink may be connected to the contact element.
    Type: Application
    Filed: January 28, 2014
    Publication date: July 30, 2015
    Inventors: Ralf Otremba, Josef Hoeglauer, Juergen Schredl, Teck Sim Lee, Xaver Schloegel, Klaus Schiess
  • Publication number: 20150191868
    Abstract: A super-hydrophobic fiber of the present disclosure includes: a nano-needle fiber having a surface including needle-shaped nano structures; and a coating layer disposed on the surface including the nano structures, and containing a hydrophobic material. The fiber has no aging effect, and thus, is excellent in durability, and has such a large contact angle and such as small sliding angle that the fiber may not be wet with water. A method for fabricating the super-hydrophobic fiber includes: a preparation step of preparing a pre-treating fiber; an etching step of etching a surface and an inner portion of the pre-treating fiber to fabricate a nano-needle fiber having a surface on which needle-shaped nano structures are formed; and a coating step of forming a coating layer containing a hydrophobic material, and enables mass production and is performed by simple processes.
    Type: Application
    Filed: January 2, 2015
    Publication date: July 9, 2015
    Inventors: Heon Ju LEE, Myoung Woon MOON, Jeong Sim LEE, Eu Sun YU, Won Jin JO, Do Hyun KIM, Kyu Hwan OH, Tae Jun KO
  • Patent number: 9035437
    Abstract: Packaged chips comprising non-integer lead pitches, systems and methods for manufacturing packaged chips are disclosed. In one embodiment a packaged device includes a first chip, a package encapsulating the first chip and a plurality of leads protruding from the package, wherein the plurality of leads comprises differing non-integer multiple lead pitches.
    Type: Grant
    Filed: March 12, 2013
    Date of Patent: May 19, 2015
    Assignee: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Guenther Lohmann, Josef Hoeglauer, Teck Sim Lee, Matteo-Alessandro Kutschak, Wolfgang Peinhopf
  • Publication number: 20150130037
    Abstract: A lead frame strip includes a plurality of connected unit lead frames, each unit lead frame having a die paddle and a plurality of leads connected to a periphery of the unit lead frame. A semiconductor die is attached to the die paddles. A molding compound covers the unit lead frames, including the semiconductor dies. Prior to testing or other processing of the lead frame strip, a gap is etched into a region of the leads which are shared by adjacent ones of the unit lead frames. The gap extends at least mostly through the shared leads. A partial cut is made in the molding compound around the periphery of the unit lead frames prior to the subsequent processing, including below the gap in the shared leads, to electrically isolate the leads of the unit lead frames.
    Type: Application
    Filed: November 12, 2013
    Publication date: May 14, 2015
    Inventors: Frank Püschner, Bernhard Schätzler, Teck Sim Lee, Franz Gabler, Pei Pei Kong, Boon Huat Lim
  • Publication number: 20150115313
    Abstract: In an embodiment, a semiconductor device package includes a bidirectional switch circuit. The bidirectional switch circuit includes a first semiconductor transistor mounted on a first die pad, a second semiconductor transistor mounted on a second die pad, the second die pad being separate from the first die pad, and a conductive connector extending between a source electrode of the first transistor and a source electrode of the second transistor.
    Type: Application
    Filed: October 31, 2013
    Publication date: April 30, 2015
    Inventors: Ralf Otremba, Fabio Brucchi, Franz Stückler, Teck Sim Lee
  • Publication number: 20140264798
    Abstract: Packaged chips comprising non-integer lead pitches, systems and methods for manufacturing packaged chips are disclosed. In one embodiment a packaged device includes a first chip, a package encapsulating the first chip and a plurality of leads protruding from the package, wherein the plurality of leads comprises differing non-integer multiple lead pitches.
    Type: Application
    Filed: March 12, 2013
    Publication date: September 18, 2014
    Applicant: Infineon Technologies Austria AG
    Inventors: Ralf Otremba, Guenther Lohmann, Josef Hoeglauer, Teck Sim Lee, Matteo-Alessandro Kutschak, Wolfgang Peinhopf
  • Patent number: 8836101
    Abstract: Semiconductor packages and method of fabricating them are described. In one embodiment, the semiconductor package includes a substrate having a first and a second die attach pad. A first die is disposed over the first die attach pad. A second die is disposed over the second die attach pad. A third die is disposed between the first and the second die. The third die having a first, a second, and a third portion such that the first portion is disposed above a portion of the first die, the second portion is disposed above a portion of the second die, and the third portion is disposed above an area between the first die and the second die.
    Type: Grant
    Filed: September 24, 2010
    Date of Patent: September 16, 2014
    Assignee: Infineon Technologies AG
    Inventors: Chooi Mei Chong, Teck Sim Lee
  • Publication number: 20140210061
    Abstract: Various embodiments provide a chip arrangement. The chip arrangement may include a first chip including a first contact and a second contact; a second chip; a leadframe including a first leadframe portion and a second leadframe portion electrically insulated from the first leadframe portion; and a plurality of pins coupled to the leadframe. At least one first pin is coupled to the first leadframe portion and at least one second pin is coupled to the second leadframe portion. The first contact of the first chip is electrically coupled to the first leadframe portion and the second contact of the first chip is coupled to the second leadframe portion. A contact of the second chip is electrically coupled to the second leadframe portion.
    Type: Application
    Filed: January 28, 2013
    Publication date: July 31, 2014
    Applicant: INFINEON TECHNOLOGIES AUSTRIA AG
    Inventors: Ralf Otremba, Klaus Schiess, Wolfgang Scholz, Teck Sim Lee, Fabio Brucchi, Davide Chiola, Wolfgang Peinhopf, Franz Stueckler
  • Patent number: 8783494
    Abstract: A waste container (10) comprising a receptacle (11) and a closure (13) connectable to the receptacle (11). The closure (13) comprises a base (14) and a support (15) extending upwardly from the base (14). The support (15) defines a front opening (16) and having a rear wall (17). A tray (18) comprising a shelf (19) and an inferiorly depending guard (21) is also provided in the support (15), with the tray (18) being at least partially rotatable relative to the support (15). The closure (13) further comprises a shield (23) comprising a main body (24) extending from one edge (25) to a free edge (26) and having an upper surface (27) and a lower surface (28). The shield (23) is hingedly connected to the support (15) at or adjacent to the one edge (25) and is moveable between an open position in which it overlies the rear wall (17) of the closure (13) and a closed position in which it is secured to the closure (13) to at least substantially cover the front opening (16).
    Type: Grant
    Filed: July 6, 2010
    Date of Patent: July 22, 2014
    Assignee: Becton, Dickinson and Company
    Inventors: Hoong Sim Lee, Neville Chia
  • Patent number: 8664753
    Abstract: A semiconductor package device having a protruding component portion and a method of packaging the semiconductor device is disclosed. The semiconductor device has a component, such as a leadframe, and a packaging mold body. The packaging mold body is formed around a portion of the component and a recess is formed in the packaging mold body adjacent the protruding portion of the component to prevent the protruding portion of the component from damaging other adjacent and abutting semiconductor devices.
    Type: Grant
    Filed: November 25, 2009
    Date of Patent: March 4, 2014
    Assignee: Infineon Technologies AG
    Inventors: Teck Sim Lee, Chee Voon Tan, Kwai Hong Wong
  • Publication number: 20130256327
    Abstract: A waste container (10) comprising a receptacle (11) and a closure (13) connectable to the receptacle (11). The closure (13) comprises a base (14) and a support (15) extending upwardly from the base (14). The support (15) defines a front opening (16) and having a rear wall (17). A tray (18) comprising a shelf (19) and an inferiorly depending guard (21) is also provided in the support (15), with the tray (18) being at least partially rotatable relative to the support (15). The closure (13) further comprises a shield (23) comprising a main body (24) extending from one edge (25) to a free edge (26) and having an upper surface (27) and a lower surface (28). The shield (23) is hingedly connected to the support (15) at or adjacent to the one edge (25) and is moveable between an open position in which it overlies the rear wall (17) of the closure (13) and a closed position in which it is secured to the closure (13) to at least substantially cover the front opening (16).
    Type: Application
    Filed: July 6, 2010
    Publication date: October 3, 2013
    Applicant: Becton, Dickinson and Company
    Inventors: Hoong Sim Lee, Neville Chia
  • Publication number: 20130154123
    Abstract: In various embodiments, a semiconductor device may include: a carrier; a semiconductor chip disposed over a first side of the carrier; a layer stack disposed between the carrier and the semiconductor chip or over a second side of the carrier opposite the semiconductor chip, or both, the layer stack including at least a first electrically insulating layer, the first electrically insulating layer having a laminate having a first electrically insulating matrix material and a first mechanically stabilizing material embedded in the first electrically insulating matrix material.
    Type: Application
    Filed: December 20, 2011
    Publication date: June 20, 2013
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Yong Chern Poh, Sze Lin Celine Tan, Teck Sim Lee, Kean Cheong Lee, Ralf Otremba, Xaver Schloegel, Juergen Schredl, Josef Hoeglauer
  • Patent number: 8466009
    Abstract: A method of fabricating a semiconductor package. In one embodiment the method includes forming a mold cavity about a portion of a first major surface of a leadframe, including about a mold lock opening extending through the leadframe between the first major surface and a second major surface. A spacer is inserted to fill at least a portion of the mold lock opening. The mold cavity is filled with an encapsulating material including filling a portion of the mold lock opening not occupied by the spacer.
    Type: Grant
    Filed: May 13, 2010
    Date of Patent: June 18, 2013
    Assignee: Infineon Technologies AG
    Inventors: Bernd Goller, Markus Dinkel, Wae Chet Yong, Teck Sim Lee, Boon Kian Lim
  • Publication number: 20120191067
    Abstract: The invention relates to an injection device (110) with a luer fitting. The injection device has a compressible syringe body (137) defining a reservoir (146). A male luer fitting (150) has a channel (152) therethrough for conducting contents of the reservoir, and a luer tip at an end of said male luer fitting opposing said base end. A first connecting structure (182) is arranged on said male luer fitting between said base end and said luer tip. A shield cap (160) is arranged on the male luer fitting. The shield cap has a second connecting structure interacting with said first connecting structure to prevent inadvertent movement of said shield cap relative to said male luer fitting when said shield cap is arranged at said first position. A first seal (170) is provided for sealing said channel at said luer tip. A second seal (180) is arranged between said shield cap and said male luer fitting for sealing the outer surface and the luer tip of said male luer fitting from outside contamination.
    Type: Application
    Filed: July 15, 2009
    Publication date: July 26, 2012
    Inventors: Yu Leng Neville Chia, Roderick Hausser, Xua Huyen Nguyen Huu, Hoong Sim Lee, Hong Tat Teddy Lim
  • Publication number: 20120074546
    Abstract: Semiconductor packages and method of fabricating them are described. In one embodiment, the semiconductor package includes a substrate having a first and a second die attach pad. A first die is disposed over the first die attach pad. A second die is disposed over the second die attach pad. A third die is disposed between the first and the second die. The third die having a first, a second, and a third portion such that the first portion is disposed above a portion of the first die, the second portion is disposed above a portion of the second die, and the third portion is disposed above an area between the first die and the second die.
    Type: Application
    Filed: September 24, 2010
    Publication date: March 29, 2012
    Inventors: Chooi Mei Chong, Teck Sim Lee
  • Publication number: 20110262595
    Abstract: Disclosed is an antioxidant nutritional supplement including a vegetable mixture and a fruit mixture each having an antioxidant effect as indispensible ingredients. Since the antioxidant nutritional supplement is not a drug, it may have a low price and it may not have medical side effects even if it is taken for a long period of time. Furthermore, since the antioxidant nutritional supplement includes various nutrients with balance, it may allow a user to be provided with nutrients which may lack to modern people, without causing a difficulty in taking other nutritional supplements.
    Type: Application
    Filed: April 21, 2010
    Publication date: October 27, 2011
    Applicant: NATURALIFE ASIA CO., LTD.
    Inventor: Jong Sim LEE
  • Publication number: 20110121439
    Abstract: A semiconductor package device having a protruding component portion and a method of packaging the semiconductor device is disclosed. The semiconductor device has a component, such as a leadframe, and a packaging mold body. The packaging mold body is formed around a portion of the component and a recess is formed in the packaging mold body adjacent the protruding portion of the component to prevent the protruding portion of the component from damaging other adjacent and abutting semiconductor devices.
    Type: Application
    Filed: November 25, 2009
    Publication date: May 26, 2011
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Teck Sim Lee, Chee Voon Tan, Kwai Hong Wong
  • Patent number: 7821141
    Abstract: A semiconductor device including: a heat sink, a die on the heat sink, resin encapsulating the die, and a mounting aperture in the resin having at least a segment between the heat sink and a first end of the resin, wherein the thickness of the heat sink is no greater than 35% of the thickness of the device.
    Type: Grant
    Filed: February 22, 2008
    Date of Patent: October 26, 2010
    Assignee: Infineon Technologies AG
    Inventors: Wae Chet Yong, Teck Sim Lee, Erich Griebl, Mario Feldvoss, Juergen Schredl
  • Publication number: 20100227436
    Abstract: A method of fabricating a semiconductor package. In one embodiment the method includes forming a mold cavity about a portion of a first major surface of a leadframe, including about a mold lock opening extending through the leadframe between the first major surface and a second major surface. A spacer is inserted to fill at least a portion of the mold lock opening. The mold cavity is filled with an encapsulating material including filling a portion of the mold lock opening not occupied by the spacer.
    Type: Application
    Filed: May 13, 2010
    Publication date: September 9, 2010
    Applicant: INFINEON TECHNOLOGIES AG
    Inventors: Bernd Goller, Markus Dinkel, Wae Chet Yong, Teck Sim Lee, Boon Kian Lim