Patents by Inventor Simon Chan

Simon Chan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 6232663
    Abstract: A semiconductor device and a method of fabricating thereof, including an insulator layer having alternately layered insulator films and boundary layers, wherein the boundary layers are more dense than the insulator films to prevent expansion and elongation of string-like defects across the boundary layers. The method includes mixing a nitrogen containing gas and a silane group gas to form an insulator film; temporarily stopping a flow of the silane group gas for approximately one to fifteen seconds to form a boundary layer over the insulator film; restarting the flow of the silane group gas; and repeating the steps of temporarily stopping and restarting for a predetermined number of times to form the plurality of alternately layered insulator films and boundary layers. The plurality of alternately layered insulator films and boundary layers is also etched at an etching rate for the insulator films greater than an etching rate for the boundary layers to form a step-shaped sloped opening.
    Type: Grant
    Filed: August 1, 1997
    Date of Patent: May 15, 2001
    Assignees: Fujitsu Limited, Advanced Micro Devices, Inc., Fujitsu AMD, Semiconductor Limited
    Inventors: Toshio Taniguchi, Kenji Nukui, Ibrahim Burki, Richard Huang, Simon Chan, Kazunori Imaoka, Kazutoshi Mochizuki
  • Patent number: 6060380
    Abstract: A method for etching openings in an integrated circuit uses siliconoxynitride as a hardmask layer. Because of the relatively low reflectivity of siliconoxynitride, when a photoresist layer is deposited on the siliconoxynitride hardmask layer and is exposed to light, the photoresist layer is patterned more conformingly to a desired pattern. The present invention may be used to particular advantage for etching contiguous trench lines and via holes in a dual damascene etch process for small dimension integrated circuits.
    Type: Grant
    Filed: November 6, 1998
    Date of Patent: May 9, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Ramkumar Subramanian, Bhanwar Singh, Simon Chan, Fei Wang
  • Patent number: 6043153
    Abstract: A system and method for providing copper interconnect in a trench formed in a dielectric is disclosed. In one aspect, the method and system include providing a copper layer; removing a portion of the copper layer outside of the trench; annealing the copper layer; and providing a layer disposed above the copper layer. In another aspect, the method and system include providing a copper interconnect formed in a trench on a dielectric. The copper interconnect includes a copper layer disposed in the trench and a layer disposed above the copper layer. The copper layer has a bamboo structure at least one grain. The at least one grain has substantially one orientation.
    Type: Grant
    Filed: September 25, 1997
    Date of Patent: March 28, 2000
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Takeshi Nogami, Simon Chan
  • Patent number: 5994778
    Abstract: A method for using low dielective SiOF in a process to manufacture semiconductor products, comprising the steps of: obtaining a layer of SiOF; and depleting fluorine from a surface of the SiOF layer. In a preferred embodiment, the depleting step comprises the step of treating the surface of the layer of SiOF with a plasma containing hydrogen. It is further preferred that the treated surface be passivated. The invention also encompasses a semiconductor chip comprising an integrated circuit with at least a first and second layers, and with a dielective layer of SiOF disposed between the layers, wherein the SiOF dielective layer includes a first region at one edge thereof which is depleted of fluorine to a predetermined depth.
    Type: Grant
    Filed: September 18, 1998
    Date of Patent: November 30, 1999
    Assignee: Advanced Micro Devices, Inc.
    Inventors: Richard J. Huang, Guarionex Morales, Simon Chan
  • Patent number: 4608154
    Abstract: Insolubles are removed from sylvinite ores by froth flotation using a small amount of a primary, secondary or primary-ether alkyl amine as collector in combination with a flocculant. In the case of a primary alkyl amine, the collector may be the same as the collector used in the subsequent froth flotation to recover sylvite from the ore.
    Type: Grant
    Filed: November 20, 1984
    Date of Patent: August 26, 1986
    Assignee: Cominco Ltd.
    Inventors: Simon Chan, Eli Slorstad, Henry D. A. Cormode, Richard R. Tamosiunis