Patents by Inventor Simon Litsyn
Simon Litsyn has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
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Patent number: 8375278Abstract: k input bits are encoded according to a code with which is associated a m×n=m+k parity check matrix H. The resulting codeword is punctured, with n?<n bits. The punctured codeword is exported to a corrupting medium such as a communication channel or a memory. A representation of the punctured codeword is imported from the corrupting medium and is decoded using a matrix H? that is smaller than H. For example, H? is m?=m?(n?n?)×n? and is derived by merging selected rows of H.Type: GrantFiled: July 21, 2009Date of Patent: February 12, 2013Assignee: Ramot At Tel Aviv University Ltd.Inventors: Eran Sharon, Idan Alrod, Simon Litsyn
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Patent number: 8375272Abstract: Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. If one of the decodings fails, the remaining subset whose decoding failed is decoded at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.Type: GrantFiled: June 28, 2011Date of Patent: February 12, 2013Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Eran Sharon, Idan Alrod, Menahem Lasser
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Patent number: 8370711Abstract: While decoding a representation, imported from a channel, of a codeword that encodes K information bits as N>K codeword bits, by updating estimates of the codeword bits in a plurality of iterations, the iterations are interrupted upon satisfaction of an interruption criterion that is either an order-dependent interruption criterion or an interruption criterion that includes an estimate of mutual information of the codeword and a vector that is used in the decoding iterations. Either the iterations are terminated or the iterations are resumed after one or more elements of one or more vectors used in the iterations is/are modified.Type: GrantFiled: December 24, 2009Date of Patent: February 5, 2013Assignee: Ramot At Tel Aviv University Ltd.Inventors: Idan Alrod, Eran Sharon, Simon Litsyn
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Publication number: 20130031447Abstract: A termination indication is computed during an iteration of an iterative decoding of a representation of a codeword according to a schedule. The termination indication is tested to see if the decoding has converged or is not likely to converge. The testing of the termination indication shows convergence or lack of likelihood thereof even if a codeword bit estimate was flipped during an immediately preceding traversal of the schedule. Preferably, the termination indication includes an error correction syndrome weight, a zero value whereof indicates convergence, and the computing of the termination indication includes, in response to the flipping of a codeword bit estimate, flipping the error correction syndrome bits that are influenced by that codeword bit estimate.Type: ApplicationFiled: July 31, 2011Publication date: January 31, 2013Applicant: SANDISK TECHNOLOGIES INC.Inventors: Eran SHARON, Idan ALROD, Ariel NAVON, Omer FAINZILBER, Simon LITSYN
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Publication number: 20130024746Abstract: A method of storing data includes receiving data including a first group of bits and a second group of bits and initiating a shaping encoding operation on the second group of bits to generate a third group of bits. The third group of bits has more bits than the second group of bits. The shaping encoding operation is configured to produce a non-uniform probability distribution of bit values in the third group of bits. The first group of bits and first error correction coding (ECC) parity bits corresponding to the first group of bits are stored to a first logical page that is within a physical page of a MLC memory and the third group of bits and second ECC parity bits corresponding to the third group of bits are stored to a second logical page that is within the physical page of the MLC memory.Type: ApplicationFiled: December 19, 2011Publication date: January 24, 2013Applicant: SANDISK TECHNOLOGIES INC.Inventors: ERAN SHARON, IDAN ALROD, SIMON LITSYN
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Publication number: 20130024745Abstract: To decode a representation of a codeword that encodes K information bits as N>K codeword bits, messages are exchanged between N bit nodes and N?K check nodes of a graph in which E edges connect the bit nodes and the check nodes. While messages are exchanged, fewer than E of the messages are stored, and/or fewer than N soft estimates of the codeword bits are stored. In some embodiments, the messages are exchanged only within sub-graphs and between the sub-graphs and one or more external check nodes. While messages are exchanged, the largest number of stored messages is the number of edges in the sub-graph with the most edges plus the number of edges that connect the sub-graphs to the external check node(s), and/or the largest number of stored soft estimates is the number of bit nodes in the sub-graph with the most bit nodes.Type: ApplicationFiled: September 11, 2012Publication date: January 24, 2013Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.Inventors: Eran Sharon, Simon Litsyn, Idan Alrod
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Publication number: 20130024748Abstract: A method of writing data includes receiving data pages to be stored in a data storage device and generating codewords corresponding to the received data pages. The codewords are stored to physical pages of a first memory portion of the data storage device. A first portion of a particular codeword that corresponds to a particular data page is stored at a first physical page of the first memory portion. A second portion of the particular codeword is stored at a second physical page of the first memory portion. The codewords are copied from the physical pages of the first memory portion to a physical page of a second memory portion of the data storage device.Type: ApplicationFiled: December 19, 2011Publication date: January 24, 2013Applicant: SANDISK TECHNOLOGIES INC.Inventors: ERAN SHARON, IDAN ALROD, SIMON LITSYN
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Publication number: 20130024747Abstract: A method of writing data includes receiving a data page to be stored in a data storage device and initiating an encode operation to encode the data page. The encode operation generates first encoded data and a first portion of the first encoded data is stored to the first physical page of the data storage device. The method includes initiating storage of a second portion of the first encoded data to a second physical page of the data storage device. The method also includes initiating a decode operation to recover the data page. The decode operation uses a representation of the first portion of the first encoded data that is read from the first physical page without using any data from the second physical page.Type: ApplicationFiled: December 19, 2011Publication date: January 24, 2013Applicant: SANDISK TECHNOLOGIES INC.Inventors: ERAN SHARON, IDAN ALROD, SIMON LITSYN
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Patent number: 8291279Abstract: To decode a representation of a codeword that encodes K information bits as N>K codeword bits, messages are exchanged between N bit nodes and N?K check nodes of a graph in which E edges connect the bit nodes and the check nodes. While messages are exchanged, fewer than E of the messages are stored, and/or fewer than N soft estimates of the codeword bits are stored. In some embodiments, the messages are exchanged only within sub-graphs and between the sub-graphs and one or more external check nodes. While messages are exchanged, the largest number of stored messages is the number of edges in the sub-graph with the most edges plus the number of edges that connect the sub-graphs to the external check node(s), and/or the largest number of stored soft estimates is the number of bit nodes in the sub-graph with the most bit nodes.Type: GrantFiled: May 21, 2008Date of Patent: October 16, 2012Assignee: Ramot at Tel Aviv University Ltd.Inventors: Eran Sharon, Simon Litsyn, Idan Alrod
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Patent number: 8289781Abstract: Each of a plurality of flash memory cells is programmed to a respective one of L?2 threshold voltage states within a threshold voltage window. Values of parameters of threshold voltage functions are adjusted in accordance with comparisons of the threshold voltages of some or all of the cells to two or more of m?2 threshold voltage intervals within the threshold voltage window. Reference voltages for reading the cells are selected based on the values. Alternatively, the m threshold voltage intervals span the threshold voltage window, and respective threshold voltage states are assigned to the cells based on numbers of cells whose threshold voltages are in the intervals, without re-reading the cells.Type: GrantFiled: February 20, 2011Date of Patent: October 16, 2012Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon
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Publication number: 20120224421Abstract: Systems and methods to decode data stored in a data storage device are disclosed. Data bits stored in a first group of storage elements are decoded using data in a second group of storage elements together with physical characteristics of the second group of storage elements to aid in the decoding of the first group of storage elements.Type: ApplicationFiled: February 21, 2012Publication date: September 6, 2012Applicant: SANDISK TECHNOLOGIES INC.Inventors: Simon LITSYN, Idan ALROD, Eran SHARON
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Patent number: 8261157Abstract: A plurality of logical pages is stored in a MBC flash memory along with corresponding ECC bits, with at least one of the MBC cells storing bits from more than one logical page, and with at least one of the ECC bits applying to two or more of the logical pages. When the pages are read from the memory, the data bits as read are corrected using the ECC bits as read. Alternatively, a joint, systematic or non-systematic ECC codeword is computed for two or more of the logical pages and is stored instead of those logical pages. When the joint codeword is read, the logical bits are recovered from the codeword as read. The scope of the invention also includes corresponding memory devices, the controllers of such memory devices, and also computer-readable storage media bearing computer-readable code for implementing the methods.Type: GrantFiled: November 5, 2008Date of Patent: September 4, 2012Assignee: Ramot et Tel Aviv University Ltd.Inventors: Simon Litsyn, Idan Alrod, Eran Sharon, Mark Murin, Menahem Lasser
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Publication number: 20120079178Abstract: To store bits in one or more cells, an adaptive mapping of bits to ranges of a physical parameter of the cell(s) is provided, in accordance with respective initial values of the physical parameter, by steps including encoding the bits as a codeword by partitioning the bits into subsets and finding a factor bit string such that the codeword is a concatenation of the factor bit string and separate Galois field products of all the subsets with the factor bit string. The initial values of the physical parameter are adjusted accordingly as needed.Type: ApplicationFiled: December 6, 2011Publication date: March 29, 2012Inventors: Simon LITSYN, Eran Sharon, Idan Alrod
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Patent number: 8086931Abstract: Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. If one of the decodings fails, the remaining subset whose decoding failed is decoded at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.Type: GrantFiled: December 29, 2009Date of Patent: December 27, 2011Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Eran Sharon, Idan Alrod, Menahem Lasser
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Patent number: 8085590Abstract: To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The mapping may be many-to-one or may be an “into” generalized Gray mapping. The cell(s) is/are read to provide a read state value that is transformed into a plurality of output bits, for example by maximum likelihood decoding or by mapping the read state value into a plurality of soft bits and then decoding the soft bits.Type: GrantFiled: October 17, 2010Date of Patent: December 27, 2011Assignee: Ramot at Tel Aviv University Ltd.Inventors: Simon Litsyn, Eran Sharon, Idan Alrod
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Publication number: 20110276749Abstract: To store a plurality of input bits, the bits are mapped to a corresponding programmed state of one or more memory cells and the cell(s) is/are programmed to that corresponding programmed state. The mapping may be many-to-one or may be an “into” generalized Gray mapping. The cell(s) is/are read to provide a read state value that is transformed into a plurality of output bits, for example by maximum likelihood decoding or by mapping the read state value into a plurality of soft bits and then decoding the soft bits.Type: ApplicationFiled: July 3, 2011Publication date: November 10, 2011Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.Inventors: Simon LITSYN, Eran SHARON, Idan ALROD
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Publication number: 20110276856Abstract: Data bits to be encoded are split into a plurality of subgroups. Each subgroup is encoded separately to generate a corresponding codeword. Selected subsets are removed from the corresponding codewords, leaving behind shortened codewords, and are many-to-one transformed to condensed bits. The final codeword is a combination of the shortened codewords and the condensed bits. A representation of the final codeword is decoded by being partitioned to a selected subset and a plurality of remaining subsets. Each remaining subset is decoded separately. If one of the decodings fails, the remaining subset whose decoding failed is decoded at least in part according to the selected subset. If the encoding and decoding are systematic then the selected subsets are of parity bits.Type: ApplicationFiled: June 28, 2011Publication date: November 10, 2011Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.Inventors: Simon LITSYN, Eran SHARON, Idan ALROD, Menahem LASSER
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Publication number: 20110264981Abstract: A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.Type: ApplicationFiled: July 6, 2011Publication date: October 27, 2011Applicant: RAMOT AT TEL AVIV UNIVERSITY LTD.Inventors: Idan ALROD, Eran SHARON, Simon LITSYN
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Publication number: 20110258370Abstract: To store, successively, in a plurality of memory cells, first and second pluralities of input bits that are equal in number, a first transformation transforms the first input bits into a first plurality of transformed bits. A first portion of the cells is programmed to store the first transformed bits according to a mapping of bit sequences to cell levels, but, if the first transformation has a variable output length, only if there are few enough first transformed bits to fit in the first cell portion. Then, without erasing a second cell portion that includes the first portion, if respective levels of the cells of the second portion, that represent a second plurality of transformed bits obtained by a second transformation of the second input bits, according to the mapping, are accessible from the current cell levels, the second portion is so programmed to store the second transformed bits.Type: ApplicationFiled: April 14, 2011Publication date: October 20, 2011Applicant: Ramot At Tel Aviv University Ltd.Inventors: Eran SHARON, Idan Alrod, Simon Litsyn, Ishai Ilani
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Patent number: 8042029Abstract: A representation of a codeword is decoded by applying a first decoder of the codeword to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword. Preferably, applying the first decoder consumes less power and is faster than applying the second decoder. Data are ported by encoding the data as a codeword, exporting the codeword to a corrupting medium, importing a representation of the codeword, and applying a first decoder to the representation of the codeword. If applying the first decoder fails to decode the representation of the codeword then a second decoder of the codeword is applied to the representation of the codeword.Type: GrantFiled: September 28, 2006Date of Patent: October 18, 2011Assignee: Ramot At Tel Aviv University Ltd.Inventors: Idan Alrod, Eran Sharon, Simon Litsyn