Patents by Inventor Simon Ruffell

Simon Ruffell has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Patent number: 9929015
    Abstract: In one embodiment, a processing apparatus may include a process chamber configured to house a substrate and a hybrid source assembly that includes a gas channel coupled to a molecular source; and a plasma chamber configured to generate a plasma and isolated from the gas channel. The processing apparatus may also include an extraction assembly disposed between the hybrid source assembly and process chamber, coupled to the gas channel and plasma chamber, and configured to direct an ion beam to a substrate, the ion beam comprising angled ions wherein the angled ions form a non-zero angle with respect to a perpendicular to a substrate plane; and configured to direct a molecular beam comprising molecular species received from the gas channel to the substrate.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: March 27, 2018
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Thomas R. Omstead, Simon Ruffell, Tristan Ma, Ethan A. Wright, John Hautala
  • Publication number: 20180082844
    Abstract: A method of patterning a substrate. The method may include: providing a first surface feature and a second surface feature in a staggered configuration within a layer, the layer being disposed on the substrate, and directing first ions in a first exposure to a first side of the first surface feature and a first side of the second surface feature, in a presence of a reactive ambient containing a reactive species, wherein the first exposure etches the first side of the first surface feature and the first side of the second surface feature, wherein after the directing, the first surface feature and the second surface feature merge to form a third surface feature.
    Type: Application
    Filed: December 20, 2016
    Publication date: March 22, 2018
    Inventors: Steven R. Sherman, John Hautala, Simon Ruffell
  • Patent number: 9847228
    Abstract: A method may include providing a substrate having a surface that defines a substrate plane and a substrate feature that extends from the substrate plane; directing an ion beam comprising angled ions to the substrate at a non-zero angle with respect to a perpendicular to the substrate plane, wherein a first portion of the substrate feature is exposed to the ion beam and wherein a second portion of the substrate feature is not exposed to the ion beam; directing molecules of a molecular species to the substrate wherein the molecules of the molecular species cover the substrate feature; and providing a second species to react with the molecular species, wherein selective growth of a layer comprising the molecular species and the second species takes place such that a first thickness of the layer grown on the first portion is different from a second thickness grown on the second portion.
    Type: Grant
    Filed: September 9, 2016
    Date of Patent: December 19, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, Thomas R. Omstead, Anthony Renau
  • Publication number: 20170330796
    Abstract: A method may include providing a cavity in a surface of a substrate, the cavity comprising a sidewall portion and a lower surface; directing depositing species to the surface of the substrate, wherein the depositing species condense to form a fill material on the sidewall portion and lower surface; and directing angled ions at the cavity at a non-zero angle of incidence with respect to a perpendicular to a plane defined by the substrate, wherein the angled ions strike an exposed part of the sidewall portion and do not strike the lower surface, and wherein the cavity is filled by the fill material in a bottom-up fill process.
    Type: Application
    Filed: May 16, 2016
    Publication date: November 16, 2017
    Inventors: Simon Ruffell, John Hautala
  • Publication number: 20170263460
    Abstract: A method may include providing a surface feature on a substrate, the surface feature comprising a feature shape a feature location, and a dimension along a first direction within a substrate plane; depositing a layer comprising a layer material on the surface feature; and directing ions in an ion exposure at an angle of incidence toward the substrate, the angle of incidence forming a non-zero angle with respect to a perpendicular to the substrate plane, wherein the ion exposure comprises the ions and reactive neutral species, the ion exposure reactively etching the layer material, wherein the ions impact a first portion of the surface feature and do not impact a second portion of the surface feature, and wherein an altered surface feature is generated, the altered surface feature differing from the surface feature in at least one of: the dimension along the first direction, the feature shape, or the feature location.
    Type: Application
    Filed: April 29, 2016
    Publication date: September 14, 2017
    Inventors: Simon Ruffell, Huixiong Dai, Jun Lang, John Hautala
  • Publication number: 20170179133
    Abstract: Provided herein are approaches for forming a gate oxide layer for a DRAM device, the method including providing a finned substrate having a recess formed therein, and performing an ion implant into a sidewall surface of the recess to form a gate oxide layer having a non-uniform thickness, wherein a thickness of the gate oxide layer at a top section of the sidewall surface is greater than a thickness of the gate oxide layer at a bottom section of the sidewall surface. In some approaches, the ion implant is provided as a series of ion implants at multiple different implant angles, varied along with an ion implantation energy and/or an ion dose to increase the thickness of the gate oxide of the top section of the sidewall surface. In some approaches, the finned substrate is also exposed to a plasma, either during or after, the ion implantation.
    Type: Application
    Filed: December 22, 2015
    Publication date: June 22, 2017
    Inventors: Simon Ruffell, Arvind Kumar, Tristan Ma, Kyu-Ha Shim, John Hautala, Steven Sherman
  • Publication number: 20170133491
    Abstract: A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and a coating in an unhardened state extending along a top region and along sidewall regions of the semiconductor portion; implanting first ions into the coating, the first ions having a first trajectory along a perpendicular to the substrate plane, wherein the first ions form a etch-hardened portion comprising a hardened state disposed along the top region; and directing a reactive etch using second ions at the coating, the second ions having a second trajectory forming a non-zero angle with respect to the perpendicular, wherein the reactive etch removes the etch-hardened portion at a first etch rate, wherein the first etch rate is less than a second etch rate when the second ions are directed in the reactive etch to the top portion in the unhardened state.
    Type: Application
    Filed: January 25, 2017
    Publication date: May 11, 2017
    Inventor: Simon Ruffell
  • Patent number: 9589811
    Abstract: A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and a coating in an unhardened state extending along a top region and along sidewall regions of the semiconductor portion; implanting first ions into the coating, the first ions having a first trajectory along a perpendicular to the substrate plane, wherein the first ions form a etch-hardened portion comprising a hardened state disposed along the top region; and directing a reactive etch using second ions at the coating, the second ions having a second trajectory forming a non-zero angle with respect to the perpendicular, wherein the reactive etch removes the etch-hardened portion at a first etch rate, wherein the first etch rate is less than a second etch rate when the second ions are directed in the reactive etch to the top portion in the unhardened state.
    Type: Grant
    Filed: June 24, 2015
    Date of Patent: March 7, 2017
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventor: Simon Ruffell
  • Publication number: 20170029950
    Abstract: In one embodiment, an apparatus to selectively deposit a carbon layer on substrate, comprising a plasma chamber to receive a flow of carbon-containing gas; a power source to generate a plasma containing the carbon-containing gas in the plasma chamber; an extraction plate to extract an ion beam from the plasma and direct the ion beam to the substrate, the ion beam comprising ions having trajectories forming a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, the extraction plate further configured to conduct a neutral species derived from the carbon-containing gas to the substrate; and a substrate stage facing the extraction plate and including a heater to heat the substrate to a first temperature, when the ion beam and carbon-containing species impinge on the substrate.
    Type: Application
    Filed: July 27, 2015
    Publication date: February 2, 2017
    Inventors: Alex Tsung-Liang Chen, Simon Ruffell
  • Publication number: 20160379816
    Abstract: A method of patterning a substrate. The method may include providing a surface feature on the substrate, the surface feature having a first dimension along a first direction within a substrate plane, and a second dimension along a second direction within the substrate plane, wherein the second direction is perpendicular to the first direction; and directing first ions in a first exposure to the surface feature along the first direction at a non-zero angle of incidence with respect to a perpendicular to the substrate plane, in a presence of a reactive ambient containing a reactive species; wherein the first exposure etches the surface feature along the first direction, wherein after the directing, the surface feature retains the second dimension along the second direction, and wherein the surface feature has a third dimension along the first direction different than the first dimension.
    Type: Application
    Filed: June 25, 2015
    Publication date: December 29, 2016
    Inventors: Simon Ruffell, John Hautala, Adam Brand, Huixiong Dai
  • Publication number: 20160379832
    Abstract: A method may include providing a patterned feature extending from a substrate plane of a substrate, the patterned feature including a semiconductor portion and a coating in an unhardened state extending along a top region and along sidewall regions of the semiconductor portion; implanting first ions into the coating, the first ions having a first trajectory along a perpendicular to the substrate plane, wherein the first ions form a etch-hardened portion comprising a hardened state disposed along the top region; and directing a reactive etch using second ions at the coating, the second ions having a second trajectory forming a non-zero angle with respect to the perpendicular, wherein the reactive etch removes the etch-hardened portion at a first etch rate, wherein the first etch rate is less than a second etch rate when the second ions are directed in the reactive etch to the top portion in the unhardened state.
    Type: Application
    Filed: June 24, 2015
    Publication date: December 29, 2016
    Inventor: Simon Ruffell
  • Publication number: 20160379827
    Abstract: A method may include providing a substrate having a surface that defines a substrate plane and a substrate feature that extends from the substrate plane; directing an ion beam comprising angled ions to the substrate at a non-zero angle with respect to a perpendicular to the substrate plane, wherein a first portion of the substrate feature is exposed to the ion beam and wherein a second portion of the substrate feature is not exposed to the ion beam; directing molecules of a molecular species to the substrate wherein the molecules of the molecular species cover the substrate feature; and providing a second species to react with the molecular species, wherein selective growth of a layer comprising the molecular species and the second species takes place such that a first thickness of the layer grown on the first portion is different from a second thickness grown on the second portion.
    Type: Application
    Filed: September 9, 2016
    Publication date: December 29, 2016
    Inventors: Simon Ruffell, Thomas R. Omstead, Anthony Renau
  • Patent number: 9453279
    Abstract: A method may include providing a substrate having a surface that defines a substrate plane and a substrate feature that extends from the substrate plane; directing an ion beam comprising angled ions to the substrate at a non-zero angle with respect to a perpendicular to the substrate plane, wherein a first portion of the substrate feature is exposed to the ion beam and wherein a second portion of the substrate feature is not exposed to the ion beam; directing molecules of a molecular species to the substrate wherein the molecules of the molecular species cover the substrate feature; and providing a second species to react with the molecular species, wherein selective growth of a layer comprising the molecular species and the second species takes place such that a first thickness of the layer grown on the first portion is different from a second thickness grown on the second portion.
    Type: Grant
    Filed: July 21, 2014
    Date of Patent: September 27, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Simon Ruffell, Thomas R. Omstead, Anthony Renau
  • Patent number: 9287123
    Abstract: In one embodiment, a method for etching a substrate includes providing a reactive ambient around the substrate when a non-crystalline layer is disposed over a first crystalline material in the substrate; generating a plasma in a plasma chamber; modifying a shape of a plasma sheath boundary of the plasma; extracting ions from the plasma; and directing the ions to the substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the ions and reactive ambient are effective to form an angled cavity through the non-crystalline layer to expose a portion of the first crystalline material at a bottom of the angled cavity, and the angled cavity forms a non-zero angle of inclination with respect to the perpendicular.
    Type: Grant
    Filed: August 14, 2014
    Date of Patent: March 15, 2016
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Swaminathan Srinivasan, Fareen Adeni Khaja, Simon Ruffell, John Hautala
  • Publication number: 20160005594
    Abstract: In one embodiment, a processing apparatus may include a process chamber configured to house a substrate and a hybrid source assembly that includes a gas channel coupled to a molecular source; and a plasma chamber configured to generate a plasma and isolated from the gas channel. The processing apparatus may also include an extraction assembly disposed between the hybrid source assembly and process chamber, coupled to the gas channel and plasma chamber, and configured to direct an ion beam to a substrate, the ion beam comprising angled ions wherein the angled ions form a non-zero angle with respect to a perpendicular to a substrate plane; and configured to direct a molecular beam comprising molecular species received from the gas channel to the substrate.
    Type: Application
    Filed: July 21, 2014
    Publication date: January 7, 2016
    Inventors: Thomas R. Omstead, Simon Ruffell, Tristan MA, Ethan A. Wright, John Hautala
  • Publication number: 20150311073
    Abstract: In one embodiment, a method for etching a substrate includes providing a reactive ambient around the substrate when a non-crystalline layer is disposed over a first crystalline material in the substrate; generating a plasma in a plasma chamber; modifying a shape of a plasma sheath boundary of the plasma; extracting ions from the plasma; and directing the ions to the substrate at a non-zero angle of incidence with respect to a perpendicular to a plane of the substrate, wherein the ions and reactive ambient are effective to form an angled cavity through the non-crystalline layer to expose a portion of the first crystalline material at a bottom of the angled cavity, and the angled cavity forms a non-zero angle of inclination with respect to the perpendicular.
    Type: Application
    Filed: August 14, 2014
    Publication date: October 29, 2015
    Inventors: SWAMINATHAN SRINIVASAN, FAREEN ADENI KHAJA, SIMON RUFFELL, JOHN HAUTALA
  • Patent number: 9082949
    Abstract: A method of forming a magnetic memory includes providing a layer stack comprising a plurality of magnetic layers and a plurality of electrically conducting layers on a base portion of a substrate; forming a first mask feature on an outer surface of the layer stack above a first protected region and a second mask feature on the outer surface of the layer stack above a second protected region, the first mask feature and second mask feature defining an exposed region of the layer stack in portions of the layer stack therebetween; and directing ions towards exposed the region of the layer stack in an ion exposure that is effective to magnetically isolate the first protected region from the second protected region and to electrically isolate the first protected region from the second protected region without removal of the exposed region of the layer stack.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: July 14, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell
  • Patent number: 9023722
    Abstract: A workpiece is implanted to affect growth of a compound semiconductor, such as GaN. Implanted regions of a workpiece increase, reduce, or prevent growth of this compound semiconductor. Combinations of implants may be performed to cause increased growth in certain regions of the workpiece, such as between regions where growth is reduced. Growth also may be reduced or prevented at the periphery of the workpiece.
    Type: Grant
    Filed: May 11, 2012
    Date of Patent: May 5, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Morgan D. Evans, Simon Ruffell
  • Publication number: 20150083581
    Abstract: A method of treating a substrate includes directing ions to the substrate along at least one non-zero angle with respect to a perpendicular to a substrate surface in a presence of a reactive ambient containing a reactive species where the substrate includes a surface feature. At least one surface of the surface feature is etched using the ions in combination with the reactive ambient at a first etch rate that is greater than a second etch rate when the ions are directed to the substrate without the reactive ambient and greater than a third etch rate when the reactive ambient is provided to the substrate without the ions.
    Type: Application
    Filed: March 31, 2014
    Publication date: March 26, 2015
    Applicant: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Steven R. Sherman, Simon Ruffell, John Hautala, Adam Brand
  • Patent number: 8946836
    Abstract: In one embodiment a magnetic memory includes a memory device base and a plurality of memory cells disposed on the memory cell base, where each memory cell includes a layer stack comprising a plurality of magnetic and electrically conductive layers arranged in a stack of layers common to each other memory cell. The magnetic memory further includes an implanted matrix disposed between the memory cells and surrounding each memory cell, where the implanted matrix includes component material of the layer stack of each memory cell inter mixed with implanted species, where the implanted matrix comprises a non-conducting material and a non-magnetic material, wherein each memory cell is electrically and magnetically isolated from each other memory cell.
    Type: Grant
    Filed: April 29, 2013
    Date of Patent: February 3, 2015
    Assignee: Varian Semiconductor Equipment Associates, Inc.
    Inventors: Alexander C. Kontos, Steven Sherman, John J. Hautala, Simon Ruffell