Patents by Inventor Simon Wang

Simon Wang has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Publication number: 20250145692
    Abstract: The subject matter described herein is directed to a chimera molecule such as a polypeptide or protein chimera useful for treating or preventing a viral infection or reducing the severity, incidence, or transmissibility of a viral infection, to nucleic acid molecules encoding the polypeptide or protein chimera, and to pharmaceutical compositions containing them. Also, methods of generating such antiviral polypeptide or protein chimera, of generating nucleic acid molecules encoding the antiviral polypeptide or protein chimera, and of generating pharmaceutical compositions containing the same, and methods of using the same for treatment or prevention of a SARS-CoV-2 infection, or to reduce the severity, incidence, or transmissibility of a of a SARS-CoV-2 infection, are described.
    Type: Application
    Filed: November 2, 2024
    Publication date: May 8, 2025
    Inventors: Shaoxiao Wang, Simon Wang, Yi Wang
  • Patent number: 9362332
    Abstract: A method of selectively etching a semiconductor device and manufacturing a BSI image sensor device includes etching a doped silicon substrate with an HNA solution for a predetermined time duration to obtain an etching solution having a concentration C1 of nitrite ions, etching the semiconductor device using the obtained etching solution. Etching the semiconductor device requires an initial concentration C0 of nitride ions that is lower than C1. The HNA solution comprises a hydrofluoric acid (HF), a nitric acid (HNO3), and a acetic acid (CH3COOH). The BSI image sensor device will have a uniform thickness when etched using the thus obtained etching solution.
    Type: Grant
    Filed: November 14, 2014
    Date of Patent: June 7, 2016
    Assignee: Semiconductor Manufacturing International (Shanghai) Corporation
    Inventors: Simon Wang, Phil Wu, Victor Luo, Silver Xi, Jason Chang, Kevin Shi
  • Publication number: 20160141330
    Abstract: A method of selectively etching a semiconductor device and manufacturing a BSI image sensor device includes etching a doped silicon substrate with an HNA solution for a predetermined time duration to obtain an etching solution having a concentration C1 of nitrite ions, etching the semiconductor device using the obtained etching solution. Etching the semiconductor device requires an initial concentration C0 of nitride ions that is lower than C1. The HNA solution comprises a hydrofluoric acid (HF), a nitric acid (HNO3), and a acetic acid (CH3COOH). The BSI image sensor device will have a uniform thickness when etched using the thus obtained etching solution.
    Type: Application
    Filed: November 14, 2014
    Publication date: May 19, 2016
    Inventors: Simon WANG, Phil WU, Victor LUO, Silver XI, Jason CHANG, Kevin SHI
  • Patent number: 9224365
    Abstract: A method and apparatus for reducing interference and a mobile terminal using the method and apparatus. The method includes: selecting a display mode of a pixel, for a frequency falling into a receiving band range of radio communication, according to a corresponding relation between the pixel to be displayed and a strength value of interference induced in the frequency. The present invention may not only further reduce interference brought by the MIPI high-speed data transmission to radio communication receiver, but also have effect on those bands lower than 1 GHZ, lower the requirements on hardware and hence lower hardware cost, and occupy no design space.
    Type: Grant
    Filed: December 17, 2013
    Date of Patent: December 29, 2015
    Assignees: Sony Corporation, Sony Mobile Communications AB
    Inventors: Zhenjiang Zhao, Feifan Wang, Simon Wang
  • Patent number: 9177843
    Abstract: A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.
    Type: Grant
    Filed: June 29, 2007
    Date of Patent: November 3, 2015
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Chien-Ming Sung, Simon Wang, Jia-Ren Chen, Henry Lo, Chen-Hua Yu, Jean Wang, Kewei Zuo
  • Publication number: 20140218352
    Abstract: A method and apparatus for reducing interference and a mobile terminal using the method and apparatus. The method includes: selecting a display mode of a pixel, for a frequency falling into a receiving band range of radio communication, according to a corresponding relation between the pixel to be displayed and a strength value of interference induced in the frequency. The present invention may not only further reduce interference brought by the MIPI high-speed data transmission to radio communication receiver, but also have effect on those bands lower than 1 GHZ, lower the requirements on hardware and hence lower hardware cost, and occupy no design space.
    Type: Application
    Filed: December 17, 2013
    Publication date: August 7, 2014
    Applicant: Sony Mobile Communications AB
    Inventors: Zhenjiang ZHAO, Feifan WANG, Simon WANG
  • Patent number: 8485789
    Abstract: A system and method for modulating capacity of a scroll compressor having a motor includes determining a target capacity of the scroll compressor, operating the motor at a first speed when the target capacity is within a first predetermined capacity range and at a second speed when the target capacity is within a second predetermined capacity range, determining a pulse width modulation cyclic ratio based on the target capacity and the first or second speed, and periodically separating intermeshing scroll members of the compressor according to the pulse width modulation cyclic ratio to modulate the capacity of the scroll compressor.
    Type: Grant
    Filed: May 16, 2008
    Date of Patent: July 16, 2013
    Assignee: Emerson Climate Technologies, Inc.
    Inventors: Yumin Gu, Xilai Yang, Simon Wang
  • Patent number: 8429243
    Abstract: Methods, systems and apparatus, including computer program products are described for formatting and sending data corresponding to web page events and user interactions with content displayed by on a web page to a web analytics system for storage and reporting.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: April 23, 2013
    Assignee: Google Inc.
    Inventors: Simon Wang, Chao Cai, Hui Sok Moon, Lik Mui, Douglas VanderMolen, Matthew Jones, Japjit Tulsi, Paul N. Muret, Sagnik Nandy
  • Patent number: 8095673
    Abstract: Methods, systems and apparatus, including computer program products, for transferring, receiving, and storing multiple element data in a string of characters. Multiple data elements are sent in a string of delimited characters and have respective project identifiers, data types, and index numbers used to extract and store the data elements at a receiving computer.
    Type: Grant
    Filed: December 12, 2008
    Date of Patent: January 10, 2012
    Assignee: Google Inc.
    Inventors: Sagnik Nandy, David White, Chao Cai, Hui Sok Moon, Simon Wang, Matthew Jones, Ashok Babu Amara, Lik Mui
  • Publication number: 20090157898
    Abstract: Methods, systems and apparatus, including computer program products, for transferring, receiving, and storing multiple element data in a string of characters. Multiple data elements are sent in a string of delimited characters and have respective project identifiers, data types, and index numbers used to extract and store the data elements at a receiving computer.
    Type: Application
    Filed: December 12, 2008
    Publication date: June 18, 2009
    Applicant: Google Inc.
    Inventors: Sagnik Nandy, David White, Chao Cai, Hui Sok Moon, Simon Wang, Matthew Jones, Ashok Babu Amara, Lik Mui
  • Publication number: 20080304944
    Abstract: A semiconductor manufacturing line includes an inert environment selected from the group consisting essentially of an inert airtight wafer holder, an inert wafer transport channel, an inert production tool, an inert clean room, and combinations thereof.
    Type: Application
    Filed: June 29, 2007
    Publication date: December 11, 2008
    Inventors: Chien-Ming Sung, Simon Wang, Jia-Ren Chen, Henry Lo, Chen-Hua Yu, Jean Wang, Kewei Zuo
  • Publication number: 20080286118
    Abstract: A system and method for modulating capacity of a scroll compressor having a motor includes determining a target capacity of the scroll compressor, operating the motor at a first speed when the target capacity is within a first predetermined capacity range and at a second speed when the target capacity is within a second predetermined capacity range, determining a pulse width modulation cyclic ratio based on the target capacity and the first or second speed, and periodically separating intermeshing scroll members of the compressor according to the pulse width modulation cyclic ratio to modulate the capacity of the scroll compressor.
    Type: Application
    Filed: May 16, 2008
    Publication date: November 20, 2008
    Applicant: Emerson Climate Technologies, Inc.
    Inventors: Yumin Gu, Xilai Yang, Simon Wang
  • Patent number: 7215587
    Abstract: A memory device includes a memory array, an I/O circuit for accessing the memory array, and a tracking circuit. The tracking circuit includes a dummy bit line, a first tracking cell including a first NMOS transistor, the first tracking cell being coupled to receive a control signal and also coupled to the dummy bit line through the first NMOS transistor, and a second tracking cell including a second NMOS transistor, the second tracking cell being coupled to receive the control signal and also coupled to the dummy bit line through the second NMOS transistor, a gate of the second NMOS transistor being coupled to the dummy bit line. The memory device also includes a control circuit coupled to the dummy bit line for generating a clock signal for the I/O circuit.
    Type: Grant
    Filed: July 5, 2005
    Date of Patent: May 8, 2007
    Assignee: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Cheng Hung Lee, Simon Wang, Hung-Jen Liao
  • Publication number: 20070008771
    Abstract: A memory device includes a memory array, an I/O circuit for accessing the memory array, and a tracking circuit. The tracking circuit includes a dummy bit line, a first tracking cell including a first NMOS transistor, the first tracking cell being coupled to receive a control signal and also coupled to the dummy bit line through the first NMOS transistor, and a second tracking cell including a second NMOS transistor, the second tracking cell being coupled to receive the control signal and also coupled to the dummy bit line through the second NMOS transistor, a gate of the second NMOS transistor being coupled to the dummy bit line. The memory device also includes a control circuit coupled to the dummy bit line for generating a clock signal for the I/O circuit.
    Type: Application
    Filed: July 5, 2005
    Publication date: January 11, 2007
    Inventors: Cheng Lee, Simon Wang, Hung-Jen Liao
  • Publication number: 20060020667
    Abstract: A method comprises receiving an email message having a sender and at least one recipient at an email server of the sender, determining an address of the at least one recipient's email server closest to the sender's email server, sending the email message to the email server indicated by the address, and forwarding the email message to a mail box of the at least one recipient.
    Type: Application
    Filed: July 22, 2004
    Publication date: January 26, 2006
    Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.
    Inventors: Jui-Ming Wang, Chung-Sheng Lee, Yi-Lung Lien, Simon Wang, Wen-Ta Kuo
  • Publication number: 20050120733
    Abstract: A heat pump includes a first and second heat exchanger, a scroll compressor and a flash tank in fluid communication. The flash tank includes an inlet fluidly coupled to the heat exchangers to receive liquid refrigerant. Furthermore, the flash tank includes a first outlet fluidly coupled to the first and second heat exchangers and a second outlet fluidly coupled to the scroll compressor. The first outlet is operable to deliver sub-cooled-liquid refrigerant to the heat exchangers while the second outlet is operable to deliver vaporized refrigerant to the scroll compressor. An expansion valve is further provided and is operable to selectively open and close the inlet by a float device. The float device is operable to control an amount of liquid refrigerant disposed within the flash tank by regulating an amount of liquid refrigerant entering the flash tank via the inlet.
    Type: Application
    Filed: June 23, 2004
    Publication date: June 9, 2005
    Inventors: John Healy, Man Wai Wu, Simon Wang
  • Patent number: 6674290
    Abstract: The invention disclosed a method and system for multi-port synchronous high voltage testing, which mainly uses two or more sets of testing circuit with variable output condition and a high voltage generator with zero intermediate voltage for synchronous high voltage testing. Therefore it is not only possible to prevent operators from electric shock but also to provide correct multi-port testing voltages so as not to cause object under test damage. The testing circuit uses a plurality sets of individual high voltage generator and a current detector for providing functions for reading and determining individual voltage and current, so that it is possible to perform several high voltage tests during a single test period and complete tests on electric products. It is therefore possible to achieve both reduction of test-time and safety of operators.
    Type: Grant
    Filed: January 22, 2002
    Date of Patent: January 6, 2004
    Assignee: Chroma ATE Inc.
    Inventor: Simon Wang
  • Publication number: 20030137308
    Abstract: The invention disclosed a method and system for multi-port synchronous high voltage testing, which mainly uses two or more sets of testing circuit with variable output condition and a high voltage generator with zero intermediate voltage for synchronous high voltage testing. Therefore it is not only possible to prevent operators from electric shock but also to provide correct multi-port testing voltages so as not to cause object under test damage. Said testing circuit uses a plurality sets of individual high voltage generator and a current detector for providing functions for reading and determining individual voltage and current, so that it is possible to perform several high voltage tests during a single test period and complete tests on electric products. It is therefore possible to achieve both reduction of test-time and safety of operators.
    Type: Application
    Filed: January 22, 2002
    Publication date: July 24, 2003
    Inventor: Simon Wang
  • Publication number: 20030030446
    Abstract: The present invention relates to a method for providing compensation current and test device using the same, the method comprising: using a standard test voltage value as a standard voltage value for a standard voltage value for a subsequent compensation calculation; reading a test voltage value and a leakage current after connecting an object to be tested to a connecting point; and calculating a simulated compensation value of a dynamic leakage current in accordance with an equation.
    Type: Application
    Filed: October 8, 2002
    Publication date: February 13, 2003
    Inventors: Simon Wang, Shauk-Soe Tone, Eddie Chang
  • Patent number: 6504381
    Abstract: The disclosure provides a two-output voltage test system, wherein the system includes a plurality of D/A converters, buffers, sinusoidal wave generators, power amplifiers, and a micro-processing controller. The two-output voltage test system provides for a number of processes including one group of the plurality of D/A converters, buffers, sinusoidal wave generators, and power amplifiers to perform the measurement of AC voltage durability (WAC), DC voltage durability (WDC), insulation resistance (IR), and leakage current (LK). The other group of the plurality of D/A converters, buffers, sinusoidal wave generators, and power amplifiers performs the measurement of ground resistance (GR). The micro-processing controller outputs the measurements simultaneously or with slight time delay in order to obtain the results measured at the same time.
    Type: Grant
    Filed: October 2, 2000
    Date of Patent: January 7, 2003
    Assignee: Chroma Ate Inc.
    Inventor: Simon Wang