Patents by Inventor Sion C. Quinlan

Sion C. Quinlan has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).

  • Programmable capacitor associated with an input/output pad
    Patent number: 8373249
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: January 24, 2011
    Date of Patent: February 12, 2013
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • PROGRAMMABLE CAPACITOR ASSOCIATED WITH AN INPUT/OUTPUT PAD
    Publication number: 20110117716
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Application
    Filed: January 24, 2011
    Publication date: May 19, 2011
    Applicant: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Programmable capacitor associated with an input/output pad
    Patent number: 7879649
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: September 22, 2009
    Date of Patent: February 1, 2011
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • DVI link with circuit and method for test
    Patent number: 7836363
    Abstract: A method of transmitting data through a link comprises encoding digital data into encoded digital data in a transition minimized differential signaling encoder, serializing the encoded digital data into encoded and serial digital data in a serializer, generating test data in a pseudo-random binary sequence generator circuit, transmitting the encoded and serial digital data through a multiplexer to a transmission medium in a normal mode of operation, and transmitting the test data through the multiplexer to the transmission medium in a test mode of operation. The encoder, the serializer, the sequence generator circuit, and the multiplexer are fabricated in a single integrated chip. The test data includes data to generate colors in a visual image, and the encoded and serial digital data is received, deserialized, decoded, and displayed in a display unit.
    Type: Grant
    Filed: February 21, 2006
    Date of Patent: November 16, 2010
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, David J. Warner
  • PROGRAMMABLE CAPACITOR ASSOCIATED WITH AN INPUT/OUTPUT PAD
    Publication number: 20100009511
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Application
    Filed: September 22, 2009
    Publication date: January 14, 2010
    Applicant: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Programmable capacitor associated with an input/output pad
    Patent number: 7602039
    Abstract: The present invention provides a method and apparatus for a programmable capacitor associated with an input/output pad in the semiconductor device. The apparatus includes a semiconductor die having an upper surface, a first capacitor deployed above the upper surface of the semiconductor die, a separation layer deployed above the first capacitor, and a bond pad deployed above the separation layer such that at least a portion of the bond pad lies above the first capacitor.
    Type: Grant
    Filed: August 29, 2002
    Date of Patent: October 13, 2009
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Bryan Almond, Ken S. Hunt, Andrew M. Lever, Joe A. Ward
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7432593
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: October 7, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7414299
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: August 19, 2008
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Optical channels for multi-level metal optical imagers and method for manufacturing same
    Patent number: 7368701
    Abstract: The manufacture of multi-level optical imagers and the resulting imagers are described. Multiple levels of metallization are prepared, each level having a via. The vias are aligned and a material having a higher refractive index than its surrounds is positioned within the vias to form an optical channel. The higher refractive index material may be an optical plug. A lens is mounted at one end of the optical channel and a photoconversion device is mounted at the other end.
    Type: Grant
    Filed: June 3, 2005
    Date of Patent: May 6, 2008
    Assignee: Micron Technology, Inc.
    Inventor: Sion C. Quinlan
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7256068
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: August 14, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7221040
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: September 30, 2003
    Date of Patent: May 22, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7176566
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: February 13, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7166918
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 20, 2005
    Date of Patent: January 23, 2007
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Optical channels for multi-level metal optical imagers
    Patent number: 7119321
    Abstract: The manufacture of multi-level optical imagers and the resulting imagers are described. Multiple levels of metallization are prepared, each level having a via. The vias are aligned and a material having a higher refractive index than its surrounds is positioned within the vias to form an optical channel. The higher refractive index material may be an optical plug. A lens is mounted at one end of the optical channel and a photoconversion device is mounted at the other end.
    Type: Grant
    Filed: July 2, 2003
    Date of Patent: October 10, 2006
    Assignee: Micron Technology, Inc.
    Inventor: Sion C. Quinlan
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 7091584
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: February 7, 2005
    Date of Patent: August 15, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • DVI link with circuit and method for test
    Patent number: 7024601
    Abstract: An embodiment includes encoding digital data into encoded digital data in a transition minimized differential signaling encoder, serializing the encoded digital data into encoded and serial digital data in a serializer, generating test data in a pseudo-random binary sequence generator circuit, transmitting the encoded and serial digital data through a multiplexer to a transmission medium in a normal mode of operation, and transmitting the test data through the multiplexer to the transmission medium in a test mode of operation. The encoder, the serializer, the sequence generator circuit, and the multiplexer may be fabricated in a single integrated circuit chip. The test data may be pseudo-random binary sequence data. The digital data may include data to generate colors in a visual image, and the encoded and serial digital data may be received, deserialized, decoded, and displayed in a display unit.
    Type: Grant
    Filed: June 4, 2002
    Date of Patent: April 4, 2006
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, David J. Warner
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 6922341
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: July 30, 2003
    Date of Patent: July 26, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Patent number: 6851183
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Grant
    Filed: January 25, 2002
    Date of Patent: February 8, 2005
    Assignee: Micron Technology, Inc.
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Publication number: 20040070951
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Application
    Filed: July 30, 2003
    Publication date: April 15, 2004
    Inventors: Sion C. Quinlan, Tim J. Bales
  • Semiconductor package assembly and method for electrically isolating modules
    Publication number: 20040061208
    Abstract: A semiconductor package assembly and method for electrically isolating modules, having a capacitor within the semiconductor package assembly. The package assembly and method are suitable for electrically isolating modules according to IEEE 1394.
    Type: Application
    Filed: September 30, 2003
    Publication date: April 1, 2004
    Inventors: Sion C. Quinlan, Tim J. Bales