Patents by Inventor Sofoklis Plevridis
Sofoklis Plevridis has filed for patents to protect the following inventions. This listing includes patent applications that are pending as well as patents that have already been granted by the United States Patent and Trademark Office (USPTO).
-
Patent number: 9184857Abstract: A method for calibrating a transceiver includes selecting one of a plurality of available calibration paths on the transceiver to be active. The transceiver includes a transmitter and a receiver. The selected one of the plurality of available calibration paths couples the transmitter to the receiver through a circuit that is external to the transceiver. A calibration signal may be provided to enable calibration of the transceiver via the selected one of the plurality of available calibration paths. The calibration signal may be received after it has passed through the selected one of the plurality of calibration paths. Characteristics of the transceiver may be measured using the received calibration signal.Type: GrantFiled: May 11, 2010Date of Patent: November 10, 2015Assignee: BROADCOM CORPORATIONInventors: Iason Vassiliou, Theodore Georgantas, Akira Yamanaka, Konstantinos Vavelidis, Sofoklis Plevridis
-
Patent number: 9142877Abstract: Disclosed are various embodiments for controlling an output power of a transmitter. Adjustment amounts for a transmitter to transmit at a desired power level are determined. For a predetermined time period, an actual power level of the transmitter is adjusted at a first adjustment rate. Upon an expiration of the predetermined time period, the actual power level is adjusted at a second adjustment rate, wherein the second adjustment rate is slower than the first adjustment rate.Type: GrantFiled: June 29, 2012Date of Patent: September 22, 2015Assignee: BROADCOM CORPORATIONInventors: Sofoklis Plevridis, Anastasios Karakasiliotis, Radhakrishnan Kuzhipatt, Kai Xie
-
Patent number: 8749318Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.Type: GrantFiled: March 5, 2012Date of Patent: June 10, 2014Assignee: Broadcom CorporationInventors: Sofoklis Plevridis, Theodoros Georgantas, Konstantinos D. Vavelidis
-
Patent number: 8620228Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.Type: GrantFiled: April 30, 2012Date of Patent: December 31, 2013Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Babis (Charalampos) Kapnistis, Spyridon Kavadias
-
Publication number: 20130260816Abstract: Disclosed are various embodiments for controlling an output power of a transmitter. Adjustment amounts for a transmitter to transmit at a desired power level are determined. For a predetermined time period, an actual power level of the transmitter is adjusted at a first adjustment rate. Upon an expiration of the predetermined time period, the actual power level is adjusted at a second adjustment rate, wherein the second adjustment rate is slower than the first adjustment rate.Type: ApplicationFiled: June 29, 2012Publication date: October 3, 2013Applicant: BROADCOM CORPORATIONInventors: Sofoklis Plevridis, Anastasios Karakasiliotis, Radhakrishnan Kuzhipatt, Kai Xie
-
Patent number: 8493158Abstract: Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator.Type: GrantFiled: July 26, 2010Date of Patent: July 23, 2013Assignee: Broadcom CorporationInventor: Sofoklis Plevridis
-
Patent number: 8494085Abstract: Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output radio frequency (RF) synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal.Type: GrantFiled: June 28, 2010Date of Patent: July 23, 2013Assignee: Broadcom CorporationInventor: Sofoklis Plevridis
-
Patent number: 8280315Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a UMTS format and at least one non-UMTS format.Type: GrantFiled: October 14, 2011Date of Patent: October 2, 2012Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras
-
Publication number: 20120220244Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.Type: ApplicationFiled: April 30, 2012Publication date: August 30, 2012Applicant: BROADCOM CORPORATIONInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Babis (Charalampos) Kapnistis, Spyridon Kavadias
-
Publication number: 20120161892Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2), the phase information dynamic range is divided by a factor (e.g., by 2), and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator performs gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.Type: ApplicationFiled: March 5, 2012Publication date: June 28, 2012Applicant: BROADCOM CORPORATIONInventors: Sofoklis Plevridis, Theodoros Georgantas, Konstantinos D. Vavelidis
-
Patent number: 8170501Abstract: A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.Type: GrantFiled: April 28, 2011Date of Patent: May 1, 2012Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Babis (Charalampos) Kapnistis, Spyridon Kavadias
-
Patent number: 8143965Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.Type: GrantFiled: July 1, 2010Date of Patent: March 27, 2012Assignee: Broadcom CorporationInventors: Sofoklis Plevridis, Theodoros Georgantas, Konstantinos D. Vavelidis
-
Patent number: 8135430Abstract: Methods and systems for WCDMA power amplifier closed loop power control are disclosed and may include determining a magnitude of an output RF signal generated by a power amplifier (PA), and configuring a gain of a PGA coupled to an input of the PA via closed-loop feedback to maintain a desired magnitude of the output RF signal. The closed-loop feedback architecture may include a slot-based and/or a real time-based control. A signal proportional to the output signal may be generated by an envelope detector. The signal generated by the envelope detector may be utilized to generate a root-mean-squared (RMS) value. The gain of the PGA may be configured by comparing the RMS value to a desired magnitude of the output signal over a time slot and/or utilizing a real time error signal generated by subtracting the signal proportional to the magnitude of the output signal from a desired magnitude.Type: GrantFiled: December 1, 2008Date of Patent: March 13, 2012Assignee: Broadcom CorporationInventor: Sofoklis Plevridis
-
Publication number: 20120034950Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a UMTS format and at least one non-UMTS format.Type: ApplicationFiled: October 14, 2011Publication date: February 9, 2012Applicant: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras
-
Patent number: 8112047Abstract: An RF transmitter includes a Cartesian to polar conversion section, a PLL, a DAC module, a mixing module, and a PA module. The Cartesian to polar conversion section converts a Cartesian based symbol stream into a polar based symbol stream. The PLL generates an oscillation when the RF transmitter is in a Cartesian mode or a phase modulated oscillation based on phase modulation information of the polar based symbol stream when the RF transmitter is in a polar mode. The mixing module mixes an analog Cartesian based signal with a local oscillation to produce a Cartesian based up converted signal when the RF transmitter is in the Cartesian mode and mixes an analog amplitude signal with a phase modulated local oscillation to produce a polar based up converted signal when the RF transmitter is in the polar mode.Type: GrantFiled: January 30, 2008Date of Patent: February 7, 2012Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras
-
Patent number: 8064842Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a GSM format and at least one non-GSM format.Type: GrantFiled: April 11, 2011Date of Patent: November 22, 2011Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras
-
Publication number: 20110201286Abstract: A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.Type: ApplicationFiled: April 28, 2011Publication date: August 18, 2011Applicant: BROADCOM CORPORATIONInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Babis (Charalampos) Kapnistis, Spyridon Kavadias
-
Publication number: 20110183708Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a GSM format and at least one non-GSM format.Type: ApplicationFiled: April 11, 2011Publication date: July 28, 2011Applicant: BROADCOM CORPORATIONInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras
-
Patent number: 7953377Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.Type: GrantFiled: May 12, 2008Date of Patent: May 31, 2011Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Babis (Charalampos) Kapnistis, Spyridon Kavadias
-
Patent number: 7949311Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a code divisional multiple access format and at least one non-code division multiple access format.Type: GrantFiled: May 12, 2008Date of Patent: May 24, 2011Assignee: Broadcom CorporationInventors: Theodoros Georgantas, Konstantinos D. Vavelidis, Sofoklis Plevridis, Ilias Bouras