Abstract: Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output radio frequency (RF) synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal.

Abstract: Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: A communication device may include one or more circuits in an integrated transmitter and receiver that includes a transmit path and a receive path. The transmit path may include an I processing baseband transmit path and a Q processing baseband transmit path. The receive path may include an I processing baseband receive path and a Q processing baseband receive path. The one or more circuits may enable sharing a first common filter by the I processing baseband transmit path and the I processing baseband receive path. The one or more circuits may also enable sharing a second common filter by the Q processing baseband transmit path and the Q processing baseband receive path. The first common filter and the second common filter are independently programmable to adjust a phase and/or a gain of the said first common filter, and/or a phase and/or a gain of the second common filter.

Abstract: A method for calibrating a transceiver includes selecting one of a plurality of available calibration paths on the transceiver to be active. The transceiver includes a transmitter and a receiver. The selected one of the plurality of available calibration paths couples the transmitter to the receiver through a circuit that is external to the transceiver. A calibration signal may be provided to enable calibration of the transceiver via the selected one of the plurality of available calibration paths. The calibration signal may be received after it has passed through the selected one of the plurality of calibration paths. Characteristics of the transceiver may be measured using the received calibration signal.

Abstract: Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two point modulation topology is employed in which phase information passes through a limiter (e.g., a +90° or +re/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +re (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output radio frequency (RF) synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal.

Abstract: Methods and systems for WCDMA power amplifier closed loop power control are disclosed and may include determining a magnitude of an output RF signal generated by a power amplifier (PA), and configuring a gain of a PGA coupled to an input of the PA via closed-loop feedback to maintain a desired magnitude of the output RF signal. The closed-loop feedback architecture may include a slot-based and/or a real time-based control. A signal proportional to the output signal may be generated by an envelope detector. The signal generated by the envelope detector may be utilized to generate a root-mean-squared (RMS) value. The gain of the PGA may be configured by comparing the RMS value to a desired magnitude of the output signal over a time slot and/or utilizing a real time error signal generated by subtracting the signal proportional to the magnitude of the output signal from a desired magnitude.

Abstract: A transceiver for transmitting and receiving signals includes a transmitter operative to up-convert baseband signals from a baseband frequency into RF signals at a radio frequency (RF) frequency and output the RF signals, a receiver operative to receive RF signals and down-convert the RF signals into baseband signals having the baseband frequency, and a plurality of calibration paths coupling the transmitter to the receiver. Any of the calibration paths can be selected to be active when calibrating components of the transceiver. Tunable components can use calibration information to optimize transceiver performance.

Abstract: An RF integrated circuit (IC) includes a first IC port for coupling a first transmit signal in a first frequency band to at least one external device and a second IC port for coupling a second transmit signal in a second frequency band to the at least one external device. A transmitter module responds to outbound data to generate the first transmit signal in a first mode of operation and to generate the second transmit signal in a second mode of operation, wherein the transmitter module generates the first transmit signal and the second transmit signal in a selected one of a plurality of wireless telephony formats based on a control signal, and wherein the plurality of wireless telephony formats includes a code divisional multiple access format and at least one non-code division multiple access format.

Abstract: Wideband-Code Division Multiple Access (W-CDMA) transmit architecture. A baseband digital processing module operates cooperatively with an analog signal processing module to effectuate highly adjustable and highly accurate gain adjustment in accordance with transmitter processing within a communication device. The gain adjustment and/or gain control is partitioned between the digital and analog domains by employing two cooperatively operating digital and analog modules, respectively. Gain adjustment in the analog domain is performed in a relatively more coarse fashion that in the digital domain. If desired, gain adjustment in each of the analog and digital domains is performed across a range of discrete steps. The discrete steps in the analog domain are larger than the discrete steps in the digital domain. Also, the discrete steps in the digital domain may be interposed between two successive discrete steps in the analog domain.

Abstract: Polar feedback architecture. A polar modulator, as may be implemented within a transmitter module, of a communication device includes feedback. This feedback involves monitoring of phase information and magnitude/amplitude information of an output signal generated by the polar modulator. The output signal can be a radio frequency (RF) signal such as may be transmitted via a communication channel within a communication system. A baseband processing module processes the monitored phase information and magnitude/amplitude information to perform adjustment of a phase modulator and/or other components within the polar modulator.

Abstract: Enhanced polar modulator for transmitter. Within a phase locked loop (PLL), a two pint modulation topology is employed in which phase information passes through a limiter (e.g., a ±90° or ±?/2) in which the phase information dynamic range is divide by a factor (e.g., by 2) and a maximum frequency deviation is also divided by a factor (e.g., by 2). Then, a double balanced up-converter mixer/modulator is implemented to perform gain adjustment (e.g., magnitude and/or amplitude adjustment) and phase changes of 0° and +180° or 0 and +? (e.g., negative gains values may be employed). Phase adjustment in such an architecture is split and provided to both the PLL and to the mixer/modulator of such a polar modulator within a transmitter module such as may be implemented within a communication device (e.g., which may be a wireless communication device). This architecture that includes a PLL with a double balanced up-converter mixer/modulator suppresses even harmonics.

Abstract: An RF transmitter includes a Cartesian to polar conversion section, a PLL, a DAC module, a mixing module, and a PA module. The Cartesian to polar conversion section converts a Cartesian based symbol stream into a polar based symbol stream. The PLL generates an oscillation when the RF transmitter is in a Cartesian mode or a phase modulated oscillation based on phase modulation information of the polar based symbol stream when the RF transmitter is in a polar mode. The mixing module mixes an analog Cartesian based signal with a local oscillation to produce a Cartesian based up converted signal when the RF transmitter is in the Cartesian mode and mixes an analog amplitude signal with a phase modulated local oscillation to produce a polar based up converted signal when the RF transmitter is in the polar mode.

Abstract: An integrated circuit (IC) includes a receiver module, a transmitter module, an inbound digital module, and a local oscillation generation module. The receiver module is operable to convert an inbound high frequency signal into a down converted inbound signal based on a receive local oscillation independently of a protocol of the inbound high frequency signal. The inbound digital module is coupled to compensate the down converted inbound signal in accordance with a selected one of the first plurality of wireless communication protocols. The transmitter module is operable to convert a first outbound signal into a first up converted signal based on a transmit local oscillation when a first one of the first plurality of wireless communication protocols is active and to convert a second outbound signal into a second up converted signal based on the transmit local oscillation when a second one of the first plurality of wireless communication protocols is active.

Abstract: A high frequency (HF) communication device includes an antenna structure, an integrated circuit (IC), and an off-chip duplexer. The IC includes a receiver section and a transmitter section. The receiver section is operable in a receive portion of a first frequency band to support multiple communication protocols and converts a filtered inbound HF signal into a down converted inbound signal in accordance with the multiple communication protocols. The transmitter section is operable in a transmit portion of the first frequency band to support the multiple communication protocols, converts an outbound signal into a first up converted signal when a first one of the multiple communication protocols is active, and converts the outbound signal into a second up converted signal when a second one of the multiple communication protocols is active.

Abstract: A communication device may include one or more circuits in an integrated transmitter and receiver that includes a transmit path and a receive path. The transmit path may include an I processing baseband transmit path and a Q processing baseband transmit path. The receive path may include an I processing baseband receive path and a Q processing baseband receive path. The one or more circuits may enable sharing a first common filter by the I processing baseband transmit path and the I processing baseband receive path. The one or more circuits may also enable sharing a second common filter by the Q processing baseband transmit path and the Q processing baseband receive path. The first common filter and the second common filter are independently programmable to adjust a phase and/or a gain of the said first common filter, and/or a phase and/or a gain of the second common filter.

Abstract: A dual band direct conversion architecture for both the receive (RX) and transmit (TX) path of a communications transceiver that minimizes the transceiver area by sharing common circuits used in both RX and TX paths is disclosed. The transceiver also allows the use of extensive digital calibration in order to achieve performance adequate to support high bit rate modulation schemes.

Abstract: Aspects of a method and system for bandwidth calibration for a phase locked loop are presented. Aspects of the method may include generating one or more carrier signals based on one or more corresponding calibration signals. A pre-distortion function may be computed based on the generated one or more carrier signals for the phase locked loop circuit. An output RF synthesized signal generated by the phase locked loop circuit may be modified based on the computed pre-distortion function and a subsequent output RF synthesized signal generated based on the modified output RF synthesized signal.